TW201336977A - 用於鈷應用之漿料 - Google Patents

用於鈷應用之漿料 Download PDF

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TW201336977A
TW201336977A TW102102341A TW102102341A TW201336977A TW 201336977 A TW201336977 A TW 201336977A TW 102102341 A TW102102341 A TW 102102341A TW 102102341 A TW102102341 A TW 102102341A TW 201336977 A TW201336977 A TW 201336977A
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slurry
corrosion inhibitor
oxidizing agent
cobalt
polishing
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You Wang
Chen-Hao Ge
Yufei Chen
Yu-Chun Wang
Wen-Chiang Tu
Lakshmanan Karuppiah
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Applied Materials Inc
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    • C09KMATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
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    • C09K3/1463Aqueous liquid suspensions
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    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09GPOLISHING COMPOSITIONS; SKI WAXES
    • C09G1/00Polishing compositions
    • C09G1/02Polishing compositions containing abrasives or grinding agents
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • H01L21/3212Planarisation by chemical mechanical polishing [CMP]
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53257Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/045Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by making a conductive layer having a relief pattern, followed by abrading of the raised portions
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material

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  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)

Abstract

一種用於鈷層或鈷層上之導電層的化學機械拋光之漿料包括:研磨顆粒;用於Cu離子或Co離子錯離子之有機錯合化合物;Co腐蝕抑制劑,該Co腐蝕抑制劑為漿料的0.01wt%至1.0wt%;氧化劑;及溶劑。漿料具有7至12的pH值。

Description

用於鈷應用之漿料
本發明一般關於基板的化學機械拋光。
在製造現今半導體積體電路(IC)的製程中,常需要平坦化基板的外表面。舉例而言,可能需要平坦化來拋光去除導電填充層,直到下方介電層的頂表面被暴露為止,在介電層的凸起圖案之間留下導電材料,以形成通孔(via)、插塞及線路而在基板上的薄膜電路之間提供導電路徑。可於介電層與導電填充層之間設置阻障層。
化學機械拋光(CMP)為可被接受的平坦化方法之一。此平坦化方法典型地需要將基板安裝於承載頭(carrier head)上。典型地將基板的暴露表面設置抵靠旋轉的拋光墊。拋光墊可具有耐用的粗糙表面。典型地將研磨拋光漿料供應至拋光墊的表面。承載頭可於基板上提供可控制之負載,以在基板與拋光墊進行相對運動的同時推動基板抵靠拋光墊。
鈷(Co)已被計劃作為下方經圖案化之介電層(如,氧化矽或低k材料)與導電填充層(如,銅(Cu))之間的阻障層的材料。元件製造中的一個步驟為拋光導電層直到下方阻障層或下方介電層被暴露為止。不幸地,當阻障層為鈷時,現有的用於拋光銅的漿料似乎不能提供令人滿意的CMP效能。不受任何特定理論限制,鈷會與銅拋光漿料發生化學反應,造成鈷溶出,進而導致高瑕疵數。然而,新的漿料配方(如,具有適當選擇的鈷腐蝕抑制劑)可能可以提供令人滿意的效能,如高移除率及低瑕疵量。
鈷(Co)也被計劃作為導電層本身的材料。如上文所提及,元件製造中的一個步驟為拋光導電層直到下方阻障層或下方介電層被暴露為止。不幸地,現有的用於拋光鈷的漿料似乎不能提供令人滿意的CMP效能。再次,不受任何特定理論限制,這可能是起因於鈷與現有拋光漿料發生化學反應。然而,適當選擇的鈷腐蝕抑制劑可顯著減少瑕疵量。
在一態樣,用於鈷層或鈷層上方的導電層之化學機械拋光的漿料包括:研磨顆粒;用於Cu或Co離子錯離子(complexion)的有機錯合化合物;Co腐蝕抑制劑,所述Co腐蝕抑制劑為漿料的0.01 wt%至1.0 wt%;氧化劑;及溶劑。漿料具有7至12的pH值。
實施例可包括下列一或多者。研磨顆粒可為氧化鋁。有機錯合化合物可包括甘胺酸、檸檬酸、醋酸或羧酸。有機錯合化合物可為漿料的0.2 wt%至2.0 wt%。Co腐蝕抑制劑可包括具有胺官能基的有機化合物。Co腐蝕抑制劑可包括 三唑、苯併三唑(benzotriazole;BTA)或三聚氰胺。Co腐蝕抑制劑可為1,2,4-三唑,且Cu腐蝕抑制劑可為漿料的0.015 wt%至0.02 wt%,如,漿料的0.016 wt%至0.018 wt%。氧化劑可包括過氧化銨(ammonium peroxide)或過氧化氫。氧化劑可為過氧化銨,且氧化劑可為漿料的0.5 vol%至1.0 vol%,如,漿料的0.8 vol%至0.85 vol%。漿料可包括pH調節劑,如,KOH。溶劑可為水。
在另一態樣,拋光的方法可包括下列步驟:使基板與拋光墊接觸,該基板具有導電層設置於鈷阻障層上;供應漿料至拋光墊;以及產生基板與拋光墊之間的相對運動,以拋光導電層直到至少該鈷阻障層被暴露為止。漿料可包括:研磨顆粒;用於Cu離子或Co離子錯離子之有機錯合化合物;Co腐蝕抑制劑,該Co腐蝕抑制劑為漿料的0.01 wt%至1.0 wt%;氧化劑;溶劑;及pH調節劑,該pH調節劑處於能提供7至12的pH值之濃度。
實施例可包括下列一或多者。Co腐蝕抑制劑可為1,2,4-三唑,且Cu腐蝕抑制劑可為漿料的約0.018 wt%。氧化劑可為過氧化銨,且氧化劑可為漿料的0.85 vol%。
在另一態樣,拋光的方法可包括下列步驟:使基板與拋光墊接觸,該基板具有鈷導電層設置於下方層上;供應漿料至拋光墊;以及產生基板與拋光墊之間的相對運動,以拋光鈷導電層直到下方層被暴露為止。漿料可包括:研磨顆粒;用於Cu離子或Co離子錯離子之有機錯合化合物;Co腐蝕抑制劑,該Co腐蝕抑制劑為該漿料的0.01 wt%至1.0 wt%; 氧化劑及溶劑。漿料具有7至12的pH值。
實施例可包括下列一或多者。Co腐蝕抑制劑可為1,2,4-三唑,且Cu腐蝕抑制劑可為漿料的0.016 wt%。氧化劑可為過氧化銨,且氧化劑可為漿料的0.80 vol%。
優點可視情況包括下列一或多者。銅導電層可被拋光直到下方鈷阻障層被暴露為止,以提供低瑕疵數,同時維持令人滿意的拋光速率及拋光均勻度。舉例而言,由SP2測量所得的阻障拋光後瑕疵數可少於100,拋光速率可為約2000 Å/min,且晶圓內不均勻度可為2%。銅主體導電層可被拋光直到下方阻障層被暴露為止,以提供低的凹陷度(dishing)同時維持令人滿意的拋光速率。
10‧‧‧基板
12‧‧‧基板
14‧‧‧介電層
16‧‧‧阻障層
18‧‧‧導電層
第1A及1B圖繪示基板的拋光,該基板具有導電層位於經圖案化之介電層上。
請參見第1A圖,於積體電路製造製程期間,基板10可包括玻璃或半導體基板12、經圖案化之介電層14以及設置於介電層14上方的導電層18。阻障層16可設置於介電層14與導電層18之間。額外的未繪示導電及/或介電層可形成於基板12與介電層14之間。介電層14可為氧化物(如,氧化矽)或低k介電質(如,多孔性經碳摻雜的氧化物)。阻障層16及導電層18中之至少一者為鈷。舉例而言,導電層18可 為鈷以外的金屬層(如,銅),且阻障層16可為鈷。或者,導電層18可為鈷,且阻障層16可省略,儘管藉由CVD所沉積的鈷層可被用作種子層(seed layer)。
如上文所註記,當鈷阻障層存在時,用於拋光銅的商用漿料無法提供令人滿意的效能,且用於拋光鈷的商用漿料同樣無法提供令人滿意的CMP效能。
有潛力解決前述問題的計劃之漿料化學物質可包括:(1)研磨顆粒;(2)用於金屬離子錯離子的有機錯合化合物;(3)Co腐蝕抑制劑;及(4)溶劑(如,水)。
漿料中的化學成分之典型範圍給定於下表1中。
研磨顆粒可為氧化物,如煙霧化或膠態的氧化鋁(Al2O3)或二氧化矽(SiO2)。研磨顆粒的尺寸可在20 nm至100 nm的範圍內。舉例而言,研磨顆粒可為來自Cabot的C7092。
有機錯合化合物為能與金屬離子(如,Cu離子或Co離子)形成錯合化合物的物質。因此,非金屬化物(錯合化合物)的分子或離子可與Cu離子或Co離子形成配位鍵。有機錯合化合物可為甘胺酸。然而,也可使用其它有機酸,如檸檬酸、醋酸或羧酸。
Co腐蝕抑制劑可為具有胺官能基的有機化合物,如三唑、苯併三唑(BTA)或三聚氰胺。詳言之,Co腐蝕抑制劑 可為0.01 wt%至1.0 wt%(如,0.01 wt%至0.1 wt%)之濃度的1,2,4-三唑。
漿料也可包括氧化劑。舉例而言,氧化劑可為過硫酸銨(APS)及/或過氧化氫。氧化劑可以漿料的0.5 vol%至1.0 vol%之濃度存在,如,漿料的0.8 vol%至0.85 vol%。
漿料也可包括Cu腐蝕抑制劑,如,成分與Co腐蝕抑制劑不同的腐蝕抑制劑,如,非1,2,4-三唑。
漿料的pH值可在7至12的範圍內,如,8至9。若有需要的話,漿料也可包括pH調節劑,以設置漿料的pH值。pH調節劑可為KOH。
實例1
可例如於MirraTM或ReflexionTM拋光系統的平台1及平台2進行位於鈷阻障層上方之銅導電層的本體拋光(bulk polishing)。可在1.5 psi至2.5 psi(如,2.1 psi)的相對壓力及73 rpm至113 rpm的平台轉速下進行本體拋光。
可藉由1:2.5的比例用水稀釋並加入以下成分,以藉由修飾C7092 Cabot漿料來提供用於拋光的漿料: 0.018 wt%的1,2,4-三唑
0.85 wt%的H2O2
pH值:8.5,以KOH調節
請注意C7092 Cabot漿料包括Cu腐蝕抑制劑。
接著本體拋光及銅清潔之後可為氧化物拋光步驟,如,在約1.5 psi或更低的壓力下,使用軟墊(如,Fujibo墊)及商用氧化物漿料(如來自Cabot的6618-12A或LK393)於平 台3進行。
接著氧化物拋光之後可為使用經稀釋的商用鹼性溶液所進行的清潔步驟。
實例2
可例如於MirraTM或ReflexionTM拋光系統的平台1及平台2進行介電層上方的鈷導電層之本體拋光及清潔。可使用微孔洞聚氨酯墊(如,來自Dow的IC-1010拋光墊)來進行拋光。可在相對低的壓力(如,1.0 psi至1.5 psi)下,且在73 rpm至113 rpm的平台轉速下,進行拋光。
可藉由加入以下成分,以藉由修飾C7092 Cabot漿料來提供用於拋光的漿料: 0.016 wt%的1,2,4-三唑
0.80 wt%的H2O2
所產生的漿料可具有8.5的pH值;不需使用pH調節劑。
接著本體拋光之後可為磨光(buffing)步驟,如,在約1.0 psi或更低的壓力下,使用軟磨光墊(如,EV4000墊)及商用阻障漿料(如LK393、B8755)於平台3進行。
接著磨光步驟之後可為使用經稀釋的商用鹼性溶液所進行的清潔步驟。
一般而言,提供適當濃度的Co腐蝕抑制劑可顯著減少鈷阻障層上方的銅導電層拋光期間的拋光瑕疵,或鈷導電層拋光期間的拋光瑕疵。
10‧‧‧基板
12‧‧‧基板
14‧‧‧介電層
16‧‧‧阻障層
18‧‧‧導電層

Claims (22)

  1. 一種用於一鈷層的化學機械拋光或一鈷層上之一導電層的化學機械拋光之漿料,包含:研磨顆粒;用於Cu離子或Co離子錯離子之一有機錯合化合物;一Co腐蝕抑制劑,該Co腐蝕抑制劑為該漿料的0.01 wt%至1.0 wt%;一氧化劑;以及一溶劑;且其中該漿料具有7至12的一pH值。
  2. 如請求項1所述之漿料,其中該研磨顆粒包含氧化鋁。
  3. 請求項1所述之漿料,其中該有機錯合化合物包含甘胺酸、檸檬酸、醋酸或羧酸。
  4. 如請求項3所述之漿料,其中該有機錯合化合物為該漿料的0.2 wt%至2.0 wt%。
  5. 如請求項1所述之漿料,其中該Co腐蝕抑制劑包含一有機化合物,該有機化合物具有一胺官能基。
  6. 如請求項5所述之漿料,其中該Co腐蝕抑制劑包含三唑、苯併三唑(BTA)或三聚氰胺。
  7. 如請求項1所述之漿料,其中該Co腐蝕抑制劑包含1,2,4-三唑。
  8. 如請求項7所述之漿料,其中該Co腐蝕抑制劑為該漿料的0.015 wt%至0.02 wt%。
  9. 如請求項8所述之漿料,其中該Co腐蝕抑制劑為該漿料的0.016 wt%至0.018 wt%。
  10. 如請求項1所述之漿料,其中該氧化劑包含過氧化銨或過氧化氫。
  11. 如請求項1所述之漿料,其中該氧化劑包含過氧化銨。
  12. 如請求項11所述之漿料,其中該氧化劑為該漿料的0.5 vol%至1.0 vol%。
  13. 如請求項12所述之漿料,其中該氧化劑為該漿料的0.8 vol%至0.85 vol%。
  14. 如請求項1所述之漿料,進一步包含一pH調節劑。
  15. 如請求項14所述之漿料,其中該pH調節劑包含KOH。
  16. 如請求項1所述之漿料,其中該溶劑為水。
  17. 一種拋光的方法,包含下列步驟:使一基板與一拋光墊接觸,該基板具有一導電層設置於一鈷阻障層上;供應一漿料至該拋光墊,其中該漿料包含:研磨顆粒;用於Cu離子或Co離子錯離子之一有機錯合化合物;一Co腐蝕抑制劑,該Co腐蝕抑制劑為該漿料的0.01 wt%至1.0 wt%;一氧化劑;一溶劑;及一pH調節劑,該pH調節劑處於能提供7至12的一pH值之一濃度;以及產生該基板與該拋光墊之間的相對運動,以拋光該導電層直到至少該鈷阻障層被暴露為止。
  18. 如請求項17所述之方法,其中該Co腐蝕抑制劑包含1,2,4-三唑,且該Co腐蝕抑制劑為該漿料的0.018 wt%。
  19. 如請求項18所述之方法,其中該氧化劑包含過氧化銨,且該氧化劑為該漿料的0.85 vol%。
  20. 一種拋光的方法,包含下列步驟:使一基板與一拋光墊接觸,該基板具有一鈷導電層設置於一下方層上; 供應一漿料至該拋光墊,其中該漿料包含:研磨顆粒;用於Cu離子或Co離子錯離子之一有機錯合化合物;一Co腐蝕抑制劑,該Co腐蝕抑制劑為該漿料的0.01 wt%至1.0 wt%;一氧化劑;及一溶劑,其中該漿料具有7至12的一pH值;以及產生該基板與該拋光墊之間的相對運動,以拋光該鈷導電層直到該下方層被暴露為止。
  21. 如請求項20所述之方法,其中該Co腐蝕抑制劑包含1,2,4-三唑,且該Co腐蝕抑制劑為該漿料的0.016 wt%。
  22. 如請求項21所述之方法,其中該氧化劑包含過氧化銨,且該氧化劑為該漿料的0.80 vol%。
TW102102341A 2012-01-24 2013-01-22 用於鈷應用之漿料 TW201336977A (zh)

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