TW201330217A - Production method of a semiconductor device - Google Patents

Abstract

In a production method of a semiconductor device, the semiconductor device includes resin layers and semiconductor components, and the method includes a step in which resin layers and semiconductors are laminated on a substrate alternately such that heating and pressurizing are performed to adhere them at the temperature which is less than a temperature at which a solder layer of the substrate and/or the semiconductor components melt, and a step in which heating and pressurizing are performed at a temperature which is equal to or more than the temperature at which the solder layer melts.

Description

Semiconductor device manufacturing method

The present invention relates to a method of fabricating a semiconductor device.

The present application claims priority based on Japanese Patent Application No. 2011-247023, filed on Nov. 11, 2011, in Japan, and Japanese Patent Application No. 2012-64719, filed on March 22, 2012 in Japan. Aid.

Conventionally, a semiconductor device in which a plurality of semiconductor elements are stacked is used. For example, Patent Documents 1 and 2 disclose a semiconductor device in which a plurality of semiconductor elements (or semiconductor substrates) having TSV (Through Silicon Via) are laminated. The semiconductor device 900 disclosed in Patent Document 1 is as shown in FIG. The semiconductor device 900 has a structure in which a semiconductor wafer 903 is laminated on a spacer 901 via a resin layer 902.

Such a semiconductor device 900 is considered to be manufactured in the following manner. First, as shown in FIG. 8A, a wiring 904 disposed on the surface of the interposer or the semiconductor wafer and the connection bump 900A are formed in advance on the interposer 901. Thereafter, as shown in FIG. 8B, a film-like adhesive (resin layer) 902 is provided. Thereafter, as shown in FIG. 8C, the semiconductor wafer 903 is laminated and soldered.

By repeating such an operation, the semiconductor device 900 shown in Fig. 7 can be obtained.

Further, Patent Document 2 discloses a method of manufacturing a semiconductor device in which four semiconductor substrates are laminated as a laminate, and the opposite semiconductor substrates are soldered to each other by heating, and then sealed by a resin between the semiconductor substrates. Inject resin.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2011-29392

[Patent Document 2] Japanese Patent Laid-Open Publication No. 2010-278334

However, in the method of manufacturing a semiconductor device of Patent Document 1, the welding is repeated every time the semiconductor wafer is laminated, and the productivity at the time of soldering is problematic in terms of time and the like. Furthermore, since the soldering is repeated each time the semiconductor wafer is laminated, there is a concern that the heat of soldering affects the semiconductor wafer of the lower layer.

On the other hand, in the method of manufacturing a semiconductor device of Patent Document 2, since the semiconductor substrates are bonded to each other and the resin is filled in the gap between the semiconductor substrates, the resin is difficult to be filled, and productivity is a problem.

The present invention relates to a method of fabricating a semiconductor device comprising at least the following steps (A); and heating and pressurizing at a temperature below the melting of the solder layer to obtain n semiconductor components and n resin layers alternately stacked a laminate obtained by laminating; and a soldering step of heating and pressurizing the laminate at a temperature below which the solder layer is melted.

The first aspect of the present invention is the following production method.

(1) A method of manufacturing a semiconductor device, comprising the steps of: preparing one or more of a combination of n semiconductor parts and n resin layers, and a substrate, wherein n semiconductor parts are separated by a step (A) The first to nth semiconductor component in which the resin layer is sequentially laminated, the n resin layers are composed of the first to nth resin layers which are sequentially used, and the substrate has a plurality of one side and the first semiconductor on one side. The terminal for connection of the component connection, the first semiconductor component has a connection terminal for connection to the substrate on one surface side and the other The surface side has connection terminals for connection to other semiconductor components, and the second to n-1th semiconductor components have connection terminals for connection to other semiconductor components on both sides, and the nth semiconductor component has a In the first to nth semiconductor components, at least one of the connection terminals that face each other with the resin layer interposed therebetween is a solder layer. In the semiconductor component and the substrate, at least one of the terminal for connecting the substrate of the first semiconductor component and the terminal for connecting the first semiconductor component of the substrate has a solder layer, and n is an integer of 2 or more; In the first bonding step (B), at least one first resin layer and at least one first semiconductor component are sequentially laminated on the substrate, and at least one laminated structure is formed, and then the temperature is lower than the melting temperature of the solder layer. Temperature-heating the resin layer by semi-hardening, and bonding the substrate and the first semiconductor component via the first resin layer in a semi-hardened state; repeating the adhesion step (C) on the adhered semiconductor component Sequence stack After the other resin layer and the other semiconductor component are heated at a temperature lower than the melting of the solder layer, the semiconductor component is adhered via the resin layer in a semi-hardened state, and the operation is repeated until the n-1th semiconductor component is adhered. Obtaining at least one laminate of n-1 resin layers and n-1 semiconductor parts alternately on the substrate, wherein the step is omitted when n is 2; and step (D), preparing a pair of rolling members The substrate on which at least one laminate is laminated is placed on one of the pressing members, but the case where the substrate is loaded on a pair of rolling members is performed in a step earlier than this, In the step (E), the nth resin layer and the nth semiconductor component are sequentially laminated on the n-1th semiconductor component of the laminate placed on the stamping member, and obtained on the substrate. At least one laminate obtained by alternately laminating n resin layers and n semiconductor parts; pressing and soldering step (F), wherein the one pressing member and the other pressing member are from the substrate side and the Nth semiconductor part side The base material and the laminate are pressed, and the base material and the laminate are heated at a temperature higher than the temperature at which the solder layer is melted, and the joints between the terminals for connection are joined to obtain a structure of the welded laminate. The hardening step (G) is heated at a temperature higher than the curing temperature of the resin layer to cure the first to nth resin layers.

The production method of the above (1) preferably has the following features (2) to (15).

(2) The method for producing a semiconductor device according to (1), wherein each of the resin layers contains 30% by weight or more and 70% by weight or less of a thermosetting resin, and the n series is selected from 2, 3, and 4 Any integer in the group consisting of 5, 6, 7, 8, 9, and 10.

(3) The method of manufacturing a semiconductor device according to (1) or (2), wherein, in the first bonding step (B), a plurality of first resin layers are disposed on a substrate, and each of the first Laminating the first semiconductor component on the resin layer, In the repeating adhesion step (C), the other resin layers and the semiconductor components are sequentially laminated on each of the first semiconductor components of the first semiconductor component.

(4) The method of manufacturing a semiconductor device according to (1) or (2), further comprising, in addition to the step (D), repeating the step (C'), wherein the repeating step (C') is to form a laminate The combination of the first adhesion step (B) and the repeated adhesion step (C) is repeated a plurality of times to form a plurality of laminates on the substrate, or further comprises a repeating step (C") before the hardening step (G), the repetition In the step (C"), the combination of the forming steps (B) to (F) of forming a laminate is repeated a plurality of times, and a plurality of laminates are formed on the substrate.

(5) The method of manufacturing a semiconductor device according to any one of (1) to (4), comprising the step of: (a), n is 3, and preparing the first semiconductor component and the second semiconductor component a third semiconductor component, a substrate, a first resin layer, a second resin layer, and a third resin layer as the semiconductor and resin layer; and the first adhesion step (B): sequentially laminating the substrate on the substrate After the resin layer and the first semiconductor component are heated, the substrate and the first semiconductor component are adhered via the first resin layer in a semi-hardened state; and the repeating adhesion step (C) is performed on the first semiconductor component The second resin layer and the second semiconductor component are laminated in this order, and then heated, and the first semiconductor layer is sandwiched by the second resin layer in a semi-hardened state. The body part and the second semiconductor component are adhered; in the step (D), a pair of rolling members are prepared, and the base material, the first resin layer, the first semiconductor component, and the second resin are placed on one of the pressing members. a layer and a second semiconductor component; in the step (E), the third semiconductor component is provided on the second semiconductor component via the third resin layer, and the laminate is formed on the substrate; the rolling and soldering step ( F) pressing the laminate with one of the rolling members and another pressing member, and heating to perform welding to obtain a welded laminate structure; the hardening step (G) The first resin layer, the second resin layer, and the third resin layer are cured.

(6) The method of manufacturing a semiconductor device according to (5), wherein the first resin layer, the second resin layer, and the third resin layer comprise a thermosetting resin, and the hardening step is performed by a fluid edge The body pressure is heated to cure the first resin layer, the second resin layer, and the third resin layer.

(7) The method of manufacturing a semiconductor device according to (5) or (6), wherein the second semiconductor component connection terminal of the third semiconductor component and the third semiconductor component connection terminal of the second semiconductor component are At least one of the first semiconductor component connection terminal of the second semiconductor component and the second semiconductor component connection terminal of the first semiconductor component has a solder layer, and the first semiconductor At least one of the base material connection terminal of the component and the first semiconductor component connection terminal of the base material has a solder layer.

(8) The method of manufacturing a semiconductor device according to any one of (5) to (7), wherein, before the step (B), the step of: forming the second semiconductor component a semiconductor layer constituting the third resin layer is provided on at least one of a surface of the semiconductor component connection terminal and a surface of the third semiconductor component on which the second semiconductor component connection terminal is provided, and the first semiconductor component is provided A resin layer constituting the second resin layer is provided on at least one of a surface on which the second semiconductor component connection terminal is formed and a surface on which the first semiconductor component connection terminal is provided. The first resin is formed on at least one of a surface of the base material on which the first semiconductor component connection terminal is formed and a surface on which the first semiconductor component is provided with the base material connection terminal. The resin layer of the layer.

(9) The method of manufacturing a semiconductor device according to any one of (5) to (8) wherein the step (D) of placing the substrate is prepared to have one of opposite faces arranged in advance. a step of disposing a pressure-receiving member and a device disposed between the pair of rolling members in a state of being separated from the pressing members, and disposing the stacked body on the setting portion; The rolling and welding step (F) is a step of heating and welding the laminate and the installation portion while heating the pair of rolling members.

(10) The method of manufacturing a semiconductor device according to (9), wherein a temperature of one of the pair of rolling members is lower than a temperature of the other pressing member.

The method of manufacturing a semiconductor device according to any one of (5), wherein the structure includes at least the third resin layer, the third semiconductor component, the second resin layer, and the first (2) a semiconductor component, the first resin layer, and the first semiconductor component, wherein the resin layer and the semiconductor component are alternately laminated, and the structure is formed on the substrate by two or more. In the curing step, The curing of the first resin layer, the second resin layer, and the third resin layer included in a plurality of the structures formed on the substrate is performed, and the step after the curing step includes cutting the substrate one by one by the structure Break the cutting step.

The semiconductor device of the second semiconductor component TSV structure, comprising: a substrate; and a through hole penetrating through the substrate, the semiconductor device manufacturing method according to any one of (5) to (11) The through hole is connected to the third semiconductor component connection terminal and the first semiconductor component connection terminal, and the semiconductor wafer of the first semiconductor component TSV structure includes a substrate and a through hole penetrating the substrate. The through hole is connected to the terminal for connecting the second semiconductor component and the terminal provided on the surface opposite to the surface on the side of the substrate on which the second semiconductor component is connected.

(13) The method of manufacturing a semiconductor device according to any one of (1) to (12), comprising at least one of the following features: (i) a melting point of the solder layer is 110 to 250 ° C, (ii) The resin layer contains a thermosetting resin and a flux active compound having 1 to 30% by weight of at least one of a carboxyl group and a phenolic hydroxyl group.

(14) The method of manufacturing a semiconductor device according to any one of (1) to (13), comprising at least one of the following features: (iii) comprising the step of pressurizing the substrate and the laminate with a fluid And (iv) the resin layer contains a thermosetting resin, and (v) the heating step of the curing step is carried out by using a heated pressurized fluid or by heating of the container.

(15) The method of manufacturing a semiconductor device according to (14), comprising at least one of the following features: (vi) a melting point of the solder layer is 170 to 230 ° C, (vii) the fluid is air or a passive gas, (viii) The pressing force of the laminate pressurization is 0.1 MPa or more and 10 MPa or less.

(16) The second aspect of the present invention is the following manufacturing method.

A method of manufacturing a semiconductor device, comprising the steps of: preparing one or more of a combination of n semiconductor components and n resin layers, and a substrate, n semiconductor components, which are separated by a resin layer; The first to nth semiconductor components of the stack are formed, and the n resin layers are composed of the first to nth resin layers which are sequentially used, and the substrate has a plurality of connections for connection to the first semiconductor component on one surface side. In the terminal, the first semiconductor component has a connection terminal for connection to the substrate on one surface side and a connection terminal for connection to another semiconductor component on the other surface side, and the second to n-1th semiconductor components are respectively provided. The terminal for connection to another semiconductor component is provided on both sides, and the nth semiconductor component has a connection terminal for connection to the semiconductor component of the n-1th, and is sequentially stacked in the first to nth semiconductor components. At least one of the connection terminals that face each other with the resin layer interposed therebetween is a solder layer, and the first semiconductor component and the substrate are connected to each other with respect to the base material of the first semiconductor component facing each other. At least one of the terminal and the first semiconductor component connection terminal of the substrate has a solder layer, but n is an integer of 2 or more; and in the first bonding step (B), at least one layer is sequentially laminated on the substrate. 1 resin layer and at least one first semiconductor component, after forming at least one laminated structure, heating at a temperature lower than a temperature at which the solder layer is melted and semi-curing the resin layer, and the first half of the semi-hardened state The resin layer adheres the substrate and the first semiconductor component; and in the second bonding step (b-1), after the second resin layer and the second semiconductor component are sequentially laminated on the adhered first semiconductor component, Heating at a temperature lower than the temperature at which the solder layer is melted and semi-curing the resin layer, and bonding the first semiconductor component and the second semiconductor component via the second resin layer in a semi-hardened state; repeating the adhesion step (C) And the second bonding step is repeated for n-1 times on the second semiconductor component in the same condition until the nth semiconductor component is adhered, and n resin layers and n semiconductor components are alternately laminated on the substrate. And at least one laminate, but n is 2 This step is omitted; in step (D), a pair of rolling members are prepared, and at least one laminated body of the substrate is placed on one of the rolling members, but the step earlier than this is The case where the substrate is loaded on a pair of rolling members is omitted; in step (e), the substrate and the laminate are pressurized with a fluid; and step (f), with one of the rolling members and the other The pressing member presses the substrate and the laminate from the substrate side and the nth semiconductor component side; and the soldering and curing step (g) heats the substrate and the laminate at a temperature higher than a temperature at which the solder layer is melted. The first to nth resin layers are cured by welding between the terminals for the opposite connection, and a structure of the welded laminate is obtained.

The manufacturing method of the above (16) preferably has the following features (17) to (30).

(17) The method of producing a semiconductor device according to (16), wherein each of the resin layers contains 30% by weight or more and 70% by weight or less of a thermosetting resin, and the n series is selected from 2, 3, and 4 Any integer in the group consisting of 5, 6, 7, 8, 9, and 10.

(18) The method of manufacturing a semiconductor device according to (16), wherein, in the first bonding step (B), a plurality of first resin layers are disposed on a substrate, and each of the first The first semiconductor component is laminated on the resin layer, and in the second bonding step (b-1), the other resin layer and the semiconductor component are sequentially laminated on each of the first semiconductor components of the first semiconductor component.

(19) The method of manufacturing a semiconductor device according to (16) or (17), further comprising repeating the step (c') before the step (D), the repeating step (c') forming a laminate The first adhesion step (B) is repeated a plurality of times in combination with the second adhesion step (b-1) and the repeated adhesion step (c), and a plurality of laminates are formed on the substrate, or a repeating step is included. "), repeating the step (C") is a step of repeating the forming step (B) to the step (g) of forming a laminate, and forming a plurality of laminates on the substrate.

(20) The method of manufacturing a semiconductor device according to any one of (16) to (19), comprising the step of: (a), n is 3, and preparing a third semiconductor component and a second semiconductor component The first semiconductor component, the base material, and the third resin layer, the second resin layer, and the first resin layer serve as the semiconductor and the resin layer, and the third semiconductor component has a side for connecting to the second semiconductor component. a terminal for connection, the second semiconductor component having a connection terminal for connection to the first semiconductor component on one side and a connection terminal connected to the third semiconductor component on the other surface side, the first semiconductor component being One of the terminals has a connection terminal for connection to the substrate, and the other terminal has a connection terminal for connection to the second semiconductor component, and the substrate has a plurality of ones on the one side and the first semiconductor component. a connection terminal for connection; the first adhesion step (B): sequentially laminating the first resin layer and the first semiconductor component on the substrate, and heating the first resin layer in a semi-hardened state The substrate and the first semiconductor component In the second bonding step (b-1), the second resin layer and the second semiconductor component are sequentially laminated on the first semiconductor component, and then heated, and the second resin layer is sandwiched in a semi-hardened state. Adhering the first semiconductor component and the second semiconductor component; In the repeating bonding step (c), the third resin layer and the third semiconductor component are sequentially laminated on the second semiconductor component, and then heated, and the second semiconductor component is sandwiched by the third resin layer in a semi-hardened state. And bonding the third semiconductor component to obtain at least the third semiconductor component, the third resin layer, the second semiconductor component, the second resin layer, and the first semiconductor component, and the resin layer and the semiconductor At least one laminate obtained by alternately laminating parts; in the step (D), preparing a pair of rolling members and placing a plurality of the laminates laminated on the substrate over one of the pressing members In the step (e), the loaded substrate and the laminate are pressurized by a fluid; in the step (f), the other rolling member and the one of the rolling members are pressed while being pressed The substrate and the laminate are pressed; in the step (g), the substrate and the laminate are heated and welded while being pressed, and the third resin layer, the second resin layer, and the 1 hardening of the resin layer is carried out.

(21) The method of manufacturing a semiconductor device according to (20), wherein at least one of the second semiconductor component connection terminal of the third semiconductor component and the third semiconductor component connection terminal of the second semiconductor component At least one of the first semiconductor component connection terminal of the second semiconductor component and the second semiconductor component connection terminal of the first semiconductor component has a solder layer, and the first semiconductor component is connected to the substrate. At least one of the terminal and the first semiconductor component connection terminal of the substrate has a solder layer.

(22) The method of manufacturing a semiconductor device according to (20) or (21), wherein before the step (B), the step of: forming a third semiconductor component in the second semiconductor component A resin layer constituting the first resin layer is provided on at least one of the surface of the connection terminal and the surface of the third semiconductor component on which the second semiconductor component connection terminal is provided, and the first semiconductor component is formed. A resin layer constituting the second resin layer is provided on at least one of a surface of the second semiconductor component connection terminal and a surface of the second semiconductor component on which the first semiconductor component connection terminal is provided. A resin layer constituting the first resin layer is provided on at least one of a surface on which the terminal for connecting the first semiconductor component is formed and a surface on which the terminal for connection of the first semiconductor component is provided.

The method of manufacturing a semiconductor device according to any one of (20) to (22), wherein the step (D) of placing the substrate is prepared to have one of opposite faces arranged in advance. a pressing member and a device disposed between the pair of pressing members in a state of being separated from the pressing members, and the mounting portion disposed in a separated state with respect to the pair of pressing members is disposed on the mounting portion a step of a plurality of the laminates on the substrate; the bonding step (g) is performed by pressing a plurality of the laminates laminated on the substrate with the pair of rolling members, heating and performing The steps of welding.

(24) The method of manufacturing a semiconductor device according to (23), wherein a temperature of one of the pair of rolling members is lower than a temperature of the other pressing member.

The method of manufacturing a semiconductor device according to any one of (20) to (24) wherein the laminate has two or more formed on the substrate, and the step after the bonding step includes one by one The cutting step in which the laminate cuts the substrate.

The semiconductor device of the second semiconductor component TSV structure, comprising: a substrate; and a through hole penetrating through the substrate, the semiconductor device manufacturing method according to any one of (20) to (25) The through hole is connected to the third semiconductor component connection terminal and the first semiconductor component connection terminal, and the semiconductor wafer of the first semiconductor component TSV structure includes a substrate and a through hole penetrating the substrate. The through hole is connected to the terminal for connecting the second semiconductor component and the terminal provided on the surface opposite to the surface on the side of the substrate on which the second semiconductor component is connected.

(27) The method of manufacturing a semiconductor device according to any one of (16) to (26), comprising at least one of the following features: (i) a melting point of the solder layer is 110 to 250 ° C, and (ii) the resin layer contains heat A curable resin and a flux active compound having at least one of a carboxyl group and a phenolic hydroxyl group in an amount of from 1 to 30% by weight.

The method of manufacturing a semiconductor device according to any one of (16) to (27), comprising at least one of the following features: (iii) the step of pressurizing the substrate and the laminate with a fluid And in a container with a fluid introduced (iv) The resin layer contains a thermosetting resin, (v) solder hardening, and the heating of the resin layer is performed by using a heated rolling member.

(29) The method of manufacturing a semiconductor device according to any one of (16) to (28), comprising at least one of the following features: (vi) a melting point of the solder layer is 170 to 230 ° C, (vii) the fluid is air or The pressure of the passive gas and (viii) for pressing the laminate is 0.1 MPa or more and 10 MPa or less.

The method of manufacturing a semiconductor device according to any one of (16) to (29), further comprising, after the step (g), a post-hardening step for performing the laminate The resin layer is completely hardened by heating and pressurization.

According to the present invention, a method of manufacturing a semiconductor device capable of improving productivity and reliability is provided.

1‧‧‧Semiconductor device

2‧‧‧Laminated body

3‧‧‧ Structure

5‧‧‧ device

6‧‧‧ device

10‧‧‧Semiconductor wafer

10A‧‧‧Semiconductor Wafer

11‧‧‧ resin layer

11A, 11B‧‧‧ resin layer

12‧‧‧Semiconductor wafer

13‧‧‧ resin layer

14‧‧‧Semiconductor wafer

15‧‧‧ resin layer

16‧‧‧Semiconductor wafer

17,17A, 17B‧‧‧ resin layer

18‧‧‧Substrate

18A‧‧‧Substrate

19‧‧‧ Sealing material

43‧‧‧Compression members

44‧‧‧Compression members

51‧‧‧ Container

52‧‧‧Hot board

53‧‧‧Hot board

54‧‧ ‧ sales

55‧‧‧ plates

101‧‧‧ terminals

120‧‧‧Substrate

121‧‧‧terminal

121A‧‧‧ solder layer

122‧‧‧terminal

123‧‧‧Tongkong

140‧‧‧Substrate

141‧‧‧ terminals

141A‧‧‧ solder layer

142‧‧‧ terminals

143‧‧‧through holes

160‧‧‧Substrate

161‧‧‧ terminals

161A‧‧‧ solder layer

162‧‧‧ terminals

163‧‧‧through holes

181‧‧‧ terminals

181A‧‧‧ solder layer

511‧‧‧Pipe

900A‧‧‧Connecting bumps

900‧‧‧Semiconductor device

901‧‧‧ Inserts

902‧‧‧film adhesive

903‧‧‧Semiconductor wafer

904‧‧‧ wiring

Fig. 1A is a schematic cross-sectional view showing a manufacturing step of one of the semiconductor devices of the present invention.

Fig. 1B is a schematic cross-sectional view showing a manufacturing step of one of the semiconductor devices of the present invention.

Fig. 1C is a schematic cross-sectional view showing a manufacturing step of one of the semiconductor devices of the present invention.

Figure 2 is a cross-sectional view showing a manufacturing apparatus of a semiconductor device which can be used in the present invention.

Fig. 3A is a schematic cross-sectional view showing a manufacturing step of one of the semiconductor devices of the present invention.

Fig. 3B is a schematic cross-sectional view showing a manufacturing step of one of the semiconductor devices of the present invention.

4A is a schematic cross-sectional view showing a manufacturing step of one of the semiconductor devices of the present invention.

Fig. 4B is a schematic cross-sectional view showing a manufacturing step of one of the semiconductor devices of the present invention.

4C is a schematic cross-sectional view showing a manufacturing step of one of the semiconductor devices of the present invention.

Fig. 5 is a schematic cross-sectional view showing a manufacturing apparatus of a semiconductor device which can be used in the present invention.

Fig. 6A is a schematic cross-sectional view showing a modification of the combination of the resin layer and the semiconductor wafer of the present invention.

Fig. 6B is a schematic cross-sectional view showing a modification of the combination of the resin layer and the semiconductor wafer of the present invention. Figure.

Fig. 7 is a schematic cross-sectional view showing the structure of a conventional semiconductor device described in the prior art.

Figure 8A shows a schematic cross-sectional view of a conventional fabrication step of a semiconductor device.

Figure 8B is a schematic cross-sectional view showing a conventional manufacturing step of a semiconductor device.

Figure 8C is a schematic cross-sectional view showing a conventional manufacturing step of a semiconductor device.

Fig. 9A is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 9B is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 9C is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 9D is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 9E is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 10A is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 10B is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 10C is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 10D is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 11A is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 11B is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 11C is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 11D is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 11E is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 12A is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 12B is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 12C is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 12D is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 12E is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 12F is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 13A is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 13B is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 13C is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 13D is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 14A is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 14B is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Fig. 14C is a schematic view showing the steps of a method of manufacturing a semiconductor device of the present invention.

Preferred embodiments or embodiments of the present invention will be described below using the drawings. However, the present invention is not limited to the following examples or embodiments. For example, the constituent elements or conditions of the ideal examples or embodiments may be combined as appropriate. As long as there is no problem, it can be combined with other components. Various changes in position, number, size, amount, and the like can be made without departing from the general meaning of the invention.

In the present invention, the resin layer and the semiconductor component are sequentially laminated on the substrate, but the number of combinations of the resin layer and the semiconductor component is not limited, and there is no upper limit. For example, 2 to 20 groups, 2 to 16 groups, 2 to 8 groups, and 2 to 6 groups can be used. Any of the 2, 4, and 6 groups is preferred.

(First embodiment)

As a first embodiment of the present invention, a method of simultaneously performing an adhesion step and a soldering step for a resin layer and a semiconductor component which are finally provided will be described.

1A to 3B show a method of manufacturing a semiconductor device in which four layers of semiconductor components are laminated in a preferred embodiment of the present invention.

13A to 13D show a method of manufacturing a semiconductor device including three layers of semiconductor parts according to a preferred embodiment of the present invention, and Fig. 13D shows a state in which soldering by soldering is completed by heating and pressurization.

If the steps of providing the resin layer 17 and the semiconductor component 16 are omitted from FIGS. 1A to 1B and the resin layer 15 is directly disposed on the substrate 18 as the first resin layer, the subsequent steps are sequentially performed, and as shown in FIG. 13A to FIG. 13D shows a semiconductor device including three layers of semiconductor components.

The steps of providing the resin layers 17 and 15 and the semiconductor components 16 and 14 are omitted from FIGS. 1A to 1C, and the resin layer 13 is directly placed on the substrate 18 as the first resin layer, and the subsequent steps are sequentially performed. A semiconductor device including two layers of semiconductor parts is fabricated.

The outline of the method of manufacturing the semiconductor device 1 (four-layer structure) of the present embodiment will be described below with reference to FIGS. 1A to 3B.

The manufacturing method of the semiconductor device 1 of the first embodiment includes the steps of preparing the first semiconductor component 16, the second semiconductor component 14, the third semiconductor component 12, the fourth semiconductor component 10, the substrate 18, and the first resin layer. 17. A member of the second resin layer 15, the third resin layer 13, and the fourth resin layer 11; a step of obtaining a laminate; a bonding step; and a hardening step.

As shown in FIG. 1A, in the step of preparing a member, a semiconductor wafer (first semiconductor component) 16, a semiconductor wafer (second semiconductor component) 14, a semiconductor wafer (third semiconductor component) 12, and a semiconductor wafer (fourth) are prepared. Semiconductor component 10, substrate 18, resin layer (first resin layer) 17, resin layer (second resin layer) 15, resin layer (third resin layer) 13, and resin layer (third resin layer) 11.

Terminals, solder layers or through holes are provided at any selected location for semiconductor components as needed. The semiconductor component provided at the top must be provided with a terminal, but sometimes a through hole or a semiconductor layer may not be provided. Further, a terminal is also provided on the substrate, and a solder layer is provided on the terminal as needed.

As shown in FIG. 1B, in the step of obtaining a laminate, first, the first resin layer 17 and the first semiconductor component 16 are sequentially laminated on the substrate 18. Thereafter, the substrate 18 and the first semiconductor component 16 are adhered by heating through the first resin layer 17 in a semi-hardened state. Thereafter, the second resin layer 15 and the second semiconductor component 14 are sequentially laminated on the first semiconductor component 16. After that, the first semiconductor component 16 and the second semiconductor component 14 are adhered via the second resin layer 15 in a semi-hardened state by heating. Thereafter, the third resin layer 13 and the third semiconductor component 12 are sequentially laminated on the second semiconductor component 14. After that, the third semiconductor component 13 and the second semiconductor component 14 are adhered via the third resin layer 13 in a semi-hardened state.

Next, as shown in Fig. 1C, a pair of rolling members 43, 44 are prepared. The base material 18, the first resin layer 17, the first semiconductor component 16, the second resin layer 15, the second semiconductor component 14, the third resin layer 13, and the third semiconductor component 12 are placed on one of the rolling members 44. When the substrate is placed in advance on a pair of rolling members, the subsequent lamination and welding can be directly performed. After the loading, the fourth semiconductor component 10 is placed on the third semiconductor component 12 via the fourth resin layer 11, and a laminate before soldering is obtained. At this time, it is not heated or pressurized, but heating or pressurization or one of them may also be performed.

Next, in the joining step, the laminated body 2 is pressed with another rolling member 43 and the one of the rolling members 44 and heated to be welded. Thereby, the welded structure is obtained.

Further, the curing step is performed as needed, and in this step, the first resin layer 17, the second resin layer 15, the third resin layer 13, and the first resin layer 11 are cured.

Next, a method of manufacturing the semiconductor device 1 of the present embodiment will be described in detail.

(Steps for preparing components)

First, as shown in FIG. 1A, a semiconductor wafer 16 (14, 12), a semiconductor wafer 10, a substrate 18, and a resin layer 17 (15, 13, 11) are prepared. It is preferable that the semiconductor wafers 16, 14 and 12 other than the semiconductor wafer 10 disposed at the uppermost portion have the same structure.

The semiconductor wafer 16 used in the present embodiment is a semiconductor element having a TSV (Through-Silicone via) structure having a substrate (germanium substrate) 160 and a through hole 163 penetrating the substrate 160. A terminal 161 is provided on one surface of the substrate 160, and a terminal 162 is provided on the other surface. The terminal 161 and the terminal 162 are connected by a through hole 163. The terminal 162 of the first semiconductor component (semiconductor wafer) 16 is connected to a terminal positioned at a position facing the terminal. Specifically, the terminal 162 is connected to a terminal for connection of the terminal of the base material 18. The terminal 161 of the first semiconductor component 16 is a connection terminal that is connected to the second semiconductor component (semiconductor wafer) 14 positioned thereon via a resin layer.

The through hole 163 may be made of any material selected, for example, a metal such as copper or tungsten, or a conductive polycrystalline silicon doped with impurities.

The terminal used in the present invention can be arbitrarily selected. It is also possible to have an arbitrarily selected structure or a material of any choice. Although not shown, the terminal 162 is a laminated structure in which a copper layer, a nickel layer, and a gold layer are sequentially laminated from the substrate 160 side. That is, the copper layer is in contact with the semiconductor component. Other terminals may have this configuration.

The terminal 161 has a solder layer 161A on the surface. The connection terminal 161 is formed by laminating a nickel layer on a copper layer as shown, for example. A solder layer 161A is provided on the connection terminal 161 so as to cover at least a part of the nickel layer. The solder layer can also cover the entire surface of the connection terminal. The solder layer 161A may also be provided in such a manner as to cover the copper layer.

The material of the solder layer 161A is not particularly limited. For example, at least one or more alloys selected from the group consisting of tin, silver, lead, zinc, antimony, indium, and copper can be used as the above materials. Among them, it is preferable to contain at least one or more alloys selected from the group consisting of tin, silver, lead, zinc, and copper. The melting point of the solder layer 161A (the temperature at which the solder layer is melted) can be arbitrarily selected according to the solder to be used, preferably 110 to 260 ° C, more preferably 110 to 250 ° C, more preferably 140 to 250 ° C, and more preferably 160 ° C to 240 ° C. Good, especially good is 170~230 °C. The melting point of the solder is known as long as it knows its composition, and is generally known. Also, if it is not clear, as long as it is a purchased product, it can be known from the product data, and it can also be used. Simple measurement by a thermal analysis device or the like.

Substrate 18 can be selected as desired. The substrate may be, for example, an organic substrate such as a resin substrate, or may be a tantalum wafer, a tantalum substrate, a glass substrate, a ceramic substrate or the like as a semiconductor wafer assembly. Preferably, the tantalum substrate is approximately equal to the coefficient of thermal expansion of the semiconductor component. A substrate having a TSV structure or a TGV (Through Glass Via) structure can also be used.

A substrate (terminal for connection) 181 is formed on the surface of the substrate 18. The terminal 181 has a solder layer 181A on the surface. When the terminal to which it is connected has a solder layer, the solder layer of the terminal 181A may be omitted. The connection terminal 181 can be arbitrarily selected. For example, the figure shows a structure in which a nickel layer is laminated on a copper layer. A solder layer 181A may be provided on the terminal in such a manner as to cover the nickel layer. Further, the solder layer 181A may be provided in such a manner that the nickel layer is not contained and the copper layer is directly coated. The terminal 181 is connected to the terminal 162 of the semiconductor wafer 16.

A resin layer 17 is provided on the surface (lower surface) of the side of the terminal 162 of the semiconductor wafer 16 on which the substrate 160 is provided.

The resin layer 17 covers the terminal 162. The resin layer 17 is described later in detail, but is a layer containing a thermosetting resin as an essential component. Further, it is preferred that the resin layer contains a flux active compound. Thereby, the metal surface can be cleaned by the action of the flux activity during soldering, and it can become a highly reliable joint structure. Further, in the present invention, a flux may be applied to the surface of the semiconductor wafer as needed. The application of the flux can also be omitted by including the flux active compound in the resin layer.

Further, the prepared semiconductor wafer 14, semiconductor wafer 12, and semiconductor wafer 10 are laminated (see FIGS. 1B and C).

The semiconductor wafers 14 and 12 have the same structure as the semiconductor wafer 16. That is, the semiconductor wafer 14 and the semiconductor wafer 12 are semiconductor elements of the TSV structure similarly to the semiconductor wafer 16.

The semiconductor wafer 14 includes a substrate (矽 substrate) 140, a through hole 143 penetrating the substrate 140, and a pair of terminals 142 and 141 connected to the through hole 143. The terminal 142 disposed on the lower surface of the wafer 14 is a terminal for connection to the terminal of the semiconductor wafer 16. The terminal 141 disposed on the upper surface of the wafer 14 is a terminal for connection to the terminal of the semiconductor wafer 12. Semiconductor crystal The sheet 12 includes a substrate (矽 substrate) 120, a through hole 123 penetrating the substrate 120, and a pair of terminals 122 and 121 connected to the through hole 123. The terminal 122 disposed on the lower surface of the wafer 12 is a terminal for connection to the terminal of the semiconductor wafer 14. The terminal 121 is a terminal for connection to the terminal of the semiconductor wafer 10.

The semiconductor wafer 10 is provided with a terminal (a terminal for connection to the semiconductor wafer 12) 101 on the surface of the substrate. In the present embodiment, the through hole penetrating the substrate of the semiconductor wafer 10 is not provided. The terminal 101 for connection of the wafer 10 can be arbitrarily selected. For example, the terminal has a structure in which a copper layer, a nickel layer, and a gold layer are sequentially laminated from the substrate side. However, the configuration of the connection terminal 101 is not limited to this.

The through holes 143 and 123 are preferably made of the same material as the through holes 163. It is preferable that the terminals 142 and 122 have the same configuration and material as the terminal 162. It is preferable that the terminals 141 and 121 have the same configuration and material as the terminal 161. Further, the symbols 141A and 121A represent solder layers, and it is preferable that the solder layer is made of the same material as the solder layer 161A.

The semiconductor wafer and the resin layer may be laminated separately, or a semiconductor wafer to which a resin layer is attached may be used.

On the lower surface of the semiconductor wafer 14 shown in FIG. 1A, a resin layer 15 covering the terminal 142 is provided in advance. Further, a resin layer 13 covering the terminal 122 is provided in advance on the lower surface of the semiconductor wafer 12.

A method of providing the resin layers 11, 13, 15, and 17 for each of the semiconductor wafers 10, 12, 14, and 16 is, for example, the following method.

For example, a combination of a plurality of semiconductor wafers to which a resin layer is attached may be prepared by attaching the resin layers 11, 13, 15, and 17 to each of the semiconductor wafers 10, 12, 14, and 16.

Also, the following methods can be used. A wafer in which the semiconductor wafers 10, 12, 14, and 16 are integrally formed is prepared in advance. A resin sheet in which the resin layers 11, 13, 15, and 17 are integrally formed is attached to the wafer. Thereafter, the combination of the resin sheet and the wafer is cut. In this way, the semiconductor wafer 10 with the resin layer 11, the semiconductor wafer 12 with the resin layer 13, the semiconductor wafer resin 14 with the resin layer 15, and the semiconductor wafer 16 with the resin layer 17 attached thereto can be prepared.

Furthermore, the following methods can also be used. A wafer in which the semiconductor wafers 10, 12, 14, and 16 are integrally formed is prepared. After the wafer is spin-coated and cut, the resin layers 11, 13, 15, and 17 are formed. Layer, then cut. In this way, the semiconductor wafer 10 with the resin layer 11, the semiconductor wafer 12 with the resin layer 13, the semiconductor wafer resin 14 with the resin layer 15, and the semiconductor wafer 16 with the resin layer 17 attached thereto can be prepared.

Further, in the present embodiment, the semiconductor wafers 10, 12, 14, and 16 have the same size in plan view (plan view when viewed from the substrate surface side). Further, the thicknesses of the substrates 120, 140, and 160 of the semiconductor wafers 12, 14, and 16 can be arbitrarily selected. The thickness is preferably 10 μm or more and 150 μm or less, more preferably 20 μm or more and 100 μm or less, and still more preferably 50 μm or less. Thus, it is preferred to use a very thin substrate.

(step of obtaining a laminate)

Next, as shown in Figs. 1A, B, and C, a laminate was obtained. First, the resin layer 17 and the semiconductor wafer 16 are sequentially laminated on the substrate 18. After heating, the substrate 18 and the semiconductor wafer 16 are adhered via the resin layer 17 in a semi-hardened state.

Alternatively, the substrate 18 may be preliminarily placed on one of a pair of rolling members of the built-in heater, and the resin layer 17 and the semiconductor wafer 16 may be laminated in this order, and pressed by the rolling member. These sides are heated for temporary adhesion. It is also possible to heat the rolling member to a predetermined temperature before placing the substrate 18. The resin layer 17 and the semiconductor wafer 16 are attached to another rolling member that is heated to a predetermined temperature as needed. It is also possible to use the laminate. After loading or installing, the rolling member is heated and then adhered.

When adhering, it is preferable to confirm the alignment mark formed on the substrate 18 and the alignment mark formed on the semiconductor wafer 16 and to perform alignment. The adhesion (temporary adhesion) is carried out under the condition that the solder layer is not melted. For example, by pressing the substrate 18, the resin layer 17, and the semiconductor wafer 16 against the rolling members 43, 44 by one of the built-in heaters, the substrate 18, the resin layer 17, and the semiconductor wafer 16 can be heated while being heated. The substrate 18 and the semiconductor wafer 16 can be adhered by pressing and applying a load to the pair of pressing members 43, 44. For example, the substrate 18 and the semiconductor wafer 16 are adhered via the resin layer 17 under atmospheric pressure and in the atmosphere using a flip chip bonding machine. The heating temperature at this time is not particularly limited. It is preferable to select a temperature at which the solder layer is not melted, and the thermosetting resin of the resin layer 17 is not completely cured. The curing temperature of the thermosetting resin contained in the resin layer is preferably lower.

Whether the position of the semiconductor wafer 16 relative to the substrate 18 is correct after bonding, for example, X can be used. Confirmed by a ray microscope or an infrared microscope.

Next, the surface of the semiconductor wafer 16 on which the terminal 161 is provided is opposed to the resin layer 15 laminated on the bottom surface of the semiconductor wafer 14, and the semiconductor wafer 14 is laminated on the semiconductor wafer 16 via the resin layer 15.

At this time, it is preferable to confirm the alignment marks formed on the semiconductor wafer 16 and the alignment marks formed on the semiconductor wafer 14 and to perform alignment.

Further, in the present invention, the semiconductor wafer having the substrate or the resin layer used for adhesion may be adhered as long as it is laminated, and may be heated to some extent before being adhered. The heating of the semiconductor wafer can be arbitrarily selected, and it can be the same as the temperature used for the adhesion at the time of lamination, and can be higher or lower. The heating temperature before the substrate may be the same as or different from the heating temperature of the semiconductor wafer having the resin layer used for adhesion, but is lower and more preferable.

After the semiconductor wafer 14 is laminated, the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, and the semiconductor wafer 14 are heated and the semiconductor wafer 16 is sandwiched by the resin layer 15 in a semi-hardened state (B stage). The semiconductor wafer 14 is adhered. At this time, the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, and the semiconductor wafer 14 are sandwiched by a pair of rolling members having a built-in heater and heated. The semiconductor wafer 16 and the semiconductor wafer 14 can be adhered by heating and applying a load by the pair of rolling members while heating. For example, the semiconductor wafer 16 and the semiconductor wafer 14 may be adhered to the atmosphere under atmospheric pressure using a flip chip bonding machine. The temperature of the foregoing preheating can be directly used as the temperature at which the adhesive is used. The heating temperature at this time is not particularly limited as long as the thermosetting resin of the resin layer 15 is not completely cured. The curing temperature of the thermosetting resin is preferably lower than that of the resin.

Whether or not the position of the bonded semiconductor wafer 14 with respect to the semiconductor wafer 16 is correct can be confirmed, for example, by an X-ray microscope or an infrared microscope.

Next, as shown in FIG. 1B, the surface of the semiconductor wafer 14 on which the terminal 141 is provided is opposed to the resin layer 13 laminated under the semiconductor wafer 12, and the semiconductor wafer 12 is placed on the semiconductor wafer 14 via the resin layer 13. Lamination.

At this time, it is preferable to confirm that the alignment marks formed on the semiconductor wafer 14 and the alignment marks formed on the semiconductor wafer 12 are aligned.

After that, the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, and the semiconductor wafer 12 are heated, and the semiconductor layer 13 is sandwiched between the semi-hardened state (B stage). The wafer 14 and the semiconductor wafer 12 are adhered. At this time, the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, and the semiconductor wafer 12 are sandwiched and heated by a pair of rolling members of the built-in heater, and heated by The semiconductor wafer 14 and the semiconductor wafer 12 can be adhered by pressing and applying a load to the pair of rolling members. The semiconductor wafer 14 and the semiconductor wafer 12 may be adhered to the atmosphere at atmospheric pressure, for example, using a flip chip bonding machine. The heating temperature at this time is not particularly limited as long as the thermosetting resin of the resin layer 13 is not completely cured, and it is preferably lower than the curing temperature of the thermosetting resin.

Whether or not the position of the bonded semiconductor wafer 12 with respect to the semiconductor wafer 14 is correct can be confirmed by, for example, an X-ray microscope or an infrared microscope.

Further, the heating temperature of each of the adhesion steps may be the same or different, but it is preferable to select a state in which the resin layer is kept semi-cured until the soldering step starts.

The heating time of the adhesion step can be arbitrarily selected, for example, 0.1 second to 10 minutes, preferably 0.2 second to 5 minutes, more preferably 0.5 second to 2 minutes.

The heating temperature (the temperature at which the resin layer is semi-hardened or the temperature at which the resin is further hardened) can also be arbitrarily selected. The reason is that depending on the resin used, the heating temperature also changes. For example, the general heating system is carried out in the range of 60 to 200 ° C, and the heating is preferably carried out in the range of 80 to 180 ° C, and particularly preferably in the range of 100 to 160 ° C.

In the present invention, the resin layer may be arbitrarily selected as long as it can be adhered and cured, and may be, for example, a resin monomer or a mixture of a resin and a monomer. Other ingredients may also be included as needed. The temperature suitable for semi-hardening can also be determined experimentally. A product commercially available as a sealing resin in the field can also be used as the resin layer of the present invention, and in this case, a temperature suitable for semi-hardening or hardening can be obtained from a dealer. Further, the resin layer before the adhesion step may be in a state before curing, or may be in a state of being semi-hardened to some extent. Further, the temperature at which the resin layer is semi-hardened generally falls between the normal temperature and the temperature at which the resin layer is cured, and the curing temperature of the resin layer can be easily determined by an experiment in which the temperature of the resin layer is gradually increased.

Next, as shown in FIG. 1C, a semiconductor wafer with a resin layer 11 attached thereto is mounted on the rolling member 43. 10. On the other hand, the base material 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, and the semiconductor wafer 12 adhered by the respective adhesive layers are sequentially placed on the rolling member 44. At this stage, preheating can also be carried out by the rolling members 43, 44 at a predetermined temperature lower than the temperature at which the welding is used.

Instead of mounting the semiconductor wafer 10 on the rolling member 43, the semiconductor wafer 10 with the resin layer 11 may be simply aligned, and the resin layer 11 may be brought into contact with the semiconductor wafer 12 to obtain a pre-weld. Laminate 2. In such a case, the laminate 2 before soldering, which is obtained by not heating the semiconductor wafer 10 with the resin layer 11 thereon, may be placed inside a pair of hot plates as shown in FIG. The fluid container 51 is introduced into the fluid container, and the structure is obtained by pressurization and heating of the welding.

Next, the rolling members 44, 43 are brought close to each other, and the resin layer 11 of the semiconductor wafer 10 with the resin layer 11 is brought into contact with the semiconductor wafer 12, whereby the laminated body 2 is obtained. If it is abutted, it does not need to be pressurized. Alternatively, it may be moved to the heating and pressurizing step of the welding immediately after the contact. At this time, the alignment marks formed on the semiconductor wafer 12 and the alignment marks formed on the semiconductor wafer 10 are confirmed and aligned. Further, in this step, the solder layers 121A, 141A, 161A, and 181A are not melted. Therefore, the terminals 122 and 141, the terminals 142 and 161, and the terminals 162 and 181 are not soldered to each other.

Further, the opposing terminals, for example, the terminals 122, 141, may or may not be in contact with each other.

Further, the resin of the resin layer 13 may be inserted between the terminals 122 and 141. The opposing solder layer and the terminal may be configured such that the opposite terminals are electrically connected to each other when the solder is melted, and the solder layer may or may not be in contact before being melted. The terminals 101 and 121, the terminals 142 and 161, and the terminals 162 and 181 are also identical to each other.

Here, the laminate means a structure in which a plurality of resin layers and a plurality of semiconductor components are alternately laminated on a substrate. In this example, at least the first resin layer, the first semiconductor component, the second resin layer, the second semiconductor component, the third resin layer, the third semiconductor component, the fourth resin layer, and the first layer are provided on the substrate. Four semiconductor parts are laminated.

(welding step)

The laminate 2 is obtained and heated in this state. In the case of pressurization, the heaters in the rolling members 43 and 44 holding the laminated body 2 are maintained to be pressurized and heated. Or after passing through the heating. The step of laminating the semiconductor wafer 10 by the resin in a pressurized and semi-hardened state is performed in another welding step In other cases, it is disposed in a separately prepared rolling member, and the heaters in the rolling members 43 and 44 are pressurized and heated. At this time, the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, the semiconductor wafer 12, and the resin are pressed against the rolling members 43, 44 by one of the aforementioned built-in heaters. The substrate 11 and the semiconductor wafer 10 are loaded, and the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, the semiconductor wafer 12, the resin layer 11, and the semiconductor wafer 10 are heated. Above the melting point of the solder layers 181A, 161A, 141A, 121A. As a result, the terminals 181 and 162, the terminals 161 and 142, the terminals 141 and 122, and the terminals 121 and 101 are welded to each other. Thereby, the welded structure 3 is obtained.

For example, a flip chip bonding machine can be used to solder between terminals 181 and 162, between terminals 161 and 142, between terminals 141 and 122, and between terminals 121 and 101 under atmospheric pressure and in the atmosphere.

According to the above method, the welded structure 3 is obtained. In the structural body 3 obtained in this manner, the resin layers 11, 13, 15, and 17 are in a semi-hardened state and are not completely cured.

In the bonding step, soldering between the terminals refers to the following conditions. That is, it is heated above the melting points of the solder layers 181A, 161A, 141A, and 121A for use between the substrate 18 and the semiconductor wafer 16, between the semiconductor wafers 16 and 14, between the semiconductor wafers 14 and 12, and between the conductor wafers 12 and 10. The solder layers 181A, 161A, 141A, and 121A joined together are melted, and at the same time, the terminals 181 and 162, the terminals 161 and 142, the terminals 141 and 122, and the terminals 121 and 101 are connected to each other via a solder layer. Correctly, it means that the terminals 181A and 162 are mutually connected, the terminals 161A and 142 are mutually connected, the terminals 141A and 122, and the terminals 121A and 101 are in physical contact with each other, and at least partially formed into an alloy state.

Whether or not the position of the bonded semiconductor wafer 10 with respect to the semiconductor wafer 12 is correct can be confirmed using, for example, an X-ray microscope or an infrared microscope.

The heating time of the joining step can be arbitrarily selected. For example, it may be, for example, 0.5 second to 10 minutes, preferably 1 second to 5 minutes, more preferably 3 seconds to 2 minutes. The heating temperature can also be arbitrarily selected. For example, the heating is generally carried out in the range of 150 to 350 ° C, and heating in the range of 180 to 300 ° C is preferred. Moreover, the temperature used for the bonding step and the temperature for soldering can be arbitrarily selected. For example, the difference is preferably 10 ° C or more, and the difference is 20 to 300 ° C or more, and the difference is 50 to 200 ° C or more.

It is also possible to perform welding while being pressurized with a fluid using the conditions described below.

(hardening step)

In the hardening step, the resin layers 17, 15, 13, and 11 in the structure 3 are hardened, for example, using the apparatus 6 shown in Fig. 2 . Further, when the bonding step has been completed to cure the resin layer, the hardening step may be omitted.

This device 6 is provided with a container 51 into which a fluid is introduced. The container 51 is a pressure vessel, and the material of the container 51 may be metal or the like, for example, stainless steel, titanium, or copper.

The method of heating the structure 3 includes a method in which the structure 3 is placed in the apparatus 6, and the heated fluid is introduced into the container 51 from the pipe 511, and the laminate is heated and pressurized. The fluid can be arbitrarily selected, and the gas is preferably, for example, air, a passive gas (nitrogen, a rare gas), or the like. Further, the fluid may flow into the container 51 from the pipe 511, and the container 51 may be heated in an atmosphere of a pressurized gas atmosphere to heat the structure 3. The heating method of the container 51 can also be arbitrarily selected. It can be heated after being pressurized, or it can be heated and then pressurized, or it can be heated and pressurized at the same time.

For example, first, the structural body 3 is placed in the container 51. Thereafter, the fluid is introduced, and the structure 3 is heated to a temperature higher than the curing temperature of the thermosetting resin of the resin layers 17, 15, 13, and 11, and the resin layers 17, 15, 13, and 11 are cured. The time taken for hardening can be arbitrarily chosen. For example, for example, 10 minutes to 9 hours, preferably 30 minutes to 6 hours, more preferably 1 to 3 hours. As a specific example, for example, heating at 180 ° C for 1 hour is performed as a hardening step. Here, the curing temperature means the curing temperature of the resin layer, and means that the thermosetting resin contained in the resin layer is a temperature in accordance with the C-stage of JIS K6900. Therefore, the heating may vary depending on the resin used, but for example, the heating is generally carried out in the range of 120 to 230 ° C, preferably in the range of 140 to 200 ° C.

Further, a plurality of structures 3 may be placed in the container 51 of the apparatus 6, and the resin layers 17, 15, 13, and 11 may be cured. In this way, productivity can be improved.

The pressure applied when the structure 3 is pressurized can be arbitrarily selected according to the fluid. 0.1 MPa or more and 10 MPa or less are more preferable, and more preferably 0.3 MPa or more and 7 MPa or less, more preferably 0.5 MPa or more and 5 MPa or less. By pressurizing the structure 3 with a fluid, generation of voids in the resin layers 17, 15, 13, and 11 can be suppressed. Especially when it is set to 0.1 MPa or more, this effect is remarkable. Further, by setting it to 10 MPa or less, it is possible to suppress an increase in size and complexity of the apparatus. Further, pressurization with a fluid means that the pressure of the gas atmosphere of the structure 3 is increased to a portion higher than the atmospheric pressure by the applied pressure. That is, the pressure is 10 MPa. The pressure applied to the structure 3 was 9 MPa larger than the atmospheric pressure.

In the above manner, the structural body 3 in which the resin layers 17, 15, 13, and 11 have been hardened is obtained (Fig. 3A). Further, the hardening of the resin layer can be completely completed in this step, and the hardening can be completed in the sealing step of any of the embodiments.

Further, in the structure 3, each side surface of the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, the semiconductor wafer 12, the resin layer 11, and the semiconductor wafer 10 may be viewed from the top surface. In the case of the same plane, that is, there is no height difference between the continuous two layers, and it becomes a flat state. Alternatively, the resin layers 17, 15, 13, and 11 may also overflow from the side surfaces of the semiconductor wafers 16, 14, 12, and 10. Furthermore, for example, a semiconductor wafer located at the lower end of the structure, such as semiconductor wafer 16 or semiconductor wafer 10, may also be smaller than other semiconductor wafers.

Further, the thickness of the resin layers 17, 15, 13, and 11 can be arbitrarily selected. For example, it may be 5 μm or more and 100 μm or less, more preferably 7 μm or more and 75 μm or less, and still more preferably 10 μm or more and 50 μm or less. When the thickness is 5 μm or more, the resin layer can surely coat the solder layer, and the terminals 181 and 162, the terminals 161 and 142, the terminals 141 and 122, and the terminals 121 and 101 can be easily connected to each other by the flux activity of the resin layer. Further, by setting it to 100 μm or less, the terminals 181 and 162, the terminals 161 and 142, the terminals 141 and 122, and the terminals 121 and 101 can be easily connected to each other. Moreover, by setting it as 100 micrometer or less, it can suppress the warpage of the base material 18 or semiconductor wafer 16, 14, 12, and 10 by hardening of a resin layer.

Here, the resin layers 17, 15, 13, and 11 will be described. The resin layers 17, 15, 13, and 11 are used to separate the substrate 18 from the semiconductor wafer 16, between the semiconductor wafers 16 and 14, between the semiconductor wafers 14 and 12, and between the semiconductor wafers 12 and 10. The gap is to be buried.

The resin layers 17, 15, 13, and 11 each contain a thermosetting resin. Further, it is preferred to contain a flux active compound.

The temperature at which only the resin layer is adhered does not melt the solder. Thereafter, the semi-hardened resin is further hardened in the soldering at the temperature at which the solder is melted. The degree of semi-hardening of the resin when it is adhered can be arbitrarily selected. Ideal conditions can be controlled by controlling the temperature or time of the bonding step or the soldering step.

As the thermosetting resin, for example, an epoxy resin, an oxetane resin, a phenol resin, a (meth) acrylate resin, an unsaturated polyester resin, a diallyl phthalate resin, and a male ruthenium can be used. Imine resin and the like. These may be used alone or in combination of two or more.

Among them, an epoxy resin excellent in curability, storage stability, heat resistance of a cured product, moisture resistance, and chemical resistance is preferable. The content of the thermosetting resin in the resin layers 17, 15, 13, and 11 can be arbitrarily selected as needed. As an example, it is preferably 30% by weight or more and 70% by weight or less. The other desirable range is, for example, 10% by weight or more and 100% by weight or less, and may be 20% by weight or more and 100% by weight or less, or may be 30% by weight or more and 100% by weight or less, or may be 50% by weight or more and 100% by weight or less. It may be 70% by weight or more and 100% by weight or less.

When the resin layers 17, 15, 13, and 11 contain a flux active compound, when soldering, the resin layer may have an effect of removing the oxide layer or the oxide film on the surface of the terminal. By causing the resin layers 17, 15, 13, and 11 to function as a flux, the oxide film coated on the surface of the solder or the terminal can be removed, so that welding with excellent connection reliability can be performed. In order for the resin layers 17, 15, 13, and 11 to function as a flux, the resin layers 17, 15, 13, and 11 must contain a flux active compound. The flux active compound contained in the resin layers 17, 15, 13, and 11 is not particularly limited as long as it can be used for soldering. A compound which is preferably a carboxyl group or a phenolic hydroxyl group or a compound having both a carboxyl group and a phenolic hydroxyl group is preferred. It can be used alone or in combination.

The blending amount of the flux active compound in the resin layers 17, 15, 13, and 11 can be arbitrarily selected, preferably from 1 to 30% by weight, more preferably from 2 to 25% by weight, still more preferably from 3 to 20% by weight.

Examples of the active compound having a carboxyl group include an aliphatic acid anhydride, an alicyclic acid anhydride, an aromatic acid anhydride, an aliphatic carboxylic acid, and an aromatic carboxylic acid.

The active compound of the carboxyl group is provided, and examples of the aliphatic acid anhydride include succinic anhydride, polyadipate anhydride, polysebacic anhydride, and polysebacic anhydride.

A flux-active compound having a carboxyl group; and examples of the alicyclic acid anhydride include methyltetrahydrophthalic anhydride, methylhexahydrophthalic anhydride, and heic acid anhydride. Hexahydrophthalic anhydride, tetrahydrophthalic anhydride, trialkyltetrahydrophthalic anhydride, and methylcyclohexene dicarboxylic anhydride.

A flux-active compound having a carboxyl group; and examples of the aromatic acid anhydride include phthalic anhydride, trimellitic anhydride, pyromellitic anhydride, diphenylketonetetracarboxylic anhydride, and ethylene trimetate. , trimellitous glyceride and the like.

The active compound having a carboxyl group-containing flux, and examples of the aliphatic carboxylic acid include a compound represented by the following formula (I), formic acid, acetic acid, propionic acid, butyric acid, valeric acid, trimethylacetic acid caproic acid, and octanoic acid ( Caprylic acid), lauric acid, myristic acid, palmitic acid, stearic acid, acrylic acid, methacrylic acid, crotonic acid, oleic acid, fumaric acid, maleic acid, oxalic acid, malonic acid, and succinic acid.

HOOC-(CH ₂ ) _n -COOH (I)

(In the formula (I), n represents an integer of 0 or more and 20 or less.)

A flux-active compound having a carboxyl group, and examples of the aromatic carboxylic acid include benzoic acid, phthalic acid, isophthalic acid, terephthalic acid, semi-melanic acid, trimellitic acid, and symmetrical trimellitic acid. , 1,2,3,5-benzenetetracarboxylic acid (mellophanic acid), 1,2,3,4-benzenetetracarboxylic acid (prehnitic acid), pyromellitic acid, berylic acid, toluic acid, dimethylbenzoic acid , hemellitic acid, mesitylene, 2,3,4-trimethyl formic acid, toluic acid, cinnamic acid, salicylic acid, 2,3- Dihydroxybenzoic acid, 2,4-dihydroxybenzoic acid, gentisinic acid (2,5-dihydroxybenzoic acid), 2,6-dihydroxybenzoic acid, 3,5-dihydroxybenzoic acid, a naphthoic acid derivative such as gallic acid (3,4,5-trihydroxybenzoic acid), 1,4-dihydroxy-2-naphthoic acid, 3,5-dihydroxy-2-naphthoic acid, reduced phenolphthalein, diphenol Acid, etc.

Among these active compound having a carboxyl group, the balance between the activity of the flux active compound, the amount of generated fugitive gas when the resin layer is cured, and the elastic modulus of the resin layer after hardening or the glass transition temperature are good. The viewpoint is preferably a compound represented by the above formula (I). Further, among the compounds represented by the above formula (I), the compound of the formula (I) wherein n is 3 to 10 is particularly effective in suppressing an increase in the modulus of elasticity of the resin layer after curing and at the same time improving adhesion. good.

Among the compounds represented by the above formula (I), the compound of the formula (I) wherein n is 3 to 10, for example, n = 3 glutaric acid (HOOC-(CH ₂ ) ₃ -COOH), n = 4 Adipic acid (HOOC-(CH ₂ ) ₄ -COOH), n=5 pimelic acid (HOOC-(CH ₂ ) ₅ -COOH), n=8 azelaic acid (HOOC-(CH ₂ ) ₈ -COOH) and HOOC-(CH ₂ ) ₁₀ -COOH of n=10.

Examples of the flux-active compound having a phenolic hydroxyl group include phenols. Specifically, for example, phenol, o-cresol, 2,6-xylenol, p-cresol, m-cresol, o-ethylphenol, 2,4-xylenol, 2,5-xylenol, and B. Phenolic, 2,3-xylenol, 2,4,6-trimethylol (mesitol), 3,5-xylenol, p-tert-butylphenol, catechol, p-tributylphenol, Hydroquinone, p-octylphenol, p-phenylphenol, bisphenol A, bisphenol F, bisphenol AF, biphenol, diallyl bisphenol F, diallyl bisphenol A, bisphenol, hydrazine A monomer containing a phenolic hydroxyl group such as phenol, a phenol novolac resin, an o-cresol novolac resin, a bisphenol F phenol resin, a bisphenol A phenol resin, or the like.

A compound having either a carboxyl group or a phenolic hydroxyl group or a carboxyl group or a phenolic hydroxyl group is incorporated in three dimensions by reaction with a thermosetting resin such as an epoxy resin.

Therefore, from the viewpoint of enhancing the formation of a three-dimensional network of the epoxy resin after hardening, the flux active compound is preferably a flux active hardener having a flux action and acting as a hardener for the epoxy resin. The flux active curing agent has, for example, one or more phenolic hydroxyl groups which can be added to the epoxy resin and one or more carboxyl groups which are directly bonded to an aromatic group which exhibits a flux (reduction action) in one molecule. Compound. Examples of such a flux-active hardener include 2,3-dihydroxybenzoic acid, 2,4-dihydroxybenzoic acid, gentisic acid (2,5-dihydroxybenzoic acid), and 2,6-dihydroxybenzoic acid. , benzoic acid derivatives such as 3,4-dihydroxybenzoic acid, gallic acid (3,4,5-trihydroxybenzoic acid); 1,4-dihydroxy-2-naphthoic acid, 3,5-dihydroxy-2 a naphthoic acid derivative such as naphthoic acid or 3,7-dihydroxy-2-naphthoic acid; reduced phenolphthalein; and diphenolic acid. These may be used alone or in combination of two or more.

Among them, in order to make the bonding between the terminals good, it is preferable to use a reduced phenolphthalein.

Further, in the resin layer, the flux active hardener is preferably blended in an amount of from 1 to 30% by weight, preferably from 3 to 20 Weight% is especially good. When the blending amount of the flux active curing agent in the resin layer is in the above range, the flux activity of the resin layer can be improved, and the flux active curing agent which does not react with the thermosetting resin remains in the resin layer.

Further, the resin layer may contain an inorganic filler. By including the inorganic filler in the resin layer, the lowest melt viscosity of the resin layer can be improved, and a gap can be prevented from being formed between the terminals. Here, examples of the inorganic filler include cerium oxide, aluminum oxide, and the like.

(sealing step)

Next, the sealing of the structural body 3 is performed using a sealing material. The sealing method can be arbitrarily selected, for example, potting, transfer molding, and compression molding.

Thereafter, the structures 3 are cut one by one, and in the case where a plurality of structures 3 are provided, a plurality of semiconductor devices 1 as shown in FIG. 3B can be obtained. Further, in Fig. 3B, reference numeral 19 denotes a sealing material, and reference numeral 18A denotes a substrate 18 which has been cut. Further, the structure in the semiconductor device 1 can be arbitrarily selected. In the case where the semiconductor device 1 has a plurality of structures 3, it may be cut one by one in accordance with the unit of the semiconductor device 1. Further, a cutting blade, a laser, a router, or the like can be used for cutting.

According to the embodiment as described above, the following effects can be exhibited.

In the present embodiment, the resin layer 17 and the semiconductor wafer 16 are sequentially laminated on the substrate 18, and the substrate 18 and the semiconductor wafer 16 are adhered via the resin layer 17 in a semi-hardened state. The resin layer 15 and the semiconductor wafer 14 are sequentially laminated on the semiconductor wafer 16 and heated, and the semiconductor wafer 16 and the semiconductor wafer 14 are adhered via the resin layer 15 in a semi-hardened state, and the resin is sequentially laminated on the semiconductor wafer 14. The layer 13 and the semiconductor wafer 12 are post-heated, and the semiconductor wafer 14 and the semiconductor wafer 12 are adhered via the resin layer 13 in a semi-hardened state. Thereafter, a pair of rolling members 43 and 44 are prepared, and a substrate 18, a resin layer 17, a semiconductor wafer 16, a resin layer 15, a semiconductor wafer 14, a resin layer 13, and a semiconductor wafer are placed over one of the rolling members 44. After the laminate of 12, the semiconductor wafer 10 is placed on the semiconductor wafer 12 via the resin layer 11, and the laminate 2 is formed, and at the same time, the laminate 2 is formed by the other pressing member 43 and the one of the pressing members 44. Press and heat to weld. Therefore, thermal damage applied to the substrate 18 and each of the semiconductor wafers 16, 14, 12, 10 can be reduced compared to the prior art. Therefore, the reliability of the semiconductor device 1 can be improved.

Further, the resin layer 17 and the semiconductor wafer 16 are sequentially laminated on the substrate 18, and then heated, and the substrate 18 and the semiconductor wafer 16 are adhered via the resin layer 17 in a semi-hardened state, and the semiconductor wafer 16 is bonded to the semiconductor wafer 16. The resin layer 15 and the semiconductor wafer 14 are sequentially heated, and the semiconductor wafer 16 and the semiconductor wafer 14 are adhered via the resin layer 15 in a semi-hardened state, and the resin layer 13 and the semiconductor wafer are sequentially laminated on the semiconductor wafer 14. After 12 heating, the semiconductor wafer 14 and the semiconductor wafer 12 are adhered via the resin layer 13 in a semi-hardened state. Thereafter, a pair of rolling members 43 and 44 are prepared, and a substrate 18, a resin layer 17, a semiconductor wafer 16, a resin layer 15, a semiconductor wafer 14, a resin layer 13, and a semiconductor wafer are placed over one of the rolling members 44. After the laminate of 12, the semiconductor wafer 10 is placed on the semiconductor wafer 12 via the resin layer 11, and the laminate 2 is formed, and at the same time, the laminate 2 is formed by the other pressing member 43 and the one of the pressing members 44. The whole is pressed and heated, and the terminals 181 and 162, the terminals 161 and 142, the terminals 141 and 122, and the terminals 121 and 101 are welded to each other. Therefore, the productivity of the solder can be improved as compared with the case where a plurality of semiconductor components are laminated while soldering the semiconductor components one by one.

Further, in the present embodiment, when the laminate 2 is obtained, it is heated every time the semiconductor wafer with the resin layer is laminated on the substrate 18. At this time, the heating is performed by heating the substrate and the semiconductor wafer and the semiconductor wafer to each other by the resin layer. Therefore, the heating time is short and the heating temperature is also low. Therefore, even if the step of obtaining the laminate 2 is carried out, the productivity of the conventional manufacturing method is improved.

Further, in the present embodiment, the laminate 2 is welded and welded.

Conventionally, when a semiconductor wafer is laminated, it is sequentially pressed and welded. Therefore, the underlying semiconductor wafer is subjected to the necessary rolling pressure for multiple soldering and is easily damaged.

On the other hand, in the present embodiment, a pair of rolling members are prepared, and the base material 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, and the resin layer 13 are placed above one of the rolling members. After the semiconductor wafers 12 are sequentially stacked, the semiconductor wafer 10 is placed on the semiconductor wafer 12 via the resin layer 11 and the laminate 2 is formed, and at the same time, one of the stamping members and the other pressing member are stacked. The entire layer 2 is pressed and heated to be welded. Therefore, it can prevent multiple rolling during welding, and damage to the substrate 18 and the semiconductor wafers 16, 14, 12, and 10 is reduced. less.

Further, in the present embodiment, the terminals 181 and 162 of the laminate 2, the terminals 161 and 142, the terminals 141 and 122, and the terminals 121 and 101 are welded to each other as the structure 3, and the structure is fluid-treated. 3 Pressurize and heat to harden the resin layers 17, 15, 13, and 11. By pressurizing the structure 3 with a fluid, it is possible to prevent voids from occurring in the resin layers 17, 15, 13, and 11 of the structure 3. Further, by pressurizing the structure 3 with a fluid, the pores existing in the resin layers 17, 15, 13, and 11 of the structure 3 can be pressed and reduced. From the above point of view, it is possible to prevent the positional deviation of the terminals from each other due to the voids. Further, it is possible to prevent the resin layers 17, 15, 13, and 11 from being extruded from the pores to contaminate the device 6.

In the step of preparing the laminate 2, when the semiconductor wafer with the resin layer is laminated, if it is carried out under atmospheric pressure, for example, a gas may enter the interface between the resin layer 17 and the semiconductor wafer 16, in the resin. The case where voids are formed in the layer 17. However, as described above, when the laminate is cured, the pores can be reduced by pressurization, so that the step of preparing the laminate 2 can be carried out under atmospheric pressure without being carried out under vacuum or the like. Therefore, the manufacturing efficiency of the semiconductor device 1 can be improved, and the manufacturing cost can be reduced.

Further, in the present embodiment, in the step of preparing the laminate 2, the substrate 18 and the semiconductor wafer 16 are adhered to each other via the resin layer 17 in a semi-hardened state. Similarly, the semiconductor wafers 16 and 14 are adhered via the resin layer 15 in a semi-hardened state, and the semiconductor wafers 14 and 12 are adhered via the resin layer 13 in a semi-hardened state. In this way, since the semiconductor wafers are adhered to each other, it is possible to prevent the semiconductor wafers in the laminate 2 from being displaced from each other.

When the semiconductor wafers 12 and 10 are adhered via the resin layer 11 in a semi-hardened state, and the semiconductor wafers 14 and 12 are adhered to each other via the resin layer 13 in a semi-hardened state, the substrate 18 and the semiconductor wafer 16 are bonded. 14, and 12 were heated many times. However, since the semiconductor wafers are adhered to each other by the resin layer in a semi-hardened state, the heating temperature can be set low, and even if the heating temperature is raised, the heating time is short. Therefore, it is considered that the influence of heat on the substrate 18 and the semiconductor wafers 16, 14, 12 is very small.

Further, in the present embodiment, the semiconductor wafer 16 is provided in the front stage of the laminated body 2. The resin layer 17 is placed. Similarly, a resin layer 15 is provided on the semiconductor wafer 14, and a resin layer 13 is provided on the semiconductor wafer 12. The semiconductor wafers 16, 14, and 12 are both TSV structures and have a very small thickness. However, by providing the resin layers 17, 15, and 13, respectively, it is possible to prevent the semiconductor wafers 16, 14, 12 from warping, and to be excellent in operability. .

Further, in the present embodiment, a semiconductor wafer of a TSV structure having a very small thickness is gradually laminated on the substrate 18. Therefore, in the case where the semiconductor wafers of the TSV structure having a very small thickness are laminated on each other, the operability is more excellent.

Further, in the present embodiment, a plurality of laminates 2 are welded to the substrate 18, sealed, and then cut. Thereby, the productivity of the semiconductor device 1 can be improved.

Further, the present invention is not limited to the above-described embodiments, and modifications, improvements, etc. within a scope that can achieve the object of the present invention are also included in the present invention.

Further, in the above embodiment, the welding is performed while the laminate 2 is formed, and then hardened. However, the resin layers 17, 15, 13, and 11 may not be completely cured in the hardening step. For example, the resin layers 17, 15, 13, and 11 can be completely cured at the time of sealing.

Further, in the above embodiment, the resin layer 17 is provided on the side of the semiconductor wafer 16, and the semiconductor wafer 16 with the resin layer 17 is laminated on the substrate 18. But it is not limited to this. For example, as shown in FIG. 6A or 6B, resin layers 17A and 17B may be provided on the semiconductor wafer 16 and the substrate 18, respectively, and the resin layers 17A and 17B may be bonded to each other to constitute the resin layer 17. Further, in FIGS. 6A and 6B, the amount of the solder layer is different. The amount of the solder layer can be arbitrarily selected.

Further, the resin layer 17 may be provided on the substrate 18 side, the resin layer 15 may be provided on the semiconductor wafer 16 side, the resin layer 13 may be provided on the semiconductor wafer 14, and the resin layer 11 may be provided on the semiconductor wafer 12 side.

As shown in Figs. 9A to 9E, in the present invention, the position of the solder layer can be arbitrarily selected within the limits in which the terminals can be soldered to each other. That is, a semiconductor wafer having only a terminal provided with a solder layer on the substrate and having a resin layer as follows may be used. Specifically, it is also possible to use a solder layer buried in a resin layer on a terminal on a substrate side of a semiconductor wafer to which a resin layer is attached. A semiconductor wafer with a resin layer attached thereto. The semiconductor wafer with the resin layer which is the uppermost layer at this time also has a semiconductor layer. 9A to 9C, the positions of the solder layers are different, and the same as FIG. 1A to FIG. 1C. When the steps up to FIGS. 1A to 1C or the steps up to FIGS. 9A to 9C are repeated a plurality of times, a plurality of structures can be formed on one substrate as shown in FIG. 9E. It is desirable to seal and cut it as needed, and it is desirable to obtain a semiconductor device.

Furthermore, in each of the above embodiments, the semiconductor wafer 10 may have a TSV structure.

Further, in each of the above embodiments, a semiconductor device 1 having four semiconductor wafers stacked thereon is described as an example. However, the invention is not limited thereto. The semiconductor wafer may be at least two or more, preferably three or more. The upper limit of the number of laminations of the semiconductor wafer and the resin layer is not particularly limited as long as it can be manufactured within the limits. For example, it can be 2~10, 2~30, etc. Any structure may be used in which a plurality of resin layers and a plurality of semiconductor components are alternately laminated. Further, the number of laminates formed on one substrate is not limited. For example, it can be 1 to 4, 1 to 64, 1 to 256, and the like.

For example, the laminate may be formed by laminating at least a first resin layer, a first semiconductor component, a second resin layer, and a second semiconductor component, and if necessary, a third resin layer or a third semiconductor A part or a plurality of resin layers are laminated with semiconductor parts. Further, each of the pair of semiconductor components and/or the substrate and the semiconductor component that face each other via the resin layer has a connection for electrically connecting the substrate and the semiconductor component and the semiconductor component to each other. It is sufficient that at least one of the terminals for connection to which the terminals are opposed to each other has a solder layer.

Further, in the above embodiments, the terminals 181, 161, 141, and 121 have the solder layers 181A, 161A, 141A, and 121A. However, the present invention is not limited thereto, and the terminals 162, 142, 122, and 101 may have a solder layer on the surface. Further, the terminals 181, 161, 141, and 121 and the terminals 162, 142, 122, and 101 may each have a solder layer on the surface. As long as the opposite terminals can be soldered, the solder layer can be located in one or both of them. The solder layer may be melted and soldered between the substrate 18 and the semiconductor wafers 16, 14, 12, and 10.

Further, in the embodiment, the semiconductor wafer 10 with the resin layer 11 attached thereto is attached to the rolling member 43. However, the present invention is not limited thereto, and the semiconductor wafer 10 with the resin layer 11 attached thereto may not be attached to the rolling member 43. For example, a resin layer 17 in a semi-hardened state may be prepared, and the substrate may be interposed via the resin layer 17. 18 is adhered to the semiconductor wafer 16, and the semiconductor wafer 16 and the semiconductor wafer 14 are adhered via the resin layer 15 in a semi-hardened state, and the semiconductor wafer 14 and the semiconductor wafer 12 are adhered via the resin layer 13 in a semi-hardened state. Next, a laminate including the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, and the semiconductor wafer 12 is placed on the rolling member 44, and then simply laminated on the laminate The semiconductor wafer 10 with the resin layer 11 attached thereon is placed to constitute the laminate 2 . In the laminate 2, since the semiconductor wafer 10 is not heated or pressurized, it is not adhered to the semiconductor wafer 12 via the resin layer 11. Thereafter, the laminate 2 is rolled by the rolling members 44, 43 and heated and welded. Such soldering can be carried out using a flip chip bonding machine.

Further, a plurality of laminates may be prepared in advance by adhering a semiconductor wafer with a resin layer to each other, and a laminate may be formed using the laminate.

For example, the first laminate (two-layer structure) obtained by adhering the semiconductor wafer 10 with the resin layer 11 and the semiconductor wafer 12 with the resin layer 13 adhered to the resin layer 11 may be configured to form the substrate 18 and The first laminate (two-layer structure) in which the semiconductor wafer 16 with the resin layer 17 and the semiconductor wafer 16 and the semiconductor wafer 14 with the resin layer 15 adhered to the resin layers 17 and 15 are laminated, and the first laminate is laminated. The body is attached to the rolling member 43 and the second laminate is placed on the rolling member 44. Alternatively, a three-layer structure upper laminate and a one-layer lower laminate may be prepared. Alternatively, a one-layer structure upper laminate and a three-layer lower laminate may be prepared (in this case, the laminate shown in Fig. 4B is implemented). In this case, there is provided a method of fabricating a semiconductor device comprising the steps of: (A); heating and pressurizing below a temperature at which the solder layer is melted, thereby obtaining n semiconductor components and n resin layers alternately stacked. a laminate obtained by laminating; a soldering step of heating and pressurizing the laminate at a temperature below which the solder layer is melted. That is, it is only necessary to obtain an unwelded laminate before the soldering step. That is, n semiconductor components and n resin layers may be used to form a stack of semiconductor components and resin layers in any number of layers, and/or multiple arrays such as 2 or 3 or 4 sets of semiconductor components. The laminate is formed of a resin layer and laminated on the substrate in an arbitrarily selected order.

Embodiments of the present invention will be described below based on the drawings.

(Second embodiment)

4A to 4C and 5 show a method of manufacturing a semiconductor device in which a four-layer semiconductor component is laminated in a preferred embodiment of the present invention.

14A to 14C show a method of manufacturing a semiconductor device including a three-layer semiconductor component according to a preferred embodiment of the present invention.

The steps of providing the resin layer 17 and the semiconductor component 16 are omitted from FIGS. 4A to 4C, and the resin layer 15 is used as the first resin layer, and is directly placed on the substrate 18, and subsequent steps are sequentially performed to manufacture the FIG. 14A. Fig. 14C shows a semiconductor device including three layers of semiconductor parts.

The steps of providing the resin layers 17 and 15 and the semiconductor components 16 and 14 are omitted from FIGS. 4A to 4C, and the resin layer 13 is directly provided on the substrate 18 as the first resin layer, and subsequent steps are sequentially performed to manufacture the resin layer 13 A semiconductor device containing two layers of semiconductor components.

First, an outline of a method of manufacturing the semiconductor device 1 of the present embodiment will be described.

The method of manufacturing the semiconductor device 1 of the present embodiment includes the steps of preparing the first semiconductor component 16, the second semiconductor component 14, the third semiconductor component 12, the fourth semiconductor component 10, the substrate 18, and the first resin layer 17. a member of the second resin layer 15, the third resin layer 13, and the fourth resin layer 11; a lamination step of obtaining the laminate 2 on the substrate 18; and obtaining a majority on the substrate 18 by repeating the laminating step a step of the laminate 2; and a bonding step.

As shown in FIG. 4A, in the step of preparing a member, a semiconductor wafer (fourth semiconductor component) 10 having a connection terminal for connecting a semiconductor wafer (third semiconductor component) 12 is provided on one side thereof. A semiconductor wafer (third semiconductor component) 12 having a connection terminal for connecting the semiconductor wafer (second semiconductor component) 14 and a connection terminal for connecting the semiconductor wafer (fourth semiconductor component) 10 on the other surface side is provided. A semiconductor wafer having a connection terminal for connecting the semiconductor wafer (first semiconductor component) 16 and a connection terminal for connecting the semiconductor wafer (third semiconductor component) 12 on the other surface side (2nd) a semiconductor device 14 having a connection terminal for connecting the substrate 18 on one side and a connection terminal for connecting a connection terminal of the semiconductor wafer (second semiconductor component) 14 on the other surface side (first semiconductor component) 16. A substrate 18 having a plurality of connection terminals for connecting a semiconductor wafer (first semiconductor component) 16 and a resin layer (first resin layer) 17 and a resin on one side thereof Layer (second resin layer) 15, resin layer (third resin layer) 13, and resin layer (fourth resin layer) 11.

In the laminating step of obtaining the laminate 2, the following steps are carried out: the resin layer 17 and the semiconductor wafer 16 are sequentially laminated on the substrate 18, and the substrate is heated and sandwiched by the resin layer 17 in a semi-hardened state. 18 and the step of bonding the semiconductor wafer 16 , the resin layer 15 and the semiconductor wafer 14 are sequentially laminated on the semiconductor wafer 16 and heated, and the semiconductor wafer 16 and the semiconductor wafer 14 are adhered via the resin layer 15 in a semi-hardened state. The step of sequentially laminating the resin layer 13 and the semiconductor wafer 12 on the semiconductor wafer 14 and heating the semiconductor wafer 14 and the semiconductor wafer 12 via the resin layer 13 in a semi-hardened state, and on the semiconductor wafer 12 The resin layer 11 and the semiconductor wafer 10 are sequentially laminated and then heated, and the semiconductor wafer 12 and the semiconductor wafer 10 are adhered via the resin layer 11 in a semi-hardened state. According to this method, a stack of at least the semiconductor wafer 10, the resin layer 11, the semiconductor wafer 12, the resin layer 13, the semiconductor wafer 14, the resin layer 15, and the semiconductor wafer 16 and the resin layer and the semiconductor wafer are alternately laminated can be obtained. Layer 2

Further, a plurality of laminates 2 can be obtained on the substrate 18 by repeating the above-described lamination step on the substrate 18.

Next, a pair of rolling members 52, 53 are prepared in the welding step, and a plurality of laminated bodies 2 laminated on the substrate 18 are placed on one of the rolling members 53. Thereafter, the base material 18 and the plurality of laminates 2 are pressed and heated by the other rolling member 52 and the one of the rolling members 53 to be welded. At the same time as the bonding, the substrate 18 and the plurality of laminates 2 are pressurized with a fluid and heated as described above, whereby the resin layer 11, the resin layer 13, the resin layer 15, and the resin layer 17 are cured. Thereby a structure is obtained.

Next, a method of manufacturing the semiconductor device 1 of the present embodiment will be described in detail with reference to FIGS. 4A to 4C, 5 and 2, and FIGS. 3A and 3B.

(Steps for preparing components)

First, as shown in FIG. 4A, a semiconductor wafer 16 and a substrate 18 are prepared. The material prepared in this step of the present embodiment is the same as the material of the first embodiment described above, and the preferred embodiment is also the same. Therefore, the detailed description thereof will be omitted.

(step of obtaining a laminate)

Next, lamination is carried out as shown in Figs. 4A and 4B. In this embodiment, in the present embodiment, the step of adhering the semiconductor wafer 10 with the resin layer 11 to the semiconductor wafer with the resin layer is carried out in the same manner as the method of bonding the semiconductor wafer with the resin layer, and the stack of the first embodiment is used. The layer method is the same. That is, the method of attaching the semiconductor wafers with the three resin layers to the first layer is the first one. The method of the embodiment is the same, and the exemplary or ideal conditions or examples are the same as those of the first embodiment. In the meantime, a method of adhering up to three sets of semiconductor wafers with a resin layer attached thereto will be briefly described, and detailed description thereof will be omitted.

First, the resin layer 17 and the semiconductor wafer 16 are sequentially laminated on the substrate 18, and then pressed and heated by a pair of rolling members, and the substrate 18 and the semiconductor wafer 16 are adhered via the resin layer 17 in a semi-hardened state. .

Next, the surface of the semiconductor wafer 16 on which the terminal 161 is provided is opposed to the resin layer 15, and the semiconductor wafer 14 is laminated on the semiconductor wafer 16 via the resin layer 15.

Thereafter, the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, and the semiconductor wafer 14 are pressed and heated by a pair of rolling members, and the semiconductor wafer is placed through the resin layer 15 in a semi-hardened state (B stage). 16 and the semiconductor wafer 14 are adhered.

Next, the surface of the semiconductor wafer 14 on which the terminal 141 is provided is opposed to the resin layer 13, and the semiconductor wafer 12 is laminated on the semiconductor wafer 14 via the resin layer 13.

Thereafter, the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, and the semiconductor wafer 12 are pressed and heated by a pair of rolling members, and are semi-hardened (B stage) The resin layer 13 adheres the semiconductor wafer 14 and the semiconductor wafer 12. In this manner, heating is performed each time at a temperature lower than the melting of the solder layer, and a laminate obtained by adhering three sets of semiconductor wafers with a resin layer is obtained.

Before the adhesion described above, the substrate or the semiconductor wafer having the resin layer may be subjected to a pre-heat treatment as needed.

Next, a semiconductor wafer with a resin layer disposed at the uppermost portion of the semiconductor component is adhered. In the present embodiment, the semiconductor wafer with the resin layer disposed at the uppermost portion is also heated by being heated at a temperature lower than the temperature at which the solder layer is melted. Here, it is also necessary to preheat the substrate or the semiconductor wafer having the resin layer as needed for the adhesion front view.

In this manner, the substrate 18 is subjected to the same method as the above-described method, and the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, the semiconductor wafer 12, the resin layer 11, and the semiconductor wafer 10 are obtained. The laminate 2 is formed by alternately laminating a resin layer and a semiconductor component.

Specifically, as shown in FIG. 4B, a semiconductor wafer having a resin layer attached thereto is adhered. The surface of the semiconductor wafer 12 of the laminate in which the terminal 121 is provided faces the resin layer 11 of the semiconductor wafer 10 with the resin layer 11, and the semiconductor wafer 10 is laminated on the semiconductor wafer 12 via the resin layer 11.

At this time, it is preferable to confirm that the alignment marks formed on the semiconductor wafer 12 and the alignment marks formed on the semiconductor wafer 10 are aligned.

After the alignment, the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, the semiconductor wafer 12, the resin layer 11, and the semiconductor wafer 10 are heated by a semi-hardened state ( The resin layer 11 of the B stage) adheres the semiconductor wafer 12 and the semiconductor wafer 10. At this time, in the same manner as the previous bonding step, the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, the semiconductor are sandwiched by the rolling member by one of the built-in heaters. The wafer 12, the resin layer 11, and the semiconductor wafer 10 are heated. At the same time as heating, the semiconductor wafer 12 and the semiconductor wafer 10 can be adhered by pressing and applying a load to the pair of rolling members. For example, the semiconductor wafer 12 and the semiconductor wafer 10 are adhered to the atmosphere under atmospheric pressure using a flip chip bonding machine. The heating temperature at this time can also be selected in the desired temperature or time in the previous bonding step. For example, the heating temperature is not particularly limited as long as the thermosetting resin of the resin layer 11 is not completely cured, and is preferably lower than the curing temperature of the thermosetting resin.

Whether or not the position of the semiconductor wafer 10 with respect to the semiconductor wafer 12 after adhesion is correct can be confirmed using, for example, an X-ray microscope or an infrared microscope.

Thereby, at least the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, the semiconductor wafer 12, the resin layer 11, and the semiconductor wafer 10 can be obtained on the substrate 18, and the resin layer and the semiconductor can be obtained. The laminate 2 in which the parts are alternately laminated (Fig. 4C).

Such a method can repeat the above steps in accordance with the number of connection terminals provided on the substrate 18.

That is, a plurality of laminates 2 can be obtained on the substrate 18 by repeating the above-described lamination step on the substrate 18 as described above. When a plurality of laminates are formed, a plurality of laminates may be formed by forming a second laminate after completion of formation of one laminate.

Alternatively, a first resin layer 17 having the same number of the plurality of laminates as the target number or a first resin layer 17 adhered to the semiconductor wafer may be provided on the substrate 18, and for the resin layer or the semiconductor The bonding steps of the wafers are performed simultaneously or sequentially. In the latter method, a plurality of laminates can be produced in a short time.

Further, in this step, the solder layers 121A, 141A, 161A, and 181A are not melted. The terminals 101 and 121 are mutually connected to each other, 122 and 141, the terminals 142 and 161 are mutually connected, and the terminals 162 and 181 are not welded to each other. Further, the terminal 122 and the solder layer 141A may or may not be in contact with each other. Further, a resin of the resin layer 13 may be interposed between the terminal 122 and the solder layer 141A. The terminal 142 and the solder layer 161A and the terminal 162 and the solder layer 181A are identical to each other.

(welding step)

Next, the soldering between the terminals is performed. The substrate 18 obtained in the above step and the laminate 2 on the substrate 18 are heated to weld between the terminals 101 and 121, between the terminals 122 and 141, between the terminals 142 and 161, and between the terminals 162 and 181. Fig. 5 shows the device 5 which can be used in this step, and the laminate (structure) after the welding step before the device 5 is taken out.

Here, in the bonding step, the inter-terminal soldering refers to the following case. The substrate 18 and the laminate 2 laminated on the substrate 18 are heated to a temperature equal to or higher than the melting points of the solder layers 121A, 141A, 161A, and 181A, so that the semiconductor wafers 10 and 12, the semiconductor wafers 12 and 14 and the semiconductor are Each of the solder layers 121A, 141A, 161A, 181A used for bonding between the wafers 14 and 16 and between the semiconductor wafer 16 and the substrate 18 is melted, and at the same time, the terminals 101 and 121 are mutually connected, the terminals 122 and 141 are mutually connected, and the terminals 142 and 161 are mutually connected. The terminals 162 and 181 are connected to each other with a solder layer interposed therebetween.

The device used for welding can be arbitrarily selected. For example, the device 5 shown in Fig. 5 can be used here. The apparatus 5 includes a container 51 into which a fluid is introduced, and a pair of hot plates (rolling members) 52 and 53 disposed in the container 51.

The container 51 is a pressure vessel, and the material of the container 51 may be metal or the like, for example, stainless steel, titanium, or copper.

The hot plates 52 and 53 are press plates having a heater inside, and the base plates 18 provided above the hot plates 53 and the laminate 2 laminated on the base material 18 are pressed by the hot plates 52 and 53. The hot plate 53 is formed with a pin. This pin penetrates the plate member (the portion where the base material 18 and the laminated body 2 are provided) 55. When the sheet 55 is pressed against the laminate 2, it slides on the pin and contacts the hot plate 52.

The temperature of the hot plate 52 is preferably set to be higher than the temperature of the hot plate 53. For example, the temperature of the hot plate 52 is preferably set to be higher than the hot plate 53 by 20 ° C or more. More preferably, it is preferably 50 ° C or more and 200 ° C or less. The hot plate 52 is a temperature above the melting point of the solder layers 121A, 141A, 161A, 181A and the hot plate 53 The temperature is lower than the melting point of the solder layers 121A, 141A, 161A, and 181A. The temperature can be selected as needed, but as an example, the temperature of the hot plate 53 is generally 80 to 220 ° C, preferably 120 to 180 ° C, and the temperature of the hot plate 52 is generally 200 to 400 ° C, preferably 240 to 320 ° C.

First, the hot plates 52, 53 are heated to a predetermined temperature in advance. The sheet 55 is separated from the hot plate 53. A substrate 18 and a laminate 2 laminated on the substrate 18 are provided on the plate member 55. Next, a fluid is introduced into the container 51 via the pipe 511. The fluid is preferably a gas such as air, a passive gas (nitrogen, a rare gas), or the like.

Thereafter, while the substrate 18 and the laminate 2 are pressurized by the fluid, the plate member 55 is slid on the pin 54 and moved thereon, and the substrate 18 and the laminate 2 laminated on the substrate 18 are The hot plate 52 and the plate 55 are pressed in the lamination direction.

The substrate 18 and the laminate 2 are heated to a temperature equal to or higher than the melting points of the solder layers 121A, 141A, 161A, and 181A, and between the terminals 101 and 121, between the terminals 122 and 141, between the terminals 142 and 161, and between the terminals 162 and 181. welding.

The substrate 18 and the laminate 2 are pressed by the hot plate 52 and the plate member 55, and the resin is sandwiched between the terminal 101 and the solder layer 121A (and between the terminal 122 and the solder layer 141A, between the terminal 142 and the solder layer 161A). In the case of the terminal 162 and the solder layer 181A, the resin 101 can be excluded from the solder 101 and the solder layer 121A (and the terminal 122 and the solder layer 141A, the terminal 142 and the solder layer 161A, and the terminal 162 and the solder layer 181A). It is reliably contacted by the solder layer and can be stably welded.

The pressing force when the substrate 18 and the laminate 2 laminated on the substrate 18 are pressurized by a fluid can be arbitrarily selected. It is preferably 0.1 MPa or more and 10 MPa or less, more preferably 0.3 MPa or more and 7 MPa or less, still more preferably 0.5 or more and 5 MPa or less. By pressurizing the substrate 18 and the laminate 2 with a fluid, it is possible to suppress the occurrence of voids in the resin layers 11, 13, 15, and 17. In particular, by setting it to 0.1 MPa or more, this effect becomes remarkable. In addition, by setting it to 10 MPa or less, it is possible to suppress an increase in size and complexity of the apparatus. Further, pressurization with a fluid means that the pressure of the gas atmosphere of the laminate 2 is increased to a portion higher than the atmospheric pressure by the applied pressure. That is, the application pressure of 10 MPa means that the pressure applied to the laminate 2 is 9 MPa larger than the atmospheric pressure. Further, the hardening of the resin layer can be completely completed in this step, and the hardening can be completed in any sealing step.

Here, the laminate 2 is heated above the melting points of the solder layers 121A, 141A, 161A, and 181A. The heating temperature can be arbitrarily selected from the temperature above the melting point of the solder layer. For example, the temperature at which the welding can be used in the first embodiment can also be used in the present embodiment. For example, it can be heated at 240 ° C ~ 300 ° C for about 1 second to 10 minutes. By such heating, the solder layers 121A, 141A, 161A, and 181A can be melted and soldered. Further, when the melting points of the solder layers 121A, 141A, 161A, and 181A are different, the substrate 18 and the laminate 2 thereon may be heated to the melting point or higher of the solder layer having the highest melting point.

Thereafter, the hot plate 52 and the plate member 55 are separated, and the fluid is discharged from the container 51.

By the above discharge, the pressing of the substrate 18 and the laminate 2 by the fluid is stopped, and then the substrate 18 and the laminate 2 are taken out from the container 51. Also, in this step, the resin layer may be completely hardened or not completely cured.

In this manner, 1 or a plurality of laminates 2 are provided on the substrate 18, and the substrate 18 is welded to the terminals of the laminate 2, and as a result, the structure 3 is obtained (refer to FIG. 3A).

Further, in the soldering step, when the resin layers 11, 13, 15, 17 are not completely cured, the hardening of the resin layers 11, 13, 15, 17 can be progressed by using the apparatus 6 shown in Fig. 2. Since the device 6 has been described in the first embodiment, the description thereof will be omitted. The ideal conditions can also be used in the ideal conditions of the first embodiment.

In the above manner, the structural body 3 (Fig. 3A) in which the semiconductor wafers 10 and 12, the semiconductor wafers 12 and 14 and the semiconductor wafers 14 and 16 and the semiconductor wafer 16 and the substrate 18 are welded to each other is obtained. The ideal conditions and the like of the structure 3 or each layer or the laminate of the first embodiment can be similarly used in the present embodiment unless otherwise specified. Therefore, the description thereof will be omitted.

(sealing step)

Next, the sealing member is used to seal the structure 3, and after sealing, the structures 3 are cut one by one, whereby the semiconductor device 1 shown in Fig. 3B can be obtained.

The method of sealing or cutting can be carried out in the same manner as in the conditions or examples described in the first embodiment. Therefore, the description thereof will be omitted.

According to the above embodiment, the following effects can be exhibited.

In the present embodiment, the resin layer 17 and the semiconductor wafer 16 are sequentially laminated and heated on the substrate 18, and the substrate 18 and the semiconductor wafer 16 are adhered via the resin layer 17 in a semi-hardened state, and are bonded to the semiconductor wafer. The resin layer 15 and the semiconductor wafer 14 are sequentially laminated and heated, and the semiconductor wafer 16 and the semiconductor wafer 14 are adhered via the resin layer 15 in a semi-hardened state, and the resin layer 13 and the semiconductor wafer are placed on the semiconductor wafer 14. 12 is sequentially laminated and heated, and the semiconductor wafer 14 and the semiconductor wafer 12 are adhered via the resin layer 13 in a semi-hardened state, and the resin layer 11 and the semiconductor wafer 10 are sequentially laminated on the semiconductor wafer 12, and then heated. The semi-hardened resin layer 11 adheres the semiconductor wafer 12 and the semiconductor wafer 10, whereby at least the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, and the semiconductor wafer 12 are obtained on the substrate 18. The resin layer 11 and the semiconductor wafer 10 are laminated, and the resin layer and the semiconductor wafer are alternately laminated. Thereafter, a pair of rolling members 52, 53 are prepared, and a substrate 18, a resin layer 17, a semiconductor wafer 16, a resin layer 15, a semiconductor wafer 14, a resin layer 13, and a semiconductor wafer are placed over one of the rolling members 53. 12. After the resin layer 11 and the laminate 2 composed of the semiconductor wafer 10, the substrate 18 and the substrate 18 are laminated on the substrate 18 by using another pressing member, that is, the sheet material 55 and the one of the pressing members, that is, the hot plate 52. The laminate 2 is pressed, heated and welded. Therefore, thermal damage applied to the substrate 18 and the semiconductor wafers 16, 14, 12, and 10 can be reduced as compared with the prior art. Therefore, the reliability of the semiconductor device 1 can be improved.

Further, the resin layer 17 and the semiconductor wafer 16 are sequentially laminated and heated on the substrate 18, and the substrate 18 and the semiconductor wafer 16 are adhered via the resin layer 17 in a semi-hardened state, and the resin layer is formed on the semiconductor wafer 16. 15. The semiconductor wafers 14 are sequentially laminated, and the semiconductor wafer 16 and the semiconductor wafer 14 are heated by a resin layer 15 in a semi-hardened state, and the resin layer 13 and the semiconductor wafer 12 are sequentially laminated on the semiconductor wafer 14. Thereafter, the semiconductor wafer 14 and the semiconductor wafer 12 are adhered by heating and sandwiching the resin layer 13 in a semi-hardened state, and the resin layer 11 and the semiconductor wafer 10 are sequentially laminated on the semiconductor wafer 12, and then heated and sandwiched in a semi-hardened state. The resin layer 11 adheres the semiconductor wafer 12 and the semiconductor wafer 10. Thereby, at least the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, the semiconductor wafer 12, the resin layer 11, and the semiconductor wafer 10 are obtained on the substrate 18, and the resin layer and the semiconductor wafer are obtained. A laminate laminated alternately. Thereafter, a pair of rolling members 52, 53 are prepared, one of which is pressed After the substrate 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, the resin layer 13, the semiconductor wafer 12, the resin layer 11, and the semiconductor wafer 10 are placed on the upper surface of the member 53, The base material 18 and the laminated body 2 laminated on the base material 18 are pressed and heated by the other pressing member, that is, the sheet material 55 and the one of the pressing members, that is, the hot plate 52, while the terminals 181 and 162 are mutually The terminals 161 and 142 are soldered to each other, the terminals 141 and 122 are mutually connected, and the terminals 121 and 101 are connected to each other. Therefore, the productivity at the time of soldering can be improved compared to the case where the semiconductor parts are soldered to each other and a plurality of semiconductor parts are laminated at the same time.

Further, in the present embodiment, when the laminate 2 is obtained, the semiconductor wafer to which the resin layer is attached is heated on the substrate 18 each time. The heating at this time is for heating the substrate and the semiconductor wafer and the semiconductor wafer to each other by the resin layer. Therefore, the heating time is short and the heating temperature is low. Therefore, even if the step of obtaining the laminate 2 is carried out, the productivity can be improved over the conventional manufacturing method.

Further, in the present embodiment, the laminated body 2 is rolled and welded.

In the past, it was rolled and welded each time a semiconductor wafer was laminated. Therefore, the underlying semiconductor wafer is subjected to multiple rolling and is easily damaged.

On the other hand, in the present embodiment, a pair of rolling members are prepared, and the base material 18, the resin layer 17, the semiconductor wafer 16, the resin layer 15, the semiconductor wafer 14, and the resin layer 13 are laminated on one of the rolling members. The semiconductor wafer 12, the resin layer 11, and the semiconductor wafer 10 are welded by heating and heating the entire substrate 18 and the laminate 2 on the substrate 18 by one of the pressing members and the other pressing member. Therefore, it is possible to avoid multiple pressing during soldering, and it is possible to reduce damage to the substrate 18, the semiconductor wafers 16, 14, 12, and 10.

Further, in the present embodiment, after the terminals 181 and 162 of the laminate 2, the terminals 161 and 142, the terminals 141 and 122, and the terminals 121 and 101 are welded to each other, the structure 3 is fluidly connected. The resin layers 17, 15, 13, and 11 are hardened by pressurization and heating. By pressurizing the structure 3 with a fluid, it is possible to prevent voids from occurring in the resin layers 17, 15, 13, and 11 of the structure 3. Further, by pressurizing the structure 3 with a fluid, the pores in the resin layers 17, 15, 13, and 11 of the structure 3 are pressurized and reduced. From the above, it is possible to prevent the positional deviation of the terminals from each other due to the voids. Further, it is possible to prevent the resin layers 17, 15, 13, and 11 from being extruded from the pores. Set 6 pollution.

In the step of preparing the laminate 2, when the semiconductor wafer with the resin layer is laminated, if it is carried out under atmospheric pressure, for example, a gas enters the interface between the resin layer 17 and the semiconductor wafer 16, and is formed in the resin layer 17. The case of pores. However, as described above, when the laminate is cured, the pores can be reduced by pressurization, so that the step of preparing the laminate 2 can be carried out under vacuum or the like without being carried out under vacuum. Therefore, the manufacturing efficiency of the semiconductor device 1 can be improved while reducing the manufacturing cost.

Further, in the present embodiment, in the step of preparing the laminate 2, the substrate 18 and the semiconductor wafer 16 are adhered via the resin layer 17 in a semi-hardened state. Similarly, the semiconductor wafers 16 and 14 are adhered via the resin layer 15 in a semi-hardened state, and the semiconductor wafers 14 and 12 are adhered via the resin layer 13 in a semi-hardened state, and the semiconductor wafers 12 and 10 are interposed. The resin layer 11 in a semi-hardened state is adhered. In this way, since the semiconductor wafers are adhered to each other, it is possible to prevent the semiconductor wafers from being displaced from each other in the laminated body 2.

When the semiconductor wafers 12 and 10 are adhered via the resin layer 11 in a semi-hardened state, and the semiconductor wafers 14 and 12 are adhered to each other via the resin layer 13 in a semi-hardened state, the substrate 18 and the semiconductor wafer 16 are bonded. 14, 14 or 12 times heated. However, since the semiconductor wafers are adhered to each other by the resin layer in a semi-hardened state, the heating temperature can be set low, and even if the heating temperature is increased, the heating time is short. Therefore, it is considered that the influence of heat on the substrate 18 and the semiconductor wafers 16, 14, 12 is very small.

Further, in the present embodiment, the resin layer 17 is provided on the semiconductor wafer 16 in the front stage of the laminated body 2. Similarly, a resin layer 15 is provided on the semiconductor wafer 14, and a resin layer 13 is provided on the semiconductor wafer 12. The semiconductor wafers 16, 14, and 12 are all TSV structures and have a very small thickness. However, by providing the resin layers 17, 15, and 13, respectively, it is possible to prevent the semiconductor wafers 16, 14, and 12 from warping, and it is possible to be operable. Excellent.

Further, in the present embodiment, a semiconductor wafer of a TSV structure having a very small thickness is laminated on a substrate 18. Therefore, in the case where the semiconductor wafers of the TSV structure having a very small thickness are laminated on each other, the operability is excellent.

Further, in the present embodiment, the base material 18 is welded to the plurality of laminated bodies 2, sealed, and then cut. Thereby, the productivity of the semiconductor device 1 can be improved.

Further, the present invention is not limited to the above-described embodiments, and modifications, improvements, etc. within a scope that can achieve the object of the present invention are also included in the present invention.

Further, in the above embodiment, the laminate 2 is formed on the substrate 18, and welding is performed and then cured. However, in the hardening step, the resin layers 17, 15, 13, and 11 may not be completely cured. For example, the resin layers 17, 15, 13, and 11 can be completely cured at the time of sealing.

Further, in the above embodiment, the resin layer 17 is provided on the side of the semiconductor wafer 16 and the semiconductor wafer 16 with the resin layer 17 is laminated on the substrate 18. However, it is not limited to this. For example, as shown in FIG. 6A or 6B, the resin layers 17A and 17B may be provided on the semiconductor wafer 16 and the substrate 18, and the resin layer 17 may be formed by the resin layers 17A and 17B.

Further, the resin layer 17 may be provided on the substrate 18 side, the resin layer 15 may be provided on the semiconductor wafer 16 side, the resin layer 13 may be provided on the semiconductor wafer 14, and the resin layer 11 may be provided on the semiconductor wafer 12 side.

In the present invention, the position of the solder layer can be arbitrarily selected within the limits in which the terminals can be soldered to each other. The above examples or conditions can also be used in the ideal examples or conditions.

For example, as shown in FIGS. 10A to 12F, only a terminal is provided on the substrate without providing a semiconductor layer, and a semiconductor wafer with a resin layer as described below is used. Specifically, a semiconductor wafer with a resin layer having a solder layer buried in a terminal on the substrate side of the semiconductor wafer to which the resin layer is attached and which is filled in the resin layer may be used. The semiconductor wafer 10 with the resin layer as the uppermost layer at this time also has the solder layer 101A.

The method shown in Figs. 10A to 10D is substantially the same as the method shown in Figs. 4A to 4C, Fig. 5, Fig. 3A or Fig. 3B except for the position of the solder layer.

Further, in addition to the position of the solder layer, FIGS. 11A to 11E and FIGS. 12A to 12F are different from those shown in FIGS. 4A to 4C in the following points.

11A to 11E show a method of manufacturing a plurality of laminates at about the same time except for the position of the semiconductor layer, and the method shown in Figs. 4A to 4C, 5, 3A or 3B. different. Further, the semiconductor bonding step of Fig. 11D may be performed as needed. 11A to 11C show that a plurality of semiconductor wafers with a resin layer are sequentially disposed one by one for a plurality of terminals on a substrate, and after the step is completed, a semiconductor wafer with a resin layer is sequentially disposed one by one for the semiconductor wafer, and this is repeated. The status of the operation. However, it is also possible to employ a method in which a plurality of semiconductor wafers with a resin layer are once disposed on a predetermined substrate or a semiconductor wafer and the operation is repeated.

12A to 12F show the method of manufacturing a plurality of laminates at the same time and the point of soldering each of the laminates in addition to the positions of the solder layers, and FIGS. 4A to 4C, FIG. 5, and The method shown in Fig. 3A or Fig. 3B is different. The method shown in Figs. 11A to 11E differs in the point at which each laminate of the welding system is performed, and the other points or conditions are the same.

Further, in the above embodiment, the semiconductor wafer 10 may have a TSV structure.

Further, in each of the above embodiments, the semiconductor device 1 in which four semiconductor wafers are manufactured is described as an example. However, the invention is not limited thereto. The semiconductor wafer may be at least two or more, preferably three or more. The upper limit of the number of the semiconductor wafer and the resin layer is not particularly limited as long as it is within the limit of manufacture. It is sufficient to have a structure in which a plurality of resin layers and a plurality of semiconductor parts are alternately laminated.

In other words, the laminate system is obtained by laminating at least a first resin layer, a first semiconductor component, a second resin layer, a second semiconductor component, a third resin layer, and a third semiconductor component on a substrate. Further, each of the pair of semiconductor components and/or the substrate and the semiconductor component facing each other via the resin layer is provided with a connection terminal for electrically connecting the substrate and the semiconductor component and the semiconductor component to each other, and the connection is opposite thereto. At least one of the terminals for connection is a laminate having a solder layer.

Further, in the above embodiment, the terminals 181, 161, 141, and 121 have the solder layers 181A, 161A, 141A, and 121A. However, the present invention is not limited thereto, and the terminals 162, 142, 122, and 101 may have a solder layer on the surface. Further, the terminals 181, 161, 141, and 121, and the terminals 162, 142, 122, and 101 may each have a solder layer on the surface. The solder layer may be located in one or both as long as the opposing terminals are solderable. The solder layers may be melted and soldered between the substrate 18 and the semiconductor wafers 16, 14, 12, and 10.

Example

Specific examples of the production method of the present invention are shown below. However, the invention is not limited to the specific examples.

(Example 1) 1. Production of resin film (resin layer)

9 g of phenol novolac resin (Sumitomo Electric Wood, model: PR-55617), 26.8 g of liquid bisphenol A type epoxy resin (manufactured by Dainippon Ink and Chemicals, model: EPICLON-840S), and reduced phenolphthalein 9 g (Tokyo Chemical Co., Ltd.) Industrial Co., Ltd.), bisphenol A type phenoxy resin 14.8g (manufactured by Dongdu Chemical Co., Ltd., model: YP-50), 2-phenyl-4-methylimidazole 0.1g (manufactured by Shikoku Chemical Industry Co., Ltd., model: 2P4MZ), β-(3,4-epoxycyclohexyl)ethyltrimethoxydecane 0.5g (manufactured by Shin-Etsu Chemical Co., Ltd., model: KBM-403), and spherical cerium oxide filler 40g (manufactured by Admatechs Co., Ltd.) Model: SC1050, average particle diameter 0.25 μm) was dissolved in methyl ethyl ketone and stirred to obtain a resin varnish having a solid concentration of 50% by weight.

This resin varnish was applied to a polyester film (manufactured by Toray Industries, Inc., model: Lumirror), and dried at 100 ° C / 5 min to obtain a resin film having a resin thickness of 26 μm.

The resin film has a melt viscosity of 1,200 Pa at 80 ° C. s, the melt viscosity at 150 ° C is 230Pa. s.

Further, the resin varnish was dried in a state of being dried at 100 ° C for 5 minutes to a semi-cured state (clear liquid form → film form). Further, the resin varnish may be dried at 60 ° C to 180 ° C depending on the time, and the curing temperature of the obtained film may be in the range of 120 ° C to 250 ° C depending on the curing time.

2. Fabrication of a wafer with a resin film

An 8-inch wafer having a dicing film is prepared. The germanium wafer has a thickness of 100 μm. On the side of the wafer on which the dicing film is formed, a majority is formed A bonding pad of 40 μm and a height of 10 μm is formed with Ni/Au plating on the surface of the pad.

On the opposite side to the surface on which the dicing film is formed, there is A plurality of copper bumps of 40 μm and a height of 8 μm were formed to protrude, and a Sn-3.5Ag solder layer having a thickness of 6 μm was formed thereon. The solder layer had a melting temperature of 221 °C.

Further, the unexposed portion of the copper bump is guided through the front and back of the wafer and forms a TSV (Through Silicon Via) structure. Further, the bonding pad and the copper bump are in contact with each other in a predetermined combination.

Further, the protruding portion of the copper bump and the bonding pad function as the terminal for connection according to the present invention.

The resin film was laminated on an 8-inch wafer to form copper under conditions of 95 ° C / 30 sec / 0.8 MPa using a vacuum laminator (model: MVLP-500/600-2A). The side of the bump.

Next, using a cutting device (Disco, model: DFD-6340), the laminate (cut film/矽 wafer/resin film) was cut under the following conditions to obtain a square shape of 6 mm and a solder bump number of 1,089 ( A majority of the bumps have a resin film of a tantalum wafer with a bump pitch of 180 μm and an area array arrangement.

<Cutting conditions>

Cutting speed: 20mm/sec

Mandrel speed: 40,000 rpm

Blade number: ZH05-SD 3500-N1-50 BB (Disco (share) system)

3. Preparation of the substrate

Prepared to be formed on one side 4,356 矽 substrate blocks with 40 μm and 10 μm height pads. Ni/Au plating was formed on the surface of the pad of the ruthenium substrate block, and the size thereof was 20 mm square and the thickness was 0.4 mm. The ruthenium substrate block is formed with a TSV (Through Silicon Via) that conducts the front and back of the ruthenium substrate. Further, the tantalum substrate block system has an aggregate of four tantalum substrates having a size of 10 mm square and a number of pads of 1,089 (pad pitch of 180 μm and area array arrangement).

4. Fabrication of laminate

The tantalum wafer was laminated on the tantalum substrate block in the following manner using a flip chip bonding machine (manufactured by Panasonic Factory Solutions Co., Ltd., model: FCB3).

The underside pedestal of the flip chip bonding machine (one of the rolling members) was set to 100 ° C, and the ruthenium substrate block was placed thereon. Next, the tantalum wafer with the resin film attached thereto was adsorbed to a bonding tool (another rolling member) set to 150 °C. Then, the ruthenium substrate block and the ruthenium wafer with the resin film were aligned by a flip-chip bonding machine, and laminated under a load of 5 N / 2 sec to obtain (矽 substrate block / resin film / 矽Wafer) laminate. In addition, the 矽 substrate block system includes an assembly of four ruthenium substrates. However, any one of these areas is loaded with a germanium wafer with a resin film.

Then, the laminate (the substrate block/resin film/germanium wafer) obtained above was taken out first, and then placed on a lower pedestal of 100 ° C in a flip chip bonding machine. The other ruthenium wafer with the resin film is adsorbed to the bonding tool set at 150 ° C, and the ruthenium wafer in the laminate is aligned with the ruthenium wafer with the resin film by the above-mentioned camera under the flip chip bonding machine. The laminate was laminated under the conditions of a load of 5 N/2 sec. As a result, a two-stage laminate type (矽 substrate block / resin film / tantalum wafer / resin film / tantalum wafer) laminate (laminate (I)) was obtained.

5. Welding of laminates

Bonding between the layers (solder bumps/pads) of the laminate (I) was carried out using a flip chip bonding machine. The lower pedestal of the flip chip bonding machine was set to 100 ° C, and the laminate (I) was loaded. The laminate (I) was pressurized under a load of 50 N/12 sec with a bonding tool set at 150 ° C, and then the temperature of the bonding tool was rapidly increased. That is, the bonding tool was set to a temperature of 280 ° C, and pressed at 50 N / 12 sec, and the layers (solder bumps / pads) were soldered to obtain (矽 substrate block / resin film / tantalum wafer / resin film /矽 wafer) laminate (structure).

In the same manner as described above, three sets of laminates were formed in other regions of the ruthenium substrate block. Specifically, the combination of the step of laminating the tantalum wafer with the resin film and the step of soldering is repeated three times, and the tantalum wafer is laminated and soldered on all the tantalum substrates of the tantalum substrate block to obtain 2 A laminate of a segment laminate type (laminate (II)). Further, when each welding is performed, the pressurization system is performed one by one for each of the laminates.

Further, the laminate (I) and the laminate (II) are laminates formed in the same manner.

Secondly, in order to complete the hardening of the resin layer, pressurization is used. Heating device (made by Synergy Engineering Co., Ltd., model: HPV-5050MAH-D), four sets of laminates (laminate (I) and three laminates (II)) formed on one substrate It is hardened by pressure. The pressurized fluid was press-hardened using air at 180 ° C / 2 hr / 0.8 MPa to obtain a laminate (laminate (III)).

6. Sealing and cutting

The laminate (III) was transferred using a transfer molding machine at a mold temperature of 175 ° C and an injection pressure of 7.8 MPa. The curing time was 2 minutes, and the epoxy resin sealing material (Sumitomo Electric Wood, model SUMIKON EME-G770) was sealed and formed. Thereafter, the film was cured at 175 ° C for 2 hours to obtain a semiconductor device assembly.

Next, using a cutting device, the semiconductor device assembly was cut under the following conditions to obtain a 10 mm square semiconductor device.

<Cutting conditions>

Cutting speed: 2mm/sec

Mandrel speed: 30,000 rpm

Blade number: ZH05-SD 3500-N1-50 DD

7. Evaluation of semiconductor devices

The obtained semiconductor device was embedded in epoxy resin, and the cross section was observed by a scanning electron microscope (SEM). As a result, the soldering between the (substrate and wafer) and the (tray/germanium wafer) was good, and no crack of the tantalum wafer was observed. Further, no void was observed in the resin layer between (矽 substrate/矽 wafer) and (矽 wafer/矽 wafer).

(Example 2) 1. Fabrication of laminate

The tantalum wafer with the resin film used in Example 1 was laminated on the tantalum substrate block used in Example 1 using a flip chip bonding machine.

The lower pedestal of the flip chip bonding machine was set to 100 ° C, and the ruthenium substrate block was mounted thereon. Next, the tantalum wafer with the resin film attached thereto was adsorbed to a bonding tool set at 150 °C. Thereafter, the ruthenium substrate block and the ruthenium wafer were aligned by a flip chip bonding machine and stacked, and laminated under the condition of a load of 5 N/2 sec. As a result, a (矽 substrate block / resin film / tantalum wafer) laminate was obtained. Further, the tantalum substrate block system is an assembly of four tantalum substrates, but a tantalum wafer with a resin film is placed in any one of the regions.

Further, the remaining three regions of the substrate block were also subjected to the same procedure as described above, and a tantalum wafer with a resin film was laminated one by one to obtain a laminate.

Next, the laminate obtained in the above-mentioned one stage was placed on a side pedestal set to be lower than 100 °C. Another tantalum wafer with a resin film attached thereto was adsorbed to a bonding tool set at 150 °C. Thereafter, the tantalum wafer in the above laminate was aligned with the tantalum wafer with the resin film by a flip-chip bonding machine, and laminated under the condition of a load of 5 N/2 sec to obtain a stack of two stacked layers. Layer body.

In the same manner as described above, the remaining three regions of the laminate are laminated one by one, and the tantalum wafer 2 with the resin film is attached to each of the tantalum substrate regions of the tantalum substrate. Segment 2 is stacked one by one. In this way, four sets of laminates (laminates (IV)) were obtained.

2. Welding of laminate (IV)

The bonding between the layers (solder bumps/pads) laminated on the substrate of the predetermined region is performed on any one of the four sets of the laminates (IV) by using a flip chip bonding machine. The lower pedestal of the flip chip bonding machine was set to 100 ° C, and four sets of laminates (IV) were loaded.

The laminate (IV) of any one of the laminates (IV) located on the crucible substrate was pressurized under a load of 50 N/12 sec with a bonding tool set at 150 ° C, and then the bonding tool was rapidly heated. . That is, the bonding tool was set to have a temperature of 280 ° C and pressed at 50 N / 12 sec to weld the respective layers (solder bumps/pads) of the laminate.

In the same manner as the above-described pressure heating, the bonding between the layers (the solder bumps/pads) of the three laminated bodies laminated on the substrate of the remaining three regions is sequentially performed to obtain a film formed on one substrate. Four two-stage laminate type laminates (laminate (V)) (structure).

Next, in order to complete the hardening of the resin layer, the pressurization used in Example 1 was used. The heating device pressurizes the laminate (V) under pressure. The pressurized fluid was press-hardened using air at 180 ° C / 2 hr / 0.8 MPa to obtain a laminate (laminate (VI)).

3. Sealing and cutting

The laminate (VI) was subjected to sealing molding using a transfer molding machine at a mold temperature of 175 ° C, an injection pressure of 7.8 MPa, and a curing time of 2 minutes with an epoxy resin sealing material (Sumitomo Electric Wood, model SUMIKON EME-G770). Thereafter, the film was cured at 175 ° C for 2 hours to obtain a semiconductor device assembly.

Next, using a dicing apparatus, the semiconductor device assembly was cut under the following conditions to obtain a 10 mm square semiconductor device.

<Cutting conditions>

Cutting speed: 2mm/sec

Mandrel speed: 30,000 rpm

Blade number: ZH05-SD 3500-N1-50 DD

4. Evaluation of semiconductor devices

The obtained semiconductor device was embedded in epoxy resin, and the cross section was observed by a scanning electron microscope (SEM). As a result, the soldering between the 矽 substrate and the 矽 wafer, and the 矽 wafer/矽 wafer was good, and no crack of the ruthenium wafer was observed. Further, no void was observed in the resin layer between (矽 substrate/矽 wafer) and (矽 wafer/矽 wafer).

(Example 3) 1. Welding of laminate (IV)

Four sets of laminates (IV) similar to those of the manufacturer of Example 2 were prepared. The welding change conditions of Example 2 were carried out in the same manner, and the bonding between the (solder bumps/pads) of the laminate (IV) was carried out using a flip chip bonding machine. In the third embodiment, the bonding between all of the four laminates (solder bumps/pads) laminated in the four ruthenium substrate regions was performed together. Specifically, it is welded in the following manner.

The lower pedestal of the flip chip bonding machine was set to 100 ° C, and four sets of laminates (IV) formed on one substrate were loaded. The four laminates (IV) were simultaneously pressurized at a load of 200 N/12 sec with a bonding tool set at 150 °C. Next, the bonding tool was rapidly heated, the bonding tool temperature was set to 280 ° C, and the bonding was performed at 200 N/12 sec, and the entire layer (solder bump/pad) was welded to obtain a laminated body (structure) after soldering.

Next, in order to complete the hardening of the resin layer, the pressurization used in Example 1 was used. The heating device pressurizes the welded laminate (IV) between (solder bumps/pads) under pressure. Pressurized fluid is empty The gas was press-hardened under the conditions of 180 ° C / 2 hr / 0.8 MPa to obtain a laminate (laminate (VII)).

3. Sealing and cutting

The laminate (VII) was sealed and formed by a transfer molding machine at a mold temperature of 175 ° C, an injection pressure of 7.8 MPa, and a hardening time of 2 minutes with an epoxy resin sealing material (Sumitomo Electric Wood, model SUMIKON EME-G770). . Thereafter, the film was cured at 175 ° C for 2 hours to obtain a semiconductor device assembly.

Next, using a dicing apparatus, the semiconductor device assembly was cut under the following conditions to obtain a 10 mm square semiconductor device.

<Cutting conditions>

Cutting speed: 2mm/sec

Mandrel speed: 30,000 rpm

Blade number: ZH05-SD 3500-N1-50 DD

4. Evaluation of semiconductor devices

The obtained semiconductor device was embedded in epoxy resin, and the cross section was observed by a scanning electron microscope (SEM). As a result, the soldering between the 矽 substrate and the 矽 wafer, and the 矽 wafer/矽 wafer was good, and no crack of the ruthenium wafer was observed. Further, no void was observed in the resin layer between (矽 substrate/矽 wafer) and (矽 wafer/矽 wafer).

(Example 4) 1. Fabrication of laminate

The laminate (I) was prepared in the same manner as in Example 1. The steps of laminating the wafers with the resin film one by one in the remaining three regions on the tantalum substrate block were repeated three times to obtain three sets of laminates (laminates (VIII)). Further, the laminate (I) and the laminate (VIII) are the same laminates produced in the same manner.

2. Welding of laminates

In the same manner as in the third embodiment, the bonding between the entire layers of the four sets of the laminates (solder bumps/pads) was performed.

Secondly, in order to complete the hardening of the resin layer, pressurization is used. The heating device is subjected to press hardening. The pressurized fluid was press-hardened using air at 180 ° C / 2 hr / 0.8 MPa to obtain a laminate (laminate (IX)).

3. Sealing and cutting

The laminate (IX) was sealed with an epoxy resin sealing material (Sumitomo Electric Wood, model Sumikon EME-G770) using a transfer molding machine at a mold temperature of 175 ° C, an injection pressure of 7.8 MPa, and a curing time of 2 minutes. Forming. Thereafter, the film was cured at 175 ° C for 2 hours to obtain a semiconductor device assembly.

Next, using a dicing apparatus, the semiconductor device assembly was cut under the following conditions to obtain a 10 mm square semiconductor device.

<Cutting conditions>

Cutting speed: 2mm/sec

Mandrel speed: 30,000 rpm

Blade number: ZH05-SD 3500-N1-50 DD

4. Evaluation of semiconductor devices

The obtained semiconductor device was embedded in epoxy resin, and the cross section was observed by a scanning electron microscope (SEM). As a result, the soldering between the 矽 substrate and the 矽 wafer, and the 矽 wafer/矽 wafer was good, and no crack of the ruthenium wafer was observed. Further, no void was observed in the resin layer between (矽 substrate/矽 wafer) and (矽 wafer/矽 wafer).

(Example 5) 1. Fabrication of laminate

The tantalum wafer with the resin film used in Example 1 was laminated on the tantalum substrate block used in Example 1 using a flip chip bonding machine.

The lower pedestal of the flip chip bonding machine was set to 100 ° C, and the ruthenium substrate block was mounted thereon. Next, the tantalum wafer with the resin film attached thereto was adsorbed to a bonding tool set at 150 °C. Thereafter, the ruthenium substrate block and the ruthenium wafer were aligned by a flip chip bonding machine, and laminated under a load of 5 N / 2 sec to obtain a (矽 substrate block / resin film / ruthenium wafer) laminate. Further, the tantalum substrate block system includes an aggregate of four tantalum substrates, but a tantalum wafer with a resin film is placed in any one of the regions.

In the same manner as described above, the remaining three regions of the ruthenium substrate block were laminated one by one in one step of the ruthenium wafer with the resin film to obtain a laminate.

Next, the laminate in which one of the four groups obtained as described above was laminated was placed on a side pedestal set at 100 °C. Another tantalum wafer with a resin film attached thereto was adsorbed to a bonding tool set at 150 °C. Then, for one laminate, the tantalum wafer in the laminate was aligned with the tantalum wafer with the resin film by a flip-chip bonding machine, and laminated under the condition of a load of 5 N/2 sec to obtain a laminate. A two-layer laminate type laminate.

Further, in the same manner as described above, the laminate of the remaining three regions of the laminate was laminated one by one in one step. In the respective substrate regions of the substrate block, the two segments of the two wafers with the resin film are laminated one by one. In this way, a stack of four sets of two-layer laminate type was obtained.

Further, a laminate of a resin film is laminated on the laminate of each of the substrate regions of the substrate block to obtain a laminate of three types of three-layer laminate type (laminate (X)). .

2. Welding of laminate (X)

The bonding between the layers (solder bumps/pads) laminated on the substrate of the predetermined region is performed on any one of the four stacked bodies (X) by using a flip chip bonding machine. The lower pedestal of the flip chip bonding machine was set to 100 ° C, and four sets of laminates (X) were loaded. The laminate (IV) placed in any one of the regions on the crucible substrate was pressurized with a bonding tool set at 150 ° C under a load of 50 N/12 sec, and then the bonding tool was rapidly heated. That is, the bonding tool was set to have a temperature of 280 ° C and pressed at 50 N/12 sec to weld the respective layers (solder bumps/pads) of the laminate.

In the same manner as the above-described pressure heating, each of the remaining three regions is laminated on the substrate. The bonding between the layers (solder bumps/pads) gives a laminate (laminate (XI)).

Next, in order to complete the hardening of the resin layer, the pressurization used in Example 1 was used. The heating device pressurizes the laminate (XI) under pressure. The pressurized fluid was press-hardened using air at 180 ° C / 2 hr / 0.8 MPa to obtain a laminate (laminate (XI)).

3. Sealing and cutting

The laminate (XI) was sealed with an epoxy resin sealing material (Sumitomo Electric Wood, model SUMIKON EME-G770) using a transfer molding machine at a mold temperature of 175 ° C, an injection pressure of 7.8 MPa, and a curing time of 2 minutes. Forming. Thereafter, the film was cured at 175 ° C for 2 hours to obtain a semiconductor device assembly.

Next, using a dicing apparatus, the semiconductor device assembly was cut under the following conditions to obtain a 10 mm square semiconductor device.

<Cutting conditions>

Cutting speed: 2mm/sec

Mandrel speed: 30,000 rpm

Blade number: ZH05-SD 3500-N1-50 DD

4. Evaluation of semiconductor devices

The obtained semiconductor device was embedded in epoxy resin, and the cross section was observed by a scanning electron microscope (SEM). As a result, the soldering between (矽 substrate/germanium wafer) and (矽 wafer/germanium wafer) was good, and cracks of the germanium wafer were not observed. Further, no void was observed in the resin layer between (矽 substrate/矽 wafer) and (矽 wafer/矽 wafer).

(Comparative Example 1) 1. Welding of laminates

The tantalum wafer with the resin film attached thereto was laminated and bonded to the tantalum substrate block using a flip chip bonding machine. The wafer with the resin film and the substrate block or other device are prepared for use in Example 1. The same is true.

The lower pedestal of the flip chip bonding machine was set to 100 ° C, and the ruthenium substrate block was mounted thereon. Next, the tantalum wafer with the resin film attached thereto was adsorbed to a bonding tool set at 150 °C. Thereafter, the ruthenium substrate block and the ruthenium wafer were aligned by a flip chip bonding machine, and the ruthenium wafer was laminated and pressurized under a load of 50 N/12 sec, and then the bonding tool was rapidly heated. That is, the bonding tool was set to a temperature of 280 ° C, and pressed under conditions of 50 N/12 sec, and soldered between (solder bumps/pads) to obtain a laminate (laminate (a)).

Next, the laminate (a) obtained above was placed on a side pedestal set at 100 °C. Another tantalum wafer with a resin film attached thereto was adsorbed to a bonding tool set at 150 °C. Then, the wafer of the laminate is aligned with the wafer with the resin film by the above-mentioned camera of the flip chip bonding machine, and the wafer is laminated and pressurized under the condition of a load of 50 N/12 sec, and then the bonding tool is used. Rapidly warming up. That is, the bonding tool was set to a temperature of 280 ° C, and pressed under conditions of 50 N/12 sec, and soldered between (solder bumps/pads) to obtain a laminate (laminate (b)).

Secondly, in order to complete the hardening of the resin layer, pressurization is used. The heating device pressurizes the laminate (b) under pressure. The pressurized flow system was press-hardened using air at 180 ° C / 2 hr / 0.8 MPa to obtain a press-hardened laminate.

In Comparative Example 1, the bonding tool was cooled from 280 ° C to 150 ° C before the second welding step. In order to reduce the thermal effects of high temperature, it is cooled from 280 ° C to 150 ° C. The necessary cooling time at this time is 30 seconds. However, the embodiment does not require cooling, and it is confirmed that the productivity is improved accordingly.

Further, as a result of observing the laminate (structure), it was found that in the second welding step, it was observed that the solder was remelted due to solder re-melting (矽 substrate/germanium wafer) in the second soldering step (solder bump) The positional deviation between the blocks/pads). No such positional deviation as observed in Comparative Example 1 was observed in the laminate (structure) of the examples.

(Comparative Example 2)

In order to demonstrate the effects of the present invention, the following experiment was conducted.

1. Production of liquid sealing resin composition

15.955 wt% of bisphenol F type epoxy resin as liquid epoxy resin (A) and 15.955 wt% of epoxy propylamine type epoxy resin, and 16.383 weight of aromatic first grade amine type hardener as hardener (B) %, as an inorganic filler (C), an average particle diameter of 0.5 μm, a spherical cerium oxide having a maximum particle diameter of 24 μm, 50.000% by weight, a liquid fluorenone compound (D) having an amine group (0.016% by weight), coupled as a decane The epoxy oxirane coupling agent of the agent was 1.596% by weight, and the coloring agent was mixed with 0.095% by weight. This mixture was mixed using a planetary mixer and a 3-roller, and subjected to vacuum defoaming treatment to obtain a liquid sealing resin composition.

2. Fabrication of wafers without resin film

An 8-inch wafer having a dicing film formed in the same manner as the user of Example 1 was cut to obtain a wafer having a wafer size of 6 mm square.

3. Welding of laminates

The same substrate block as the user of Example 1 was prepared. A flux is applied to the pad forming surface of the substrate of the substrate in any one of the regions of the substrate, and the substrate block is mounted on the lower pedestal of the flip chip bonding machine. The ruthenium wafer is adsorbed to the bonding tool. Thereafter, the ruthenium substrate block and the ruthenium wafer are aligned by a flip-chip bonding machine, and then overlapped so that the bump forming surface of the ytterbium wafer and the pad forming surface of the ruthenium substrate block face each other. Lamination, obtaining a temporary laminate. The temporary laminate is heated in a reflow furnace to a temperature above the melting point of the solder for soldering. Further, flux removal and washing were carried out to obtain a laminate (laminate (c)).

A flux is applied to the pad forming surface of the wafer of the obtained laminate (c), and is loaded on the lower pedestal of the flip chip bonding machine. The other wafer is adsorbed to the bonding tool. Thereafter, after the wafer of the laminate (c) is aligned with the other wafer by the above-mentioned camera of the flip chip bonding machine, the wafers are overlapped, and the bump formation surface and the laminate of the other wafer are formed. The pad formation faces of the wafer (c) are laminated so as to face each other, and a temporary laminate is obtained. The temporary laminate is heated in a reflow furnace to a temperature above the melting point of the solder and welded. Further, the flux is removed for washing. As a result, a laminate (laminate (d)) was obtained.

4. Seal between wafers

The laminate (d) was heated on a hot plate at 110 ° C, and the liquid sealing resin composition was applied to one side of the laminate (d). The liquid sealing resin composition is filled between the laminate (tank substrate/germanium wafer) and (ruthenium wafer/germanium wafer). The liquid sealing resin composition in the laminate was heated in an oven at 150 ° C for 120 minutes to be hardened.

5. Evaluation of laminates

A laminate obtained by sealing the tantalum wafer with the above resin composition was obtained, embedded in an epoxy resin, and the cross section was observed by a scanning electron microscope (SEM). As a result, a large number of voids were observed between (矽 substrate/germanium wafer) and (矽 wafer/germanium wafer).

(in conclusion)

From the results of the above examples and comparative examples, it is understood that the method of the present invention shows excellent effects.

In the semiconductor device obtained by the method for fabricating a semiconductor device of the present invention, the soldering between the semiconductor components can be performed at one time by performing the heat treatment of the melting point or higher of the solder once. Therefore, it is an excellent method for productivity. Further, cracks were not observed in the semiconductor component of the semiconductor device obtained in the examples, and the reliability was excellent.

On the other hand, in Comparative Example 1, in order to solder two semiconductor parts on a substrate, it is necessary to perform heat treatment of the melting point or higher of the solder twice, and the time taken is increased, and the obtained product is observed to have a positional deviation, and the productivity is inferior. Further, in Comparative Example 2, unlike the present invention, since the resin is sealed after joining the semiconductor components, a large number of voids are observed between the semiconductor components.

In addition, in the case of the first embodiment, it is possible to obtain a production method excellent in productivity and to obtain an excellent semiconductor device even when the semiconductor wafer of the uppermost portion is not adhered and the entire laminate is soldered after the mounting. Evaluation.

The preferred embodiments of the present invention have been described above, but the present invention is not limited to the embodiments. Additions, omissions, substitutions, and other modifications can be made without departing from the scope of the invention.

[Industry Utilization]

A method of manufacturing a semiconductor device capable of improving productivity and reliability can be provided.

10‧‧‧Semiconductor wafer

11‧‧‧ resin layer

12‧‧‧Semiconductor wafer

13‧‧‧ resin layer

14‧‧‧Semiconductor wafer

15‧‧‧ resin layer

16‧‧‧Semiconductor wafer

17‧‧‧ resin layer

18‧‧‧Substrate

101‧‧‧ terminals

120‧‧‧Substrate

121‧‧‧terminal

121A‧‧‧ solder layer

122‧‧‧terminal

123‧‧‧Tongkong

140‧‧‧Substrate

141‧‧‧ terminals

141A‧‧‧ solder layer

142‧‧‧ terminals

143‧‧‧through holes

160‧‧‧Substrate

161‧‧‧ terminals

161A‧‧‧ solder layer

162‧‧‧ terminals

163‧‧‧through holes

181‧‧‧ terminals

181A‧‧‧ solder layer

Claims (32)

A method of manufacturing a semiconductor device, comprising the steps of: preparing one or more of a combination of n semiconductor components and n resin layers, and a substrate, n semiconductor components, separated by a resin, in the step (A) The first to nth semiconductor components are sequentially laminated, and the n resin layers are composed of the first to nth resin layers sequentially used, and the substrate has a plurality of one side for connection with the first semiconductor component. The terminal for connection, the first semiconductor component has a connection terminal for connection to the substrate on one surface side, and a connection terminal for connection to another semiconductor component on the other surface side, and the second to n-1th Each of the semiconductor components has a connection terminal for connecting to another semiconductor component on both sides, and the nth semiconductor component has a connection terminal for connecting to the n-1th semiconductor component, and among the first to nth semiconductor components, At least one of the connection terminals that face each other with the resin layer interposed therebetween when the semiconductor component is sequentially laminated has a solder layer, and the first semiconductor component and the substrate are connected to the base material of the first semiconductor component facing each other. And at least one of the terminals for connecting the first semiconductor component of the substrate has a solder layer, wherein n is an integer of 2 or more; and in the first bonding step (B), at least one layer of the first resin is sequentially laminated on the substrate. After the layer and the at least one first semiconductor component are formed into at least one laminated structure, the first resin layer is heated at a temperature lower than a temperature at which the solder layer is melted and the resin layer is semi-hardened, and the semi-hardened state is interposed therebetween. Bonding the substrate and the first semiconductor component; repeating the adhesive step (C), sequentially laminating another resin layer and another semiconductor component on the adhered semiconductor component, and then melting the solder layer below the solder layer The temperature is heated, and the semiconductor component is adhered via the resin layer in a semi-hardened state, and the operation is repeated until the n-1th semiconductor component is adhered, and n-1 resin layers and n-1 semiconductor parts are obtained on the substrate. At least one laminate obtained by alternately laminating, but this step is omitted when n is 2; step (D), A pair of rolling members are prepared, and at least one laminated body of the substrate is placed on one of the rolling members, but the substrate is loaded on a pair of rafts in a step earlier than this. The step of pressing the member is omitted; in step (E), the nth resin layer and the nth semiconductor component are sequentially laminated on the n-1th semiconductor component of the laminate placed on the stamping member, And at least one laminate obtained by alternately laminating n resin layers and n semiconductor parts on the substrate; rolling and welding step (F), wherein the one pressing member and the other rolling member The substrate and the laminate are pressed from the substrate side and the n-th semiconductor component side, and the substrate and the laminate are heated at a temperature higher than the temperature at which the solder layer is melted, and soldering between the terminals for connection is performed. The structure of the welded laminate is obtained, and the curing step (G) is heated at a temperature equal to or higher than the curing temperature of the resin layer to cure the first to nth resin layers. The method of manufacturing a semiconductor device according to claim 1, wherein each of the resin layers contains 30% by weight or more and 70% by weight or less of a thermosetting resin, and the n series is selected from 2, 3, and 4, Any integer in the group consisting of 5, 6, 7, 8, 9 and 10. The method of manufacturing a semiconductor device according to claim 1 or 2, wherein in the first bonding step (B), a plurality of the first resin layers are disposed on the substrate, and each of the first The first semiconductor component is laminated on the resin layer. In the repeating adhesion step (G), the other resin layer and the semiconductor component are sequentially laminated on each of the first semiconductor components of the first semiconductor component. The method of manufacturing a semiconductor device according to claim 1 or 2, wherein before the step (D), the step (C') is further included, and the repeating step (C') is to form a laminate. Repeating the combination of the first adhesion step (B) and the repeated adhesion step (C) a plurality of times, forming a plurality of laminates on the substrate, or further including a repeating step (C") before the hardening step (G), This repeating step (C") is repeated a plurality of times of forming the forming step (B) to the step (F) of forming a laminate, and a plurality of laminates are formed on the substrate. A method of manufacturing a semiconductor device according to any one of claims 1 to 4, wherein In the step (A), n is 3, and the first semiconductor component, the second semiconductor component, the third semiconductor component, the substrate, the first resin layer, the second resin layer, and the third resin layer are prepared as The semiconductor and resin layer; the first adhesion step (B), wherein the first resin layer and the first semiconductor component are sequentially laminated on the substrate, and then heated, and the first resin layer is placed in a semi-hardened state The base material and the first semiconductor component are adhered; the repeating adhesion step (C) is performed by sequentially laminating the second resin layer and the second semiconductor component on the first semiconductor component, and heating the semiconductor component in a semi-hardened state. The second resin layer adheres the first semiconductor component and the second semiconductor component; in the step (D), a pair of rolling members are prepared, and the substrate and the first resin are placed on one of the rolling members. a layer, a first semiconductor component, a second resin layer, and a second semiconductor component; and in the step (E), the third semiconductor component is provided on the second semiconductor component via the third resin layer, and the substrate is stacked on the substrate a layering body; the rolling and welding step (F), with one of the rolling members and the other rolling structure The laminate is pressed and heated to be welded to obtain a welded laminate structure; and the curing step (G) is performed to make the first resin layer, the second resin layer, and the third resin layer Hardening is carried out. The method of manufacturing a semiconductor device according to claim 5, wherein the first resin layer, the second resin layer, and the third resin layer comprise a thermosetting resin, and the hardening step is performed by fluidly adding the structure The edge resin is heated to cure the first resin layer, the second resin layer, and the third resin layer. The method of manufacturing a semiconductor device according to claim 5, wherein at least one of the second semiconductor component connection terminal of the third semiconductor component and the third semiconductor component connection terminal of the second semiconductor component is used. A solder layer is provided, and at least one of the first semiconductor component connection terminal of the second semiconductor component and the second semiconductor component connection terminal of the first semiconductor component has a solder layer, and the base of the first semiconductor component At least one of the material connection terminal and the first semiconductor component connection terminal of the substrate has a solder layer. The method of manufacturing a semiconductor device according to any one of claims 5 to 7, wherein before the step (B), the following substeps are included: The third resin layer is provided on at least one of a surface of the second semiconductor component on which the third semiconductor component connection terminal is formed and a surface of the third semiconductor component on which the second semiconductor component connection terminal is provided. The resin layer is provided on at least one of a surface of the first semiconductor component on which the second semiconductor component connection terminal is formed and a surface of the second semiconductor component on which the first semiconductor component connection terminal is provided. The resin layer of the second resin layer is provided on at least one of a surface of the base material on which the first semiconductor component connection terminal is formed and a surface of the first semiconductor component on which the base material connection terminal is provided. A resin layer of the first resin layer. The method of manufacturing a semiconductor device according to any one of claims 5 to 8, wherein the step (D) of mounting the substrate is performed by providing a pair of rolling members having a pre-heated opposing arrangement. And a step of disposing the set portion of the laminated body between the pair of rolling members in a state of being separated from the pressing members, and disposing the laminated body on the setting portion; the rolling and The welding step (F) is a step of heating and welding the laminate and the installation portion while heating the pair of rolling members. The method of manufacturing a semiconductor device according to claim 9, wherein a temperature of one of the pair of rolling members is lower than a temperature of the other pressing member. The method of manufacturing a semiconductor device according to any one of claims 5 to 10, wherein the structure includes at least the third resin layer, the third semiconductor component, the second resin layer, and the second semiconductor component The first resin layer and the first semiconductor component are formed by alternately laminating a resin layer and a semiconductor component, and the structure is formed on the substrate in two or more. In the curing step, the curing step is performed. The first resin layer, the second resin layer, and the third resin layer included in the plurality of structures formed on the substrate are cured, and the step after the curing step includes cutting the substrate one by one of the structures. Break the steps. The method of manufacturing a semiconductor device according to any one of claims 5 to 11, wherein the semiconductor wafer of the second semiconductor component TSV structure includes a substrate and a through hole penetrating the substrate. The hole is connected to the third semiconductor component connection terminal and the first semiconductor component connection terminal; the semiconductor wafer of the first semiconductor component TSV structure includes a substrate and a through hole a through hole of the substrate, the through hole being connected to the second semiconductor component connection terminal, and a terminal provided on a surface opposite to a surface on a side of the substrate surface on which the second semiconductor component connection terminal is provided . The method of manufacturing a semiconductor device according to any one of claims 1 to 12, comprising at least one of the following features: (i) a melting point of the solder layer is 110 to 250 ° C, and (ii) the resin layer contains a thermosetting resin And a flux active compound having at least one of a carboxyl group and a phenolic hydroxyl group in an amount of from 1 to 30% by weight. The method of manufacturing a semiconductor device according to any one of claims 1 to 13, comprising at least one of the following features: (iii) comprising the step of pressurizing the substrate and the laminate with a fluid, and The heating is carried out in a container in which the fluid is introduced, (iv) the resin layer contains a thermosetting resin, and (v) the curing step is performed by using a heated pressurized fluid or by heating the container. The method of manufacturing a semiconductor device according to claim 14 includes at least one of the following features: (vi) a melting point of the solder layer is 170 to 230 ° C, (vii) the fluid is air or a passive gas, and (viii) is stacked. The pressing force of the layer pressurization is 0.1 MPa or more and 10 MPa or less. A method of manufacturing a semiconductor device, comprising the steps of: preparing one or more of a combination of n semiconductor components and n resin layers, and a substrate, n semiconductor components, which are separated by a resin layer; The first to nth semiconductor components of the stack are formed, and the n resin layers are composed of the first to nth resin layers which are sequentially used, and the substrate has a plurality of connections for connection to the first semiconductor component on one surface side. In the terminal, the first semiconductor component has a connection terminal for connection to the substrate on one surface side and a connection terminal for connection to another semiconductor component on the other surface side, and the second to n-1th semiconductor components are respectively provided. On both sides for connection to other semiconductor parts The connection terminal, the nth semiconductor component has a connection terminal for connection to the semiconductor component of the n-1th, and the semiconductor component of the first to the nth semiconductor layers are sequentially laminated with each other via the resin layer. At least one of the connection terminals has a solder layer, and at least one of the first semiconductor component and the substrate, the substrate connection terminal of the first semiconductor component and the first semiconductor component connection terminal of the substrate a solder layer, wherein n is an integer of 2 or more; in the first bonding step (B), at least one first resin layer and at least one first semiconductor component are sequentially laminated on a substrate, and at least one laminate is formed. After the structure, the resin layer is heated at a temperature lower than the temperature at which the solder layer is melted and the resin layer is semi-hardened, and the substrate and the first semiconductor component are adhered via the first resin layer in a semi-hardened state; the second adhesion In the step (b-1), the second resin layer and the second semiconductor component are sequentially laminated on the first semiconductor component to be adhered, and then heated at a temperature lower than the temperature at which the solder layer is melted and the resin layer is semi-hardened. , separated by a semi-hardened state The second resin layer adheres the first semiconductor component and the second semiconductor component; the repeating adhesion step (C) and the second bonding step are sequentially repeated for n-1 times on the second semiconductor component under the same conditions until Before the nth semiconductor component is adhered, at least one laminate obtained by alternately laminating n resin layers and n semiconductor components is obtained on the substrate, but when n is 2, the step is omitted; and step (D), preparing a pair a rolling member in which at least one laminate is laminated on one of the pressing members, but the substrate is loaded on a pair of rolling members at a step earlier than this. The case is omitted; in step (e), the substrate and the laminate are pressurized with a fluid; and the step (f) is performed by the one of the rolling members and the other pressing member from the substrate side and the nth semiconductor The substrate is pressed against the substrate and the laminate; and the soldering and curing step (g) is performed by heating the substrate and the laminate at a temperature higher than the temperature at which the solder layer is melted, and soldering between the terminals for connecting the opposite ends. At the same time, the first to nth resin layers are cured to obtain a structure in which the laminated body is welded. The method for producing a semiconductor device according to claim 16, wherein each of the resin layers contains 30% by weight or more and 70% by weight or less of a thermosetting resin, and the n series is selected from 2, 3, and 4, Any integer in the group consisting of 5, 6, 7, 8, 9 and 10. The method of manufacturing a semiconductor device according to claim 16 or 17, wherein in the first bonding step (B), a plurality of the first resin layers are disposed on the substrate, and each of the first The first semiconductor component is laminated on the resin layer, and in the second bonding step (b-1), another resin layer and a semiconductor are sequentially laminated on each of the first semiconductor components of the first semiconductor component. Components. The method of manufacturing a semiconductor device according to claim 16 or 17, wherein before the step (D), the step (c') is further included, the step (c') of forming a laminate The first adhesion step (B) is repeated a plurality of times in combination with the second adhesion step (b-1) and the repeated adhesion step (c), and a plurality of laminates are formed on the substrate, or a repeating step is included. (C"), the repeating step (C") is repeated a plurality of times of forming the forming step (B) to the step (g) of forming a laminate, and a plurality of laminates are formed on the substrate. The method of manufacturing a semiconductor device according to any one of claims 16 to 19, comprising the step of: (a), n is 3, and preparing a third semiconductor component, a second semiconductor component, and a first The semiconductor component, the base material, and the third resin layer, the second resin layer, and the first resin layer are the semiconductor and resin layers, and the third semiconductor component has a connection terminal for connecting to the second semiconductor component on one side thereof. The second semiconductor component has a connection terminal for connecting to the first semiconductor component on one side and a connection terminal connected to the third semiconductor component on the other surface side, and the first semiconductor component has one side. a connection terminal for connection to a substrate and a connection terminal for connection to the second semiconductor component on the other surface side, wherein the substrate has a plurality of connections for connection to the first semiconductor component on one side thereof In the first bonding step (B), the first resin layer and the first semiconductor component are sequentially laminated on the substrate, and then heated, and the substrate is laminated in a semi-hardened state. And the first Semiconductor parts are bonded; In the second bonding step (b-1), the second resin layer and the second semiconductor component are sequentially laminated on the first semiconductor component, and then heated, and the second resin layer is placed in a semi-hardened state. 1 the semiconductor component and the second semiconductor component are adhered; the repeating bonding step (c), the third resin layer and the third semiconductor component are sequentially laminated on the second semiconductor component, and then heated, and the semi-hardened state is interposed. The third resin layer and the third semiconductor component are adhered to the third resin layer, thereby obtaining at least the third semiconductor component, the third resin layer, the second semiconductor component, and the second resin layer. At least one laminate in which the first semiconductor component is formed and the resin layer and the semiconductor component are alternately laminated; in the step (D), a pair of rolling members are prepared and placed on top of one of the rolling members a plurality of the laminates on the substrate; in the step (e), the loaded substrate and the laminate are pressurized by a fluid; in the step (f), the pressure is applied to the laminate a pressing member and the one pressing member pressurizing the substrate and the laminate; The step (G), the side edge of the substrate and the nip-pressing the laminated body is heated and welded, while the third resin layer, the second layer of the cured resin and the first resin layer. The method of manufacturing a semiconductor device according to claim 20, wherein at least one of the second semiconductor component connection terminal of the third semiconductor component and the third semiconductor component connection terminal of the second semiconductor component has In the solder layer, at least one of the first semiconductor component connection terminal of the second semiconductor component and the second semiconductor component connection terminal of the first semiconductor component has a solder layer, and the first semiconductor component is connected to the substrate. At least one of the terminal and the first semiconductor component connection terminal of the substrate has a solder layer. The method of manufacturing a semiconductor device according to claim 20, wherein before the step (B), the method includes the step of forming a third semiconductor component connection terminal in the second semiconductor component. The resin layer constituting the first resin layer is provided on at least one of the surfaces of the third semiconductor component on which the second semiconductor component connection terminal is provided, and the second semiconductor is formed in the first semiconductor component. a resin layer constituting the second resin layer is provided on at least one of the surface of the terminal for connecting the terminal and the surface of the second semiconductor component on which the terminal for connecting the first semiconductor component is provided, and the substrate is formed 1 the surface of the terminal for connecting semiconductor parts and the first semiconductor zero A resin layer constituting the first resin layer is provided on at least one of the surfaces of the terminal for connecting the substrate. The method for manufacturing a semiconductor device according to any one of claims 20 to 22, wherein the step (D) of placing the substrate is to prepare a pair of rolling members having a relative arrangement in a preheated manner. And a device disposed between the pair of rolling members in a state of being separated from the pressing members, and the mounting portion disposed in a separated state with respect to the pair of rolling members is disposed on the substrate a plurality of steps of the laminate; the bonding step (g), the step of heating and soldering a plurality of the laminate laminated on the substrate by the pair of rolling members . The method of manufacturing a semiconductor device according to claim 23, wherein a temperature of one of the pair of rolling members is lower than a temperature of the other pressing member. The method of manufacturing a semiconductor device according to any one of claims 20 to 24, wherein the laminate is formed on the substrate by two or more, and the step after the bonding step includes the laminates one by one A cutting step of cutting the substrate. The method of manufacturing a semiconductor device according to any one of claims 20 to 25, wherein the semiconductor wafer of the second semiconductor component TSV structure includes a substrate and a through hole penetrating the substrate. The hole is connected to the third semiconductor component connection terminal and the first semiconductor component connection terminal; and the semiconductor wafer of the first semiconductor component TSV structure includes a substrate and a through hole penetrating the substrate, the through hole The terminal connected to the second semiconductor component is connected to a terminal provided on a surface opposite to the surface on the side of the substrate on which the second semiconductor component connection terminal is provided. The method of manufacturing a semiconductor device according to any one of claims 16 to 26, comprising at least one of the following features: (i) a melting point of the solder layer is 110 to 250 ° C, and (ii) the resin layer contains a thermosetting resin And a flux active compound having at least one of a carboxyl group and a phenolic hydroxyl group in an amount of from 1 to 30% by weight. The method of manufacturing a semiconductor device according to any one of claims 16 to 27, comprising at least one of the following features: (iii) the step of pressurizing the substrate and the laminate with a fluid, and performing the method of introducing the fluid into the container, (iv) the resin layer containing the thermosetting resin, (v) the solder hardening, and the resin The heating for the hardening of the layer is carried out by using a heated rolling member. The method of manufacturing a semiconductor device according to any one of claims 16 to 28, comprising at least one of the following features: (vi) a melting point of the solder layer is 170 to 230 ° C, and (vii) the fluid is air or a passive gas (viii) The pressing force for pressurizing the laminate is 0.1 MPa or more and 10 MPa or less. The method of manufacturing a semiconductor device according to any one of claims 16 to 29, further comprising, after the step (g), a post-hardening step of performing a resin layer for causing the laminate Fully hardened heating and pressurization. A semiconductor device manufactured by the method of manufacturing a semiconductor device according to claim 1 of the patent application. A semiconductor device manufactured by the method of manufacturing a semiconductor device according to claim 16 of the patent application.