TW201316393A - Method for producing semiconductor device and film for protecting surface of semiconductor wafer, semiconductor wafer press apparatus and semiconductor wafer mount apparatus used in the method - Google Patents

Method for producing semiconductor device and film for protecting surface of semiconductor wafer, semiconductor wafer press apparatus and semiconductor wafer mount apparatus used in the method Download PDF

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TW201316393A
TW201316393A TW101128832A TW101128832A TW201316393A TW 201316393 A TW201316393 A TW 201316393A TW 101128832 A TW101128832 A TW 101128832A TW 101128832 A TW101128832 A TW 101128832A TW 201316393 A TW201316393 A TW 201316393A
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semiconductor wafer
film
layer
surface protection
wafer surface
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TW101128832A
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TWI544533B (en
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Eiji Hayashishita
Katsutoshi Ozaki
Mitsuru Sakai
Akimitsu Morimoto
Hiroyuki Ono
Hitoshi Kunishige
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Mitsui Chemicals Inc
Mitsui Chemicals Tohcello Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00Layered products comprising a layer of synthetic resin
    • B32B27/06Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B27/08Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00Layered products comprising a layer of synthetic resin
    • B32B27/32Layered products comprising a layer of synthetic resin comprising polyolefins
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00Layered products comprising a layer of synthetic resin
    • B32B27/36Layered products comprising a layer of synthetic resin comprising polyesters
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    • C08F220/00Copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical or a salt, anhydride ester, amide, imide or nitrile thereof
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    • C09J133/00Adhesives based on homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Adhesives based on derivatives of such polymers
    • C09J133/04Homopolymers or copolymers of esters
    • C09J133/06Homopolymers or copolymers of esters of esters containing only carbon, hydrogen and oxygen, the oxygen atom being present only as part of the carboxyl radical
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    • C09J7/00Adhesives in the form of films or foils
    • C09J7/20Adhesives in the form of films or foils characterised by their carriers
    • C09J7/29Laminated material
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • B32B2457/14Semiconductor wafers
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    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
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    • C08F222/00Copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by a carboxyl radical and containing at least one other carboxyl radical in the molecule; Salts, anhydrides, esters, amides, imides, or nitriles thereof
    • C08F222/10Esters
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    • C08F222/105Esters of polyhydric alcohols or polyhydric phenols of pentaalcohols
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    • C08F222/00Copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by a carboxyl radical and containing at least one other carboxyl radical in the molecule; Salts, anhydrides, esters, amides, imides, or nitriles thereof
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    • C09J2203/00Applications of adhesives in processes or use of adhesives in the form of films or foils
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    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/10Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive tape or sheet
    • C09J2301/12Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive tape or sheet by the arrangement of layers
    • C09J2301/122Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive tape or sheet by the arrangement of layers the adhesive layer being present only on one side of the carrier, e.g. single-sided adhesive tape
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    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/10Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive tape or sheet
    • C09J2301/16Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive tape or sheet by the structure of the carrier layer
    • C09J2301/162Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive tape or sheet by the structure of the carrier layer the carrier being a laminate constituted by plastic layers only
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    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/30Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier
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    • C09J2467/006Presence of polyester in the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
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    • HELECTRICITY
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    • H01L2221/6834Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer

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Abstract

A film for protecting a surface of a semiconductor wafer is provided to prevent breakage even when back-grinding a hard and brittle semiconductor wafer. Specifically, a film for protecting a surface of a semiconductor wafer is provided, including a substrate layer (A) in which the storage elastic modulus GA (150) at 150 DEG C is 1 MPa or more, and a softening layer (B) in which the storage elastic modulus GB at 120 DEG C to 180 DEG C is 0.05 MPa or less, and the storage elastic modulus GB at 40 DEG C is 10 MPa or more.

Description

半導體裝置的製造方法以及使用該方法之半導體晶圓表面保護用膜 Method for manufacturing semiconductor device and film for semiconductor wafer surface protection using the same

本發明是有關於半導體裝置的製造方法以及可用於該方法之半導體晶圓表面保護用膜。 The present invention relates to a method of manufacturing a semiconductor device and a film for surface protection of a semiconductor wafer which can be used in the method.

半導體裝置的製造步驟中的半導體晶圓的薄化加工通常藉由研磨半導體晶圓的電路非形成面(背面)來進行。背面研磨時的半導體晶圓的電路形成面的保護可藉由各種方法來進行。 The thinning process of the semiconductor wafer in the manufacturing process of the semiconductor device is usually performed by polishing the non-formed surface (back surface) of the semiconductor wafer. The protection of the circuit formation surface of the semiconductor wafer during back grinding can be performed by various methods.

例如包含藍寶石基板的半導體晶圓的電路形成面的保護可藉由以下方法來進行(例如專利文獻1及非專利文獻1)。即,準備在表面設有蠟樹脂層的陶瓷板。接著,將蠟樹脂層加熱使其熔融,而將藍寶石基板的電路形成面嵌入至熔融狀態的蠟樹脂層。接著,將蠟樹脂層冷卻並使其固化。藉此,藉由蠟樹脂層保護藍寶石基板的整個電路形成面。蠟樹脂通常包含松香系蠟(包括松香、褐煤蠟及酚樹脂等的蠟、熔點50℃左右)。 For example, the protection of the circuit formation surface of the semiconductor wafer including the sapphire substrate can be performed by the following methods (for example, Patent Document 1 and Non-Patent Document 1). That is, a ceramic plate having a wax resin layer on its surface is prepared. Next, the wax resin layer is heated and melted, and the circuit formation surface of the sapphire substrate is embedded in the molten wax resin layer. Next, the wax resin layer is cooled and solidified. Thereby, the entire circuit formation surface of the sapphire substrate is protected by the wax resin layer. The wax resin usually contains a rosin-based wax (including a wax such as rosin, montan wax, and phenol resin, and has a melting point of about 50 ° C).

[先前技術文獻] [Previous Technical Literature] [專利文獻] [Patent Literature]

專利文獻1:國際公開第2005/099057號 Patent Document 1: International Publication No. 2005/099057

[非專利文獻] [Non-patent literature]

非專利文獻1:DISCO Press Release股份有限公司2009年11月5日因特網(URL:http://www.disco.co.jp/jp/news/press/20091105.html ) Non-Patent Document 1: DISCO Press Release Co., Ltd. November 5, 2009 Internet (URL: http://www.disco.co.jp/jp/news/press/20091105.html )

然而,上述方法中,為了將背面研磨後的藍寶石基板自蠟樹脂層剝離,而必須使蠟樹脂層加熱熔融。而且,必須藉由溶劑清洗除去藍寶石基板的表面所殘留的蠟樹脂,步驟較為煩雜。另外,背面研磨後的藍寶石基板由於厚度非常薄,容易產生翹曲,因此有在這些步驟中容易破裂的問題。 However, in the above method, in order to peel the sapphire substrate after the back surface polishing from the wax resin layer, it is necessary to heat and melt the wax resin layer. Further, it is necessary to remove the wax resin remaining on the surface of the sapphire substrate by solvent cleaning, which is cumbersome. Further, since the sapphire substrate after the back grinding is extremely thin and warpage is likely to occur, there is a problem that it is easily broken in these steps.

因此,本發明者等人研究藉由剝離相對較容易的半導體晶圓保護膜來保護藍寶石基板的電路形成面的方法。先前的半導體晶圓保護膜具有基材層、與黏著層。並且,在將半導體晶圓保護膜的黏著層貼附於半導體晶圓的電路形成面後,研磨半導體晶圓背面。然後,藉由膠帶剝離機等剝離半導體晶圓保護膜。 Therefore, the inventors of the present invention have studied a method of protecting a circuit forming surface of a sapphire substrate by peeling off a relatively easy semiconductor wafer protective film. The prior semiconductor wafer protective film has a substrate layer and an adhesive layer. Then, after attaching the adhesive layer of the semiconductor wafer protective film to the circuit formation surface of the semiconductor wafer, the back surface of the semiconductor wafer is polished. Then, the semiconductor wafer protective film is peeled off by a tape peeling machine or the like.

然而,使用先前的半導體晶圓保護膜的方法中,存在背面研磨時藍寶石基板的端部容易破損的問題。即,如圖3所示,藉由蠟工法,將藍寶石基板1的所有端部嵌入蠟樹脂層2內,因而容易穩定地保持藍寶石基板1的端部。另一方面,如圖4所示,在使用先前的半導體晶圓保護膜的方法中,藍寶石基板1的端部並未嵌入至半導體晶圓保護膜4的內部,因此難以穩定保持藍寶石基板1的端部。因此認為,背面研磨時藍寶石基板1的端部與磨石3等接觸而容易破損。 However, in the method of using the conventional semiconductor wafer protective film, there is a problem that the end portion of the sapphire substrate is easily broken during back grinding. That is, as shown in FIG. 3, all the end portions of the sapphire substrate 1 are embedded in the wax resin layer 2 by the waxing method, so that the end portion of the sapphire substrate 1 can be easily held stably. On the other hand, as shown in FIG. 4, in the method of using the conventional semiconductor wafer protective film, the end portion of the sapphire substrate 1 is not embedded in the inside of the semiconductor wafer protective film 4, so that it is difficult to stably maintain the sapphire substrate 1. Ends. Therefore, it is considered that the end portion of the sapphire substrate 1 at the time of back grinding is in contact with the grindstone 3 or the like and is easily broken.

本發明是鑒於上述情況而完成,目的是提供一種特別 是在藍寶石基板等的硬且脆的半導體晶圓中,亦可無破損地進行背面研磨的半導體裝置的製造方法、或適合於上述製造方法的半導體晶圓表面保護用膜。 The present invention has been made in view of the above circumstances, and aims to provide a special It is a method of manufacturing a semiconductor device which is back-polished without damage in a hard and brittle semiconductor wafer such as a sapphire substrate, or a film for semiconductor wafer surface protection suitable for the above-described manufacturing method.

本發明者等人發現,在背面研磨時,藉由利用隆起部(邊緣(rim))保持半導體晶圓的端部附近,而可抑制半導體晶圓的端部的破損。並且努力研究的結果發現,藉由熱壓接而可相對較容易地形成隆起部(邊緣),且即便在背面研磨時的溫度下亦可良好地維持隆起部(邊緣)的形狀的膜的構成。 The inventors of the present invention have found that it is possible to suppress breakage of the end portion of the semiconductor wafer by holding the vicinity of the end portion of the semiconductor wafer by the ridge portion (rim) during back surface polishing. As a result of intensive studies, it has been found that the formation of a film having a shape in which the ridge portion (edge) can be favorably maintained even at the temperature at the time of back surface polishing can be formed by thermocompression bonding. .

即,本發明的第一發明是有關於以下的半導體晶圓表面保護用膜。 That is, the first invention of the present invention relates to the following film for semiconductor wafer surface protection.

[1]一種半導體晶圓表面保護用膜,其包括:基材層(A),其在150℃的儲存彈性模數GA(150)為1 MPa以上;軟化層(B),其在120℃~180℃的任意溫度的儲存彈性模數GB(120~180)為0.05 MPa以下、且在40℃的儲存彈性模數GB(40)為10 MPa以上。 [1] A film for surface protection of a semiconductor wafer, comprising: a substrate layer (A) having a storage elastic modulus G A (150) at 150 ° C of 1 MPa or more; and a softening layer (B) at 120 The storage elastic modulus G B (120 to 180) at any temperature of °C to 180 °C is 0.05 MPa or less, and the storage elastic modulus G B (40) at 40 ° C is 10 MPa or more.

[2]如[1]所述之半導體晶圓表面保護用膜,其中上述軟化層(B)在100℃的儲存彈性模數GB(100)為1 MPa以上。 [2] The film for semiconductor wafer surface protection according to [1], wherein the softening layer (B) has a storage elastic modulus G B (100) at 100 ° C of 1 MPa or more.

[3]如[1]或[2]所述之半導體晶圓表面保護用膜,其中上述軟化層(B)在60℃的拉伸彈性模數EB(60)與在25℃的拉伸彈性模數EB(25)滿足1>EB(60)/EB(25)>0.1的關係。 [3] The film for semiconductor wafer surface protection according to [1] or [2] wherein the softening layer (B) has a tensile elastic modulus E B (60) at 60 ° C and an elongation at 25 ° C. The elastic modulus E B (25) satisfies the relationship of 1>E B (60)/E B (25)>0.1.

[4]如[1]至[3]中任一項所述之半導體晶圓表面保護 用膜,其中進一步包括:黏著層(C),其隔著上述軟化層(B)而配置於與上述基材層(A)相反側;上述黏著層(C)的依據JIS Z0237而測定的黏著力為0.1 N/25 mm~10 N/25 mm。 [4] The semiconductor wafer surface protection according to any one of [1] to [3] The film further includes an adhesive layer (C) disposed on the opposite side of the base material layer (A) via the softened layer (B), and an adhesive layer measured according to JIS Z0237 of the adhesive layer (C) The force is 0.1 N/25 mm~10 N/25 mm.

[5]如[1]至[4]中任一項所述之半導體晶圓表面保護用膜,其中上述基材層(A)配置於最表面。 [5] The film for semiconductor wafer surface protection according to any one of [1] to [4] wherein the base material layer (A) is disposed on the outermost surface.

[6]如[4]或[5]所述之半導體晶圓表面保護用膜,其中上述黏著層(C)隔著上述軟化層(B)而配置於與上述基材層(A)相反側的最表面。 [6] The film for semiconductor wafer surface protection according to [4], wherein the adhesive layer (C) is disposed on the opposite side of the base material layer (A) via the softened layer (B). The most surface.

[7]如[1]至[6]中任一項所述之半導體晶圓表面保護用膜,其中上述軟化層(B)包含:烴烯烴的均聚物、烴烯烴的共聚物、或這些的混合物。 [7] The film for surface protection of a semiconductor wafer according to any one of [1] to [6] wherein the softening layer (B) comprises: a homopolymer of a hydrocarbon olefin, a copolymer of a hydrocarbon olefin, or the like mixture.

[8]如[1]至[7]中任一項所述之半導體晶圓表面保護用膜,其中構成上述軟化層(B)的樹脂的密度為880 kg/m3~960 kg/m3[8] The film for semiconductor wafer surface protection according to any one of [1] to [7] wherein the resin constituting the softened layer (B) has a density of 880 kg/m 3 to 960 kg/m 3 .

[9]如[1]至[8]中任一項所述之半導體晶圓表面保護用膜,其中上述基材層(A)是聚烯烴層、聚酯層、或聚烯烴層與聚酯層的積層體。 [9] The film for semiconductor wafer surface protection according to any one of [1] to [8] wherein the substrate layer (A) is a polyolefin layer, a polyester layer, or a polyolefin layer and a polyester. Layered layer.

本發明的第二發明是有關於以下的半導體裝置的製造方法。 A second invention of the present invention relates to a method of manufacturing a semiconductor device described below.

[10]一種半導體裝置的製造方法,其包括:在半導體晶圓表面保護用膜上,以上述半導體晶圓的電路形成面與半導體晶圓表面保護用膜接觸的方式配置半導體晶圓的步驟; 在上述半導體晶圓的外周,形成保持上述半導體晶圓的上述半導體晶圓表面保護用膜的隆起部的步驟;研磨藉由上述隆起部而保持的上述半導體晶圓的電路非形成面的步驟;自上述半導體晶圓的電路形成面剝離上述半導體晶圓表面保護用膜的步驟;上述隆起部在100℃的儲存彈性模數G(100)為1 MPa以上。 [10] A method of manufacturing a semiconductor device, comprising: a step of disposing a semiconductor wafer on a surface of a semiconductor wafer surface protection film in such a manner that a circuit formation surface of the semiconductor wafer is in contact with a semiconductor wafer surface protection film; a step of forming a raised portion of the semiconductor wafer surface protective film of the semiconductor wafer on an outer circumference of the semiconductor wafer; and a step of polishing a circuit non-formed surface of the semiconductor wafer held by the raised portion; The step of peeling off the semiconductor wafer surface protective film from the circuit formation surface of the semiconductor wafer; the storage elastic modulus G (100) of the raised portion at 100 ° C is 1 MPa or more.

[11]如[10]所述之半導體裝置的製造方法,其中上述半導體晶圓表面保護用膜是如[1]至[9]中任一項所述之半導體晶圓表面保護用膜,且以120℃~180℃的溫度、1 MPa~10 MPa的壓力熱壓接上述半導體晶圓表面保護用膜與上述半導體晶圓而形成上述隆起部。 The semiconductor wafer surface protection film according to any one of [1] to [9], wherein the semiconductor wafer surface protection film according to any one of [1] to [9], The semiconductor wafer surface protective film and the semiconductor wafer are thermocompression-bonded at a temperature of 120 ° C to 180 ° C and a pressure of 1 MPa to 10 MPa to form the raised portion.

[12]一種半導體裝置的製造方法,其是如上述[11]所述之半導體裝置的製造方法,且在上述半導體晶圓表面保護用膜上以上述半導體晶圓的電路形成面與半導體晶圓表面保護用膜接觸的方式配置上述半導體晶圓的步驟中的膜的溫度TM、與形成上述半導體晶圓表面保護用膜的隆起部的步驟中的熱壓接溫度TP、以及上述軟化層(B)的軟化點溫度TmB滿足以下通式的關係:[式1]TP≦TM,[式2]TmB<TP<TmB+40℃。 [12] A method of manufacturing a semiconductor device according to the above [11], wherein the semiconductor wafer surface protection film is formed on the semiconductor wafer surface protection film and the semiconductor wafer The temperature TM of the film in the step of arranging the semiconductor wafer, the thermocompression bonding temperature TP in the step of forming the ridge portion of the semiconductor wafer surface protective film, and the softening layer (B) The softening point temperature TmB satisfies the relationship of the following formula: [Formula 1] TP≦TM, [Formula 2] TmB<TP<TmB+40°C.

[13]如[11]或[12]所述之半導體裝置的製造方法,其中上述半導體晶圓表面保護用膜的軟化層(B),以較基材 層(A)成為上述半導體晶圓的電路形成面側的方式,將上述半導體晶圓配置於上述半導體晶圓表面保護用膜上。 [13] The method of manufacturing a semiconductor device according to [11] or [12] wherein the softening layer (B) of the film for semiconductor wafer surface protection is a substrate The layer (A) is formed on the circuit formation surface side of the semiconductor wafer, and the semiconductor wafer is placed on the semiconductor wafer surface protection film.

[14]如[10]至[13]中任一項所述之半導體裝置的製造方法,其中上述半導體晶圓包含莫氏硬度為8以上的高硬度材料基板。 [14] The method of manufacturing a semiconductor device according to any one of [10] to [13] wherein the semiconductor wafer comprises a high hardness material substrate having a Mohs hardness of 8 or more.

本發明的第三發明是有關於壓製安裝框的半導體晶圓壓製裝置。 A third invention of the present invention is a semiconductor wafer pressing apparatus relating to a press mounting frame.

[15]一種半導體晶圓壓製裝置,其藉由具有加熱機構的上壓製板、與上壓製板相對的下壓製板夾住安裝框壓製而成,上述安裝框包含半導體晶圓、具有包圍上述半導體晶圓的框的環框A、遍及上述半導體晶圓的電路形成面與上述框A而貼附的如申請專利範圍第1項所述之半導體晶圓表面保護膜;且上述半導體晶圓的外直徑DW、與上述環框A的內直徑DAIN滿足式(1)DW<DAIN的關係;上述下壓製板在與上述上壓製板相對的面具有凸部;上述壓製時的上述凸部與上述安裝框的接觸面的外周為圓形。 [15] A semiconductor wafer pressing apparatus, which is formed by sandwiching a mounting frame with an upper pressing plate having a heating mechanism and a lower pressing plate opposite to the upper pressing plate, the mounting frame including a semiconductor wafer and having the semiconductor surrounding a ring frame A of a frame of the wafer, a semiconductor wafer surface protective film according to claim 1 attached to the circuit forming surface of the semiconductor wafer and the frame A; and the semiconductor wafer is external to the semiconductor wafer The diameter DW and the inner diameter DA IN of the ring frame A satisfy the relationship of the formula (1) DW < DA IN ; the lower pressing plate has a convex portion on a surface opposite to the upper pressing plate; and the convex portion at the time of pressing The outer circumference of the contact surface of the above mounting frame is circular.

[16]如[15]所述之半導體晶圓壓製裝置,其中上述凸部的高度為1 μm~100 μm。 [16] The semiconductor wafer pressing apparatus according to [15], wherein the height of the convex portion is 1 μm to 100 μm.

[17]如[15]或[16]所述之半導體晶圓壓製裝置,其中上述凸部的高度相對於半導體晶圓表面保護膜的軟化層(B)的厚度而為15%~100%的範圍內。 [17] The semiconductor wafer pressing apparatus according to [15] or [16] wherein the height of the convex portion is 15% to 100% with respect to the thickness of the softening layer (B) of the semiconductor wafer surface protective film. Within the scope.

[18]如[15]至[17]中任一項所述之半導體晶圓壓製裝 置,其中上述凸部的直徑CD滿足DW<CD<DAIN的關係。 [18] The semiconductor wafer pressing apparatus according to any one of [15] to [17] wherein the diameter CD of the convex portion satisfies the relationship of DW < CD < DA IN .

本發明的第四發明是有關於製作安裝框的半導體晶圓安裝裝置、以及使用其的半導體裝置的製造方法。 A fourth invention of the present invention relates to a semiconductor wafer mounting apparatus for manufacturing a mounting frame, and a method of manufacturing a semiconductor device using the same.

[19]一種半導體晶圓安裝裝置,其用於製作安裝框,該安裝框包含半導體晶圓、包圍上述半導體晶圓的環狀輔助構件B、包圍上述半導體晶圓與上述環狀輔助構件B的環框A、遍及上述半導體晶圓的電路形成面與上述環狀輔助構件B以及上述環框A而貼附的如[1]至[9]中任一項所述之半導體晶圓表面保護膜;且上述半導體晶圓的外直徑DW、上述環框A的內直徑DAIN、上述環狀輔助構件B的環外直徑DBOUT、以及上述環狀輔助構件B的環內直徑DBIN,滿足式(1)DW<DBIN<DBOUT<DAIN的關係;上述半導體晶圓安裝裝置包括:對上述半導體晶圓的電路形成面的相反面進行加熱的加熱單元,遍及上述半導體晶圓的電路形成面、上述環框A、以及上述環狀輔助構件B而轉動,以貼附上述半導體晶圓表面保護膜的貼附輥,以及沿著上述環框A的外形狀切割上述表面保護膜的膠帶切割機構。 [19] A semiconductor wafer mounting apparatus for fabricating a mounting frame, the mounting frame including a semiconductor wafer, an annular auxiliary member B surrounding the semiconductor wafer, and a surrounding of the semiconductor wafer and the annular auxiliary member B The ring-shaped frame A, the semiconductor wafer surface protective film according to any one of [1] to [9], which is attached to the circuit-forming surface of the semiconductor wafer, and the ring-shaped auxiliary member B and the ring frame A. And an outer diameter DW of the semiconductor wafer, an inner diameter DA IN of the ring frame A, an outer diameter DB OUT of the annular auxiliary member B, and an inner diameter DB IN of the annular auxiliary member B, satisfying expression (1) a relationship of DW < DB IN < DB OUT < DA IN ; the semiconductor wafer mounting apparatus includes: a heating unit that heats an opposite surface of a circuit formation surface of the semiconductor wafer, and a circuit formation over the semiconductor wafer a surface, the ring frame A, and the annular auxiliary member B are rotated to attach the attachment roller of the semiconductor wafer surface protective film, and the tape cutting of the surface protection film along the outer shape of the ring frame A mechanism

[20]如[19]所述之半導體晶圓安裝裝置,其中下述式所示的△D1與△D2的任意者均為DW的1%以內:△D1=DBIN-DW………(2) [20] The semiconductor wafer mounting device according to [19], wherein any one of ΔD1 and ΔD2 represented by the following formula is within 1% of DW: ΔD1 = DB IN - DW... 2)

△D2=DAIN-DBOUT………(3)。 ΔD2=DA IN -DB OUT ... (3).

本發明的第五發明是有關於以下的半導體裝置的製造方法。 A fifth invention of the present invention relates to a method of manufacturing a semiconductor device described below.

一種半導體裝置的製造方法,其包括:1')準備半導體晶圓的步驟;2')在半導體晶圓的外周形成實質上包含樹脂的隆起部的步驟;3')在半導體晶圓表面保護用膜上配置半導體晶圓的電路形成面的步驟;4')對藉由隆起部保持的半導體晶圓的電路非形成面進行研磨的步驟;5')將半導體晶圓表面保護用膜剝離的步驟;且上述包含樹脂的隆起部的儲存彈性模數GB(40)為10 MPa以上。 A method of manufacturing a semiconductor device, comprising: 1') a step of preparing a semiconductor wafer; 2') forming a ridge portion substantially containing a resin on an outer circumference of the semiconductor wafer; 3') protecting the surface of the semiconductor wafer a step of arranging a circuit forming surface of the semiconductor wafer on the film; 4') a step of polishing a circuit non-formed surface of the semiconductor wafer held by the bump; and 5') a step of peeling off the film for semiconductor wafer surface protection And the storage elastic modulus G B (40) of the embossed portion including the resin is 10 MPa or more.

本發明的半導體晶圓表面保護用膜即便對於特別是藍寶石基板等硬且脆的半導體晶圓,亦可無破損地進行背面研磨。 The film for semiconductor wafer surface protection of the present invention can be back-polished without damage even for a hard and brittle semiconductor wafer such as a sapphire substrate.

1.半導體晶圓表面保護用膜 1. Film for semiconductor wafer surface protection

本發明的半導體晶圓表面保護用膜包括基材層(A)、以及軟化層(B);根據需要可進一步包括黏著層(C)(參照圖1A)或輕黏著層(D)(參照圖1B)等。本發明中所述的膜的厚度並無限定,亦可稱為所謂的片。 The film for semiconductor wafer surface protection of the present invention includes a base material layer (A) and a softening layer (B); and may further include an adhesive layer (C) (refer to FIG. 1A) or a light adhesive layer (D) as needed (refer to the drawing) 1B) and so on. The thickness of the film described in the present invention is not limited and may be referred to as a so-called sheet.

關於基材層(A) About the substrate layer (A)

基材層(A)具有在將半導體晶圓表面保護用膜與半 導體晶圓熱壓接時的抑制半導體晶圓的翹曲,並保持形狀的功能。因此較佳為,基材層(A)在熱壓接溫度(約120℃~180℃的任意溫度)下具有一定值以上的儲存彈性模數。具體而言,較佳為基材層(A)在150℃的儲存彈性模數GA(150)為1 MPa以上,更佳為2 MPa以上。 The base material layer (A) has a function of suppressing warpage of the semiconductor wafer and maintaining the shape when the semiconductor wafer surface protective film is thermally pressure bonded to the semiconductor wafer. Therefore, it is preferable that the base material layer (A) has a storage elastic modulus of a certain value or more at a thermocompression bonding temperature (any temperature of about 120 ° C to 180 ° C). Specifically, the storage elastic modulus G A (150) of the base material layer (A) at 150 ° C is preferably 1 MPa or more, and more preferably 2 MPa or more.

基材層(A)的儲存彈性模數可藉由以下方法測定。即,準備包含構成基材層(A)的樹脂的厚度為500 μm的樣品膜。接著,將樣品膜放置於動態黏彈性測定裝置(TA Instruments公司製造:ARES)中,使用直徑8 mm的平行板型附加裝置(attachment),一邊以升溫速度3℃/分鐘自30℃升溫至200℃,一邊測定儲存彈性模數。測定頻率可設為1 Hz。測定結束後,根據所得的30℃~200℃的儲存彈性模數-溫度曲線,讀取150℃的儲存彈性模數G(Pa)的值。 The storage elastic modulus of the substrate layer (A) can be measured by the following method. That is, a sample film having a thickness of 500 μm including the resin constituting the base material layer (A) was prepared. Next, the sample film was placed in a dynamic viscoelasticity measuring apparatus (manufactured by TA Instruments: ARES), and a parallel plate type attachment device having a diameter of 8 mm was used, and the temperature was raised from 30 ° C to 200 at a temperature rising rate of 3 ° C /min. At °C, the storage elastic modulus was measured. The measurement frequency can be set to 1 Hz. After the end of the measurement, the value of the storage elastic modulus G (Pa) at 150 ° C was read from the obtained storage elastic modulus-temperature curve of 30 ° C to 200 ° C.

構成基材層(A)的樹脂只要滿足上述的儲存彈性模數即可。另外,如後述般,在黏著層(C)包含放射線硬化型黏著劑時,較佳為構成基材層(A)的樹脂具有透明性。此種樹脂的例子包括聚烯烴或聚酯等。即,基材層(A)可為聚烯烴膜、聚酯膜、聚烯烴層與聚酯層的積層膜等。聚烯烴膜的例子包括聚丙烯膜。聚酯膜的例子包括聚對苯二甲酸乙二酯膜、聚萘二甲酸乙二酯膜等。 The resin constituting the base material layer (A) may satisfy the above-described storage elastic modulus. In addition, when the adhesive layer (C) contains a radiation curable adhesive as described later, it is preferred that the resin constituting the base material layer (A) has transparency. Examples of such resins include polyolefins or polyesters and the like. That is, the base material layer (A) may be a polyolefin film, a polyester film, a laminated film of a polyolefin layer and a polyester layer, or the like. Examples of the polyolefin film include a polypropylene film. Examples of the polyester film include a polyethylene terephthalate film, a polyethylene naphthalate film, and the like.

構成基材層(A)的樹脂的密度較佳為900 kg/m3~1450 kg/m3。若構成基材層(A)的樹脂的密度小於900 kg/m3,則儲存彈性模數過低,因此存在形狀保持性不充分的情況。 The density of the resin constituting the substrate layer (A) is preferably from 900 kg/m 3 to 1450 kg/m 3 . When the density of the resin constituting the base material layer (A) is less than 900 kg/m 3 , the storage elastic modulus is too low, and thus the shape retainability may be insufficient.

基材層(A)的厚度就獲得可抑制半導體晶圓的翹曲的程度的剛性的觀點而言,例如較佳為5 μm以上,更佳為10 μm以上。基材層(A)的厚度的上限就防止半導體晶圓的破損的觀點而言,半導體晶圓表面保護用膜的總厚度只要設為相對於半導體晶圓的研磨精加工厚度而不過厚的程度即可。 The thickness of the base material layer (A) is preferably 5 μm or more, and more preferably 10 μm or more from the viewpoint of obtaining rigidity to suppress warpage of the semiconductor wafer. The upper limit of the thickness of the base material layer (A) is such that the total thickness of the semiconductor wafer surface protective film is not excessively thick with respect to the thickness of the polishing finish of the semiconductor wafer from the viewpoint of preventing breakage of the semiconductor wafer. Just fine.

關於軟化層(B) About the softening layer (B)

軟化層(B)具有為了穩定保持半導體晶圓的端部而在半導體晶圓的周圍形成隆起部(邊緣)的功能。如後述般,由於存在使半導體晶圓表面保護用膜與半導體晶圓熱壓接而形成隆起部(邊緣)的情況,因此必須以熱壓接溫度(120℃~180℃)使軟化層(B)軟化。即,軟化層(B)的軟化點溫度TmB較佳為低於熱壓接溫度(120℃~180℃)的低溫。軟化點溫度TmB可根據示差掃描熱析儀(differential scanning calorimeter,DSC)測定而求出,具體而言,將依據ISO-11357-3的樹脂材料的熔點(DSC法)設為軟化點溫度。 The softened layer (B) has a function of forming a ridge (edge) around the semiconductor wafer in order to stably hold the end of the semiconductor wafer. As described later, since the semiconductor wafer surface protective film and the semiconductor wafer are thermally pressure-bonded to form a ridge (edge), it is necessary to form the softened layer at a thermocompression bonding temperature (120 ° C to 180 ° C). )soften. That is, the softening point temperature TmB of the softened layer (B) is preferably lower than the hot pressing temperature (120 ° C to 180 ° C). The softening point temperature TmB can be determined by a differential scanning calorimeter (DSC) measurement. Specifically, the melting point (DSC method) of the resin material according to ISO-11357-3 is set as the softening point temperature.

120℃~180℃的任意溫度的軟化層(B)的儲存彈性模數GB(120~180)、較佳為150℃的軟化層(B)的儲存彈性模數GB(150),較佳為0.05 MPa以下,更佳為0.03 MPa以下。 The storage elastic modulus G B (150-180) of the softened layer (B) at any temperature from 120 ° C to 180 ° C, preferably the storage elastic modulus G B (150) of the softened layer (B) at 150 ° C, Preferably, it is 0.05 MPa or less, more preferably 0.03 MPa or less.

另一方面,為了在背面研磨時(濕式拋光)隆起部(邊緣)不軟化,而必須使軟化層(B)在背面研磨時的溫度(40℃附近)下不軟化。因此,40℃的儲存彈性模數GB (40)較佳為10 MPa以上,更佳為20 MPa以上,尤佳為30 MPa以上。40℃的儲存彈性模數GB(40)的上限通常可設為500 MPa以下左右。為了使軟化層(B)在40℃的儲存彈性模數GB(40)為10 MPa以上,較佳為如後述般將構成軟化層(B)的樹脂設為並非彈性體的樹脂。如後述般,儲存彈性模數G為拉伸彈性模數E的約1/3。例如,所謂「使軟化層(B)在40℃的儲存彈性模數GB(40)為10 MPa以上」,亦可稱為「使軟化層(B)在40℃的拉伸彈性模數EB(40)為30 MPa以上」。 On the other hand, in order to prevent the ridges (edges) from softening during back grinding (wet polishing), it is necessary to make the softened layer (B) not soften at the temperature (near 40 ° C) at the time of back grinding. Therefore, the storage elastic modulus G B (40) at 40 ° C is preferably 10 MPa or more, more preferably 20 MPa or more, and particularly preferably 30 MPa or more. The upper limit of the storage elastic modulus G B (40) at 40 ° C can be usually set to about 500 MPa or less. In order to make the softening layer (B) have a storage elastic modulus G B (40) of 40 MPa or more at 40 ° C, it is preferred that the resin constituting the softened layer (B) be a resin which is not an elastomer as will be described later. As will be described later, the storage elastic modulus G is about 1/3 of the tensile elastic modulus E. For example, "the storage elastic modulus G B (40) of the softened layer (B) at 40 ° C is 10 MPa or more", which may also be called "the tensile elastic modulus E of the softened layer (B) at 40 ° C" B (40) is 30 MPa or more."

背面研磨通常藉由濕式進行,根據需要亦可進一步藉由乾式進行。乾式背面研磨(乾式拋光)時的晶圓溫度,由於磨石與半導體晶圓的摩擦熱較大,因此約100℃左右。因此,為了在乾式拋光時隆起部(邊緣)亦不軟化,較佳為軟化層(B)在100℃的儲存彈性模數GB(100)為1 MPa以上,更佳為3 MPa以上。 The back grinding is usually carried out by a wet method, and can be further carried out by dryness as needed. The wafer temperature at the time of dry back grinding (dry polishing) is about 100 ° C because the friction heat between the grindstone and the semiconductor wafer is large. Therefore, in order to prevent softening of the ridge portion (edge) during dry polishing, it is preferred that the softening layer (B) has a storage elastic modulus G B (100) at 100 ° C of 1 MPa or more, more preferably 3 MPa or more.

軟化層(B)在60℃的拉伸彈性模數EB(60)與在25℃的拉伸彈性模數EB(25),較佳為1>EB(60)/EB(25)>0.1。對半導體晶圓進行背面研磨時的半導體晶圓的溫度大多在25℃~60℃的範圍內變化。因此,藉由使該溫度範圍內的軟化層(B)的儲存彈性模數的變化率在固定範圍內,而包含軟化層(B)的隆起部可穩定保持半導體晶圓。另外,可抑制包含軟化層(B)的隆起部在半導體晶圓的背面研磨中劣化。因此,可更有效地抑制在半導體晶圓的背面研磨中的半導體晶圓的破損。 Softened layer (B) at 60 deg.] C a tensile modulus of elasticity E B (60) at 25 deg.] C and a tensile modulus of elasticity E B (25), preferably 1> E B (60) / E B (25 )>0.1. The temperature of the semiconductor wafer when the semiconductor wafer is back-polished is often changed within a range of 25 ° C to 60 ° C. Therefore, by changing the rate of change in the storage elastic modulus of the softened layer (B) in the temperature range within a fixed range, the ridge portion including the softened layer (B) can stably hold the semiconductor wafer. In addition, it is possible to suppress deterioration of the ridge portion including the soft layer (B) during back surface polishing of the semiconductor wafer. Therefore, damage of the semiconductor wafer in the back surface polishing of the semiconductor wafer can be more effectively suppressed.

軟化層(B)的拉伸彈性模數E的測定可如以下方式進行測定。i)剪切厚度100 μm的膜,準備寬度(TD方向)10 mm、長度(MD方向)100 mm的短條狀試樣片。ii)接著,依據JIS K7161,藉由拉伸試驗機以夾頭間距離50 mm、拉伸速度300 mm/分鐘的條件,測定試樣片的拉伸彈性模數。拉伸彈性模數的測定是在溫度23℃、相對濕度55%的條件下進行。拉伸彈性模數E大多為儲存彈性模數G的3倍左右。 The measurement of the tensile elastic modulus E of the softened layer (B) can be carried out as follows. i) A film having a thickness of 100 μm was cut, and a short strip of a sample having a width (TD direction) of 10 mm and a length (MD direction) of 100 mm was prepared. Ii) Next, according to JIS K7161, the tensile elastic modulus of the sample piece was measured by a tensile tester under the conditions of a distance between the chucks of 50 mm and a tensile speed of 300 mm/min. The measurement of the tensile elastic modulus was carried out under the conditions of a temperature of 23 ° C and a relative humidity of 55%. The tensile elastic modulus E is mostly about three times the storage elastic modulus G.

構成軟化層(B)的樹脂若滿足上述儲存彈性模數,則並無特別限定,較佳為非彈性體。具體而言,較佳為烴烯烴的均聚物或共聚物,更佳為乙烯均聚物、丙烯均聚物、或乙烯或丙烯與其以外的烴烯烴的共聚物。另一方面,例如乙烯-乙酸乙烯酯共聚物(EVA)通常是40℃的儲存彈性模數G(40)為0.01 MPa~0.1 MPa左右,由於小於10 MPa,因此欠佳。 The resin constituting the softened layer (B) is not particularly limited as long as it satisfies the above storage elastic modulus, and is preferably a non-elastomer. Specifically, a homopolymer or copolymer of a hydrocarbon olefin is preferred, and a copolymer of ethylene homopolymer, propylene homopolymer, or ethylene or propylene other than a hydrocarbon olefin is more preferred. On the other hand, for example, the ethylene-vinyl acetate copolymer (EVA) usually has a storage elastic modulus G (40) of 40 ° C of about 0.01 MPa to 0.1 MPa, and is less than 10 MPa, which is not preferable.

乙烯或丙烯與其以外的烴烯烴的共聚物中的乙烯或丙烯以外的烴烯烴,較佳為碳原子數3~12的α-烯烴。碳原子數3~12的α-烯烴的例子包括:丙烯、1-丁烯、1-戊烯、3-甲基-1-丁烯、1-己烯、4-甲基-1-戊烯、3-甲基-1-戊烯、1-庚烯、1-辛烯、1-癸烯、1-十二碳烯等,較佳為丙烯、1-丁烯等。 The hydrocarbon or olefin other than ethylene or propylene in the copolymer of ethylene or propylene and other hydrocarbon olefins is preferably an α-olefin having 3 to 12 carbon atoms. Examples of the α-olefin having 3 to 12 carbon atoms include: propylene, 1-butene, 1-pentene, 3-methyl-1-butene, 1-hexene, 4-methyl-1-pentene And 3-methyl-1-pentene, 1-heptene, 1-octene, 1-decene, 1-dodecene, etc., preferably propylene, 1-butene or the like.

構成軟化層(B)的樹脂的較佳具體例包括:直鏈狀低密度聚乙烯(LLDPE)、低密度聚乙烯、高密度聚乙烯、聚丙烯、聚苯乙烯、丙烯腈-丁二烯-苯乙烯共聚物 (Acrylonitrile Butadiene Styrene,ABS)樹脂、氯乙烯樹脂、甲基丙烯酸甲酯樹脂、尼龍、氟樹脂、聚碳酸酯、聚酯樹脂等,較佳為直鏈狀低密度聚乙烯(LLDPE)、低密度聚乙烯、高密度聚乙烯、聚丙烯等。 Preferred specific examples of the resin constituting the softening layer (B) include linear low density polyethylene (LLDPE), low density polyethylene, high density polyethylene, polypropylene, polystyrene, acrylonitrile-butadiene- Styrene copolymer (Acrylonitrile Butadiene Styrene, ABS) resin, vinyl chloride resin, methyl methacrylate resin, nylon, fluororesin, polycarbonate, polyester resin, etc., preferably linear low density polyethylene (LLDPE), low density Polyethylene, high density polyethylene, polypropylene, etc.

構成軟化層(B)的樹脂的密度較佳為880 kg/m3~960 kg/m3,更佳為900 kg/m3~960 kg/m3,尤佳為910 kg/m3~950 kg/m3。若構成軟化層(B)的樹脂的密度小於880 kg/m3,則有在40℃下軟化的情況。另一方面,若樹脂的密度超過960 kg/m3,則有在熱壓接溫度下難以軟化的情況。 The density of the resin constituting the softened layer (B) is preferably 880 kg/m 3 to 960 kg/m 3 , more preferably 900 kg/m 3 to 960 kg/m 3 , and particularly preferably 910 kg/m 3 to 950. Kg/m 3 . If the density of the resin constituting the softened layer (B) is less than 880 kg/m 3 , it may be softened at 40 ° C. On the other hand, if the density of the resin exceeds 960 kg/m 3 , it may be difficult to soften at the thermocompression bonding temperature.

軟化層(B)的儲存彈性模數可根據乙烯或丙烯的均聚物的密度、乙烯或丙烯與其以外的烴烯烴的共聚物中的乙烯或丙烯以外的烴烯烴的種類及其含有比例等進行調整。例如為了提高軟化層(B)在40℃的儲存彈性模數,例如只要提高乙烯或丙烯的均聚物的密度、或提高乙烯或丙烯與其以外的烴烯烴的共聚物中的乙烯或丙烯的含有比例即可。 The storage elastic modulus of the softened layer (B) can be determined according to the density of the homopolymer of ethylene or propylene, the type of the hydrocarbon olefin other than ethylene or propylene in the copolymer of ethylene or propylene and the hydrocarbon olefin other than the propylene, and the content ratio thereof. Adjustment. For example, in order to increase the storage elastic modulus of the softened layer (B) at 40 ° C, for example, it is necessary to increase the density of the homopolymer of ethylene or propylene or to increase the content of ethylene or propylene in the copolymer of ethylene or propylene and other hydrocarbon olefins. The ratio can be.

軟化層(B)的厚度只要是藉由與半導體晶圓的熱壓接而可形成邊緣,且可嵌入半導體晶圓表面的凹凸的程度即可。因此,軟化層(B)的厚度較佳為大於半導體晶圓的電路形成面的階差的最大值,較佳為階差的最大值的1.1倍以上。具體而言,若階差為50 μm,則軟化層(B)的厚度更佳為55 μm以上,尤佳為60 μm以上。另一方面認為,若軟化層(B)過厚,則與較薄時相比,難以抑制研磨中 的半導體晶圓的變形(彎曲或撓曲),因此容易破損。因此,軟化層(B)的厚度較佳為設為100 μm以下,更佳為設為70 μm以下。 The thickness of the softened layer (B) may be such that an edge can be formed by thermocompression bonding with a semiconductor wafer, and the unevenness of the surface of the semiconductor wafer can be embedded. Therefore, the thickness of the softened layer (B) is preferably larger than the maximum value of the step of the circuit formation surface of the semiconductor wafer, and is preferably 1.1 times or more of the maximum value of the step. Specifically, when the step is 50 μm, the thickness of the softened layer (B) is more preferably 55 μm or more, and particularly preferably 60 μm or more. On the other hand, it is considered that if the softened layer (B) is too thick, it is difficult to suppress the grinding during the polishing. The semiconductor wafer is deformed (bent or flexed) and is therefore easily broken. Therefore, the thickness of the softened layer (B) is preferably 100 μm or less, and more preferably 70 μm or less.

軟化層(B)根據需要可進一步包含其他樹脂或添加劑。添加劑的例子包括:紫外線吸收劑、抗氧化劑、耐熱穩定劑、潤滑劑、柔軟劑等。 The softening layer (B) may further contain other resins or additives as needed. Examples of the additives include ultraviolet absorbers, antioxidants, heat stabilizers, lubricants, softeners, and the like.

關於黏著層(C) About Adhesive Layer (C)

本發明的半導體晶圓表面保護用膜為了提高與半導體晶圓的密接性,較佳為進一步包含黏著層(C)。另一方面,若黏著層(C)的黏著力過高,則自半導體晶圓剝離時容易殘膠。因此,黏著層(C)只要具有最低限度的黏著力即可,具體而言,較佳為依據JIS Z0237而測定的黏著力為0.1 N/25 mm~10 N/25 mm。 The film for semiconductor wafer surface protection of the present invention preferably further includes an adhesive layer (C) in order to improve adhesion to the semiconductor wafer. On the other hand, if the adhesive force of the adhesive layer (C) is too high, the adhesive is liable to be lost when peeling off from the semiconductor wafer. Therefore, the adhesive layer (C) is only required to have a minimum adhesive force. Specifically, the adhesive force measured in accordance with JIS Z0237 is preferably 0.1 N/25 mm to 10 N/25 mm.

黏著層(C)的儲存彈性模數只要是不阻礙軟化層(B)的隆起部(邊緣)的形成的程度即可。 The storage elastic modulus of the adhesive layer (C) may be such a degree as not to hinder the formation of the ridges (edges) of the softened layer (B).

構成黏著層(C)的黏著劑(黏著主劑)可為丙烯酸系黏著劑、矽酮系黏著劑、或橡膠系黏著劑等。其中,就容易調整接著力等方面而言,較佳為將丙烯酸系聚合物作為基礎聚合物的丙烯酸系黏著劑。 The adhesive (adhesive agent) constituting the adhesive layer (C) may be an acrylic adhesive, an anthrone adhesive, or a rubber adhesive. Among them, an acrylic adhesive having an acrylic polymer as a base polymer is preferred in terms of easy adjustment of adhesion and the like.

構成黏著層(C)的黏著劑可為放射線硬化型黏著劑。原因是,包含放射線硬化型黏著劑的黏著層,由於藉由放射線的照射而硬化,因此可自晶圓容易地剝離。放射線可為紫外線、電子束、紅外線等。 The adhesive constituting the adhesive layer (C) may be a radiation hardening type adhesive. The reason is that the adhesive layer containing the radiation-curable adhesive is hardened by irradiation of radiation, and thus can be easily peeled off from the wafer. The radiation may be ultraviolet rays, electron beams, infrared rays or the like.

放射線硬化型黏著劑可包含:上述黏著主劑、分子內 具有碳-碳雙鍵的化合物、以及放射線聚合起始劑;亦可包含:將分子內具有碳-碳雙鍵的聚合物作為基礎聚合物的黏著主劑、以及放射線聚合起始劑。 The radiation hardening adhesive may include: the above adhesive main agent, intramolecular A compound having a carbon-carbon double bond and a radiation polymerization initiator; and may further comprise: a binder which has a polymer having a carbon-carbon double bond in the molecule as a base polymer, and a radiation polymerization initiator.

分子內具有碳-碳雙鍵的化合物的例子包括:三羥甲基丙烷三(甲基)丙烯酸酯、季戊四醇三(甲基)丙烯酸酯、二季戊四醇六(甲基)丙烯酸酯、四乙二醇二(甲基)丙烯酸酯等。放射線硬化性化合物的含量相對於黏著劑100重量份可設為30重量份以下左右。 Examples of the compound having a carbon-carbon double bond in the molecule include: trimethylolpropane tri(meth)acrylate, pentaerythritol tri(meth)acrylate, dipentaerythritol hexa(meth)acrylate, tetraethylene glycol. Di(meth)acrylate and the like. The content of the radiation curable compound may be about 30 parts by weight or less based on 100 parts by weight of the adhesive.

放射線聚合起始劑的例子包括:甲氧基苯乙酮等苯乙酮系光聚合起始劑;4-(2-羥基乙氧基)苯基(2-羥基-2-丙基)酮等α-酮醇化合物;苯偶醯二甲基縮酮等縮酮系化合物;安息香、安息香甲醚等安息香系光聚合起始劑;二苯甲酮、苯甲醯基苯甲酸等二苯甲酮系光聚合起始劑。 Examples of the radiation polymerization initiator include: an acetophenone-based photopolymerization initiator such as methoxyacetophenone; 4-(2-hydroxyethoxy)phenyl(2-hydroxy-2-propyl)one; An α-keto alcohol compound; a ketal compound such as benzoin dimethyl ketal; a benzoin photopolymerization initiator such as benzoin or benzoin methyl ether; a benzophenone such as benzophenone or benzoyl benzoic acid; A photopolymerization initiator.

放射線硬化型黏著劑根據需要可進一步包含交聯劑。交聯劑的例子包括:二苯基甲烷二異氰酸酯、甲苯二異氰酸酯、六亞甲基二異氰酸酯、聚異氰酸酯等異氰酸酯系交聯劑。 The radiation hardening type adhesive may further contain a crosslinking agent as needed. Examples of the crosslinking agent include isocyanate crosslinking agents such as diphenylmethane diisocyanate, toluene diisocyanate, hexamethylene diisocyanate, and polyisocyanate.

黏著層(C)的厚度只要是不阻礙軟化層(B)的邊緣形成的程度即可,例如相對於軟化層(B)的厚度可設為1%~20%左右、具體可設為1 μm~20 μm左右。 The thickness of the adhesive layer (C) may be such that it does not inhibit the formation of the edge of the softened layer (B). For example, the thickness of the softened layer (B) may be set to about 1% to 20%, and specifically may be 1 μm. ~20 μm or so.

關於輕黏著層(D) About light adhesive layer (D)

本發明的半導體晶圓表面保護用膜可具有用以使基材層(A)與軟化層(B)可相互剝離地接著的輕黏著層(D)。輕黏著層(D)的材質的例子包括丙烯酸系黏著劑等。 The film for semiconductor wafer surface protection of the present invention may have a lightly-adhesive layer (D) for allowing the base material layer (A) and the softening layer (B) to be peeled off from each other. Examples of the material of the light adhesive layer (D) include an acrylic adhesive and the like.

本發明的半導體晶圓表面保護用膜若具有輕黏著層(D),則基材層(A)與軟化層(B)可相互剝離。因此,在將半導體晶圓表面保護用膜貼附於半導體晶圓後,可自半導體晶圓表面保護用膜剝離除去基材層(A)。例如可於在半導體晶圓的外周形成半導體表面保護用膜的隆起部的步驟(參照圖2C)後,且在將半導體晶圓的電路非形成面研磨的步驟(參照圖2E)前,將基材層(A)自半導體晶圓表面保護用膜剝離除去。 When the film for semiconductor wafer surface protection of the present invention has the light adhesive layer (D), the base material layer (A) and the softened layer (B) can be peeled off from each other. Therefore, after the semiconductor wafer surface protective film is attached to the semiconductor wafer, the base material layer (A) can be peeled off from the semiconductor wafer surface protective film. For example, after the step of forming the ridge portion of the film for semiconductor surface protection on the outer periphery of the semiconductor wafer (see FIG. 2C), and before the step of polishing the surface of the semiconductor wafer (see FIG. 2E), the substrate may be used. The material layer (A) is peeled off from the film for surface protection of the semiconductor wafer.

若將基材層(A)剝離後對半導體晶圓的電路非形成面進行研磨,則可實現更精密的研磨。在半導體晶圓的研磨中,半導體晶圓表面保護用膜由於研磨磨石的荷重而彎曲、或振動,從而阻礙精密的研磨。相對於此,若將基材層(A)剝離而使半導體晶圓表面保護用膜薄層化後對半導體晶圓進行研磨,則會抑制半導體晶圓表面保護用膜的彎曲或振動。因此。可實現更精密的研磨。 When the base material layer (A) is peeled off and the circuit non-formed surface of the semiconductor wafer is polished, more precise polishing can be achieved. In the polishing of a semiconductor wafer, the film for semiconductor wafer surface protection is bent or vibrated by the load of the grindstone, thereby impeding fine polishing. On the other hand, when the base material layer (A) is peeled off and the semiconductor wafer surface protective film is thinned, and the semiconductor wafer is polished, bending or vibration of the semiconductor wafer surface protective film is suppressed. therefore. More precise grinding is possible.

本發明的半導體晶圓表面保護用膜根據需要可進一步包含其他層。其他層例如可為脫模膜等。 The film for semiconductor wafer surface protection of the present invention may further contain other layers as needed. The other layer may be, for example, a release film or the like.

如上所述,半導體晶圓表面保護用膜包括基材層(A)、以及軟化層(B)。較佳為基材層(A)配置於半導體晶圓表面保護用膜的最表面。在半導體晶圓表面保護用膜進一步包括黏著層(C)時,較佳為黏著層(C)配置於與基材層(A)的相反側的最表面。軟化層(B)可為單層,亦可為多層。 As described above, the film for semiconductor wafer surface protection includes the substrate layer (A) and the softened layer (B). It is preferable that the base material layer (A) is disposed on the outermost surface of the film for semiconductor wafer surface protection. When the film for semiconductor wafer surface protection further includes the adhesive layer (C), it is preferable that the adhesive layer (C) is disposed on the outermost surface on the opposite side to the substrate layer (A). The softening layer (B) may be a single layer or a plurality of layers.

圖1A與圖1B是表示半導體晶圓表面保護用膜的構成 的一例的圖。如圖1A所示,半導體晶圓表面保護用膜10包括:基材層(A)12、軟化層(B)14、以及黏著層(C)16。如圖1B所示,半導體晶圓表面保護用膜10'包括:基材層(A)12、輕黏著層(D)18、軟化層(B)14、以及黏著層(C)16。半導體晶圓表面保護用膜10及10'是以黏著層(C)16與半導體晶圓的電路形成面接觸的方式使用。 1A and 1B show the constitution of a film for protecting a surface of a semiconductor wafer. A picture of an example. As shown in FIG. 1A, a film 10 for semiconductor wafer surface protection includes a substrate layer (A) 12, a softened layer (B) 14, and an adhesive layer (C) 16. As shown in FIG. 1B, the semiconductor wafer surface protection film 10' includes a base material layer (A) 12, a light adhesive layer (D) 18, a softening layer (B) 14, and an adhesive layer (C) 16. The semiconductor wafer surface protection films 10 and 10' are used in such a manner that the adhesive layer (C) 16 is in surface contact with the circuit formation surface of the semiconductor wafer.

本發明的半導體晶圓表面保護用膜可藉由任意的方法製造。例如有:1)將基材層(A)與軟化層(B)進行共擠出成形而獲得半導體晶圓表面保護用膜的方法(共擠出形成法);2)將膜狀基材層(A)、與膜狀軟化層(B)進行層壓(積層)而獲得半導體晶圓表面保護用膜的方法(層壓法)等。進一步包括黏著層(C)的半導體晶圓表面保護用膜可藉由在基材層(A)與軟化層(B)的積層膜上塗佈形成黏著層用塗佈液而製造。 The film for semiconductor wafer surface protection of the present invention can be produced by any method. For example, there are: 1) a method of co-extruding a base material layer (A) and a softening layer (B) to obtain a film for surface protection of a semiconductor wafer (co-extrusion formation method); 2) a film-form substrate layer (A) A method (lamination method) in which a film for film surface protection of a semiconductor wafer is laminated (laminated) with a film-like softened layer (B). The film for semiconductor wafer surface protection further including the adhesive layer (C) can be produced by applying a coating liquid for forming an adhesive layer on a laminated film of the base material layer (A) and the softening layer (B).

2.半導體裝置的製造方法 2. Method of manufacturing a semiconductor device

使用本發明的半導體晶圓表面保護用膜的半導體裝置的製造方法的一例包括:1)在半導體晶圓表面保護用膜上配置半導體晶圓的步驟(安裝步驟);2)在半導體晶圓的外周形成保持半導體晶圓的半導體晶圓表面保護用膜的隆起部的步驟(壓製步驟);3)對藉由隆起部保持的半導體晶圓的電路非形成面進行研磨的步驟;以及4)將半導體晶圓表面保護用膜剝離的步驟。本發明中的3)對藉由半導體晶圓表面保護用膜保持的半導體晶圓的電路非形成面 進行研磨的步驟,是指不弄破半導體晶圓、或不破損地薄化加工至特定的厚度。在進行這些步驟後,可進一步進行切割半導體晶圓而晶片化的步驟等。 An example of a method of manufacturing a semiconductor device using the semiconductor wafer surface protective film of the present invention includes: 1) a step of disposing a semiconductor wafer on a film for protecting a semiconductor wafer surface (mounting step); and 2) a semiconductor wafer a step of forming a raised portion of the semiconductor wafer surface protective film for holding the semiconductor wafer on the outer periphery (pressing step); 3) a step of polishing the non-formed surface of the semiconductor wafer held by the raised portion; and 4) The step of peeling off the film for semiconductor wafer surface protection. 3) in the present invention, a circuit non-forming surface of a semiconductor wafer held by a film for semiconductor wafer surface protection The step of polishing means that the semiconductor wafer is not broken or thinned to a specific thickness without damage. After these steps are performed, the step of cutting the semiconductor wafer and wafer formation can be further performed.

使用半導體晶圓表面保護用膜的半導體裝置的製造方法的其他例子包括:1')準備半導體晶圓的步驟;2')在半導體晶圓的外周形成實質上包含樹脂的隆起部的步驟;3')在半導體晶圓表面保護用膜上配置半導體晶圓的電路形成面的步驟;4')藉由隆起部而保持的半導體晶圓的電路非形成面進行研磨的步驟;5')將半導體晶圓表面保護用膜剝離的步驟。2')形成隆起部的步驟、與3')在半導體晶圓表面保護用膜上配置半導體晶圓的電路形成面的步驟的任一步驟均可先進行。 Other examples of the method of manufacturing a semiconductor device using a film for semiconductor wafer surface protection include: 1') a step of preparing a semiconductor wafer; 2') a step of forming a ridge portion substantially containing a resin on the outer periphery of the semiconductor wafer; ') a step of arranging a circuit formation surface of the semiconductor wafer on the semiconductor wafer surface protection film; 4') a step of polishing the circuit non-formation surface of the semiconductor wafer held by the ridge portion; 5') a semiconductor The step of peeling off the film for wafer surface protection. 2') The step of forming the ridge portion and the step of 3') arranging the circuit formation surface of the semiconductor wafer on the semiconductor wafer surface protection film may be performed first.

2')步驟中,形成於半導體晶圓的外周的實質上包含樹脂的隆起部,可由與構成半導體晶圓表面保護用膜的材料不同的樹脂材料構成。此時,半導體晶圓表面保護用膜並不限定於上述本發明的半導體晶圓表面保護用膜,亦可為通常使用的半導體晶圓表面保護膜。實質上包含樹脂的隆起部的儲存彈性模數GB(40)只要為10 MPa以上即可;另外,儲存彈性模數GB(100)較佳為1 MPa以上。 In the step 2'), the ridge portion substantially including the resin formed on the outer periphery of the semiconductor wafer may be made of a resin material different from the material constituting the film for semiconductor wafer surface protection. In this case, the semiconductor wafer surface protective film is not limited to the above-described semiconductor wafer surface protective film of the present invention, and may be a commonly used semiconductor wafer surface protective film. The storage elastic modulus G B (40) of the ridge portion substantially including the resin may be 10 MPa or more, and the storage elastic modulus G B (100) is preferably 1 MPa or more.

另外,亦將經過2')步驟而形成的半導體晶圓與配置於其外周的實質上包含樹脂的隆起部(邊緣)的組合稱為帶邊緣的半導體晶圓。帶邊緣的半導體晶圓只要包括半導體晶圓與實質上包含樹脂的隆起部即可;亦可包括半導體晶圓與實質上包含樹脂的隆起部、支持這些構件的半導體 晶圓表面保護用膜。半導體晶圓表面保護用膜貼附於半導體晶圓的電路形成面。 Further, the combination of the semiconductor wafer formed by the 2') step and the ridge portion (edge) substantially including the resin disposed on the outer periphery thereof is referred to as a semiconductor wafer with an edge. The edge-attached semiconductor wafer may include a semiconductor wafer and a ridge substantially containing a resin; and may include a semiconductor wafer and a ridge substantially containing a resin, and a semiconductor supporting the member Film for wafer surface protection. The film for semiconductor wafer surface protection is attached to the circuit formation surface of the semiconductor wafer.

另外,亦可包括6')以包圍半導體晶圓的方式配置環框(參照圖2B中的符號30)的步驟。配置環框的步驟只要在1')準備半導體晶圓的步驟之後、且較4')進行研磨的步驟之前即可。另外,只要在環框(參照圖2B中的符號30)與半導體晶圓之間隙存在隆起部即可。 In addition, the step of 6') arranging the ring frame (refer to symbol 30 in FIG. 2B) so as to surround the semiconductor wafer may be included. The step of arranging the ring frame may be performed after the step of preparing the semiconductor wafer 1') and before the step of polishing 4'). Further, it is only necessary to have a ridge portion in the gap between the ring frame (see reference numeral 30 in FIG. 2B) and the semiconductor wafer.

在帶邊緣的半導體晶圓中,隆起部與半導體晶圓之緣的間隔較佳為0 mm~1 mm,更佳為0 μm~500 μm,尤佳為隆起部與半導體晶圓之緣接觸。原因是隆起部保持半導體晶圓。 In the semiconductor wafer with the edge, the distance between the ridge and the edge of the semiconductor wafer is preferably 0 mm to 1 mm, more preferably 0 μm to 500 μm, and particularly preferably the ridge is in contact with the edge of the semiconductor wafer. The reason is that the ridges hold the semiconductor wafer.

半導體晶圓並無特別限制,可為在表面形成有配線、電容器、二極體或電晶體等電路的矽基板或藍寶石基板等。利用本案發明的半導體晶圓表面保護用膜等在半導體晶圓的外周形成隆起部(邊緣)並對晶圓的電路非形成面進行研磨,藉此即便是包含莫氏硬度為8以上的高硬度材料基板的半導體晶圓,亦可抑制半導體晶圓的破損。另外,本案發明的半導體晶圓可為在藍寶石基板上積層GaN等半導體層的半導體晶圓。在製造發光二極體(light emitting diode,LED)元件等半導體裝置時,較佳為使用形成有電路的藍寶石基板。半導體晶圓的尺寸並無特別限制,可為2英吋、4英吋、6英吋、8英吋等。在半導體晶圓的電路形成面上可設置1 μm~50 μm的階差。 The semiconductor wafer is not particularly limited, and may be a tantalum substrate or a sapphire substrate on which a circuit such as a wiring, a capacitor, a diode, or a transistor is formed on the surface. The semiconductor wafer surface protection film or the like according to the present invention forms a raised portion (edge) on the outer periphery of the semiconductor wafer and polishes the circuit non-formed surface of the wafer, thereby providing a high hardness including a Mohs hardness of 8 or more. The semiconductor wafer of the material substrate can also suppress breakage of the semiconductor wafer. Further, the semiconductor wafer of the present invention may be a semiconductor wafer in which a semiconductor layer such as GaN is laminated on a sapphire substrate. When manufacturing a semiconductor device such as a light emitting diode (LED) device, it is preferable to use a sapphire substrate on which a circuit is formed. The size of the semiconductor wafer is not particularly limited and may be 2 inches, 4 inches, 6 inches, 8 inches, and the like. A step of 1 μm to 50 μm can be set on the circuit formation surface of the semiconductor wafer.

在半導體晶圓的周圍所形成的半導體晶圓表面保護用 膜的隆起部(邊緣),是形成於半導體晶圓的外周、且保持半導體晶圓的端部的部位。半導體晶圓表面保護用膜的隆起部可由半導體晶圓表面保護用膜本身構成;亦可由與構成半導體晶圓表面保護用膜的材料不同的材料構成。 Semiconductor wafer surface protection formed around a semiconductor wafer The raised portion (edge) of the film is a portion formed on the outer periphery of the semiconductor wafer and holding the end portion of the semiconductor wafer. The raised portion of the film for semiconductor wafer surface protection may be composed of a film for protecting the surface of the semiconductor wafer, or may be made of a material different from the material constituting the film for protecting the surface of the semiconductor wafer.

為了藉由與構成半導體晶圓表面保護用膜的材料不同的樹脂材料構成隆起部,例如有以下的方法。在各方法中,半導體晶圓可為安裝於半導體晶圓表面保護用膜的半導體晶圓,亦可為安裝前的半導體晶圓。 In order to form the ridge portion by a resin material different from the material constituting the film for semiconductor wafer surface protection, for example, the following method is available. In each method, the semiconductor wafer may be a semiconductor wafer mounted on a film for semiconductor wafer surface protection, or may be a semiconductor wafer before mounting.

方法1)如圖8A所示,在半導體晶圓20的周圍,藉由分配器100等塗佈裝置塗佈液狀接著劑105並使其硬化的方法 Method 1) As shown in FIG. 8A, a method of applying a liquid adhesive 105 by a coating device such as a dispenser 100 and hardening it around a semiconductor wafer 20

方法2)如圖8B所示,將半導體晶圓20插入至具有與半導體晶圓20的直徑大致相同直徑的貫通孔的樹脂製環110中的方法 Method 2) As shown in FIG. 8B, a method of inserting a semiconductor wafer 20 into a resin ring 110 having through holes having substantially the same diameter as that of the semiconductor wafer 20

方法3)如圖8C所示,在插入了半導體晶圓20的模具120的腔體125中,注入熔融樹脂進行冷卻固化而在半導體晶圓的周圍進行樹脂形成的方法 Method 3) As shown in FIG. 8C, a method of injecting molten resin into a cavity 125 of a mold 120 in which a semiconductor wafer 20 is inserted, and cooling and solidifying the resin to form a resin around the semiconductor wafer

方法1)中,藉由分配器100塗佈的液狀接著劑105在塗佈時(硬化前)的黏度只要為約1 Pa‧s~500 Pa‧s即可;接著劑105的硬化物的儲存彈性模數GB(40)只要為10 MPa以上即可;另外,儲存彈性模數GB(100)較佳為1 MPa以上。即,接著劑105的硬化物較佳為具有與上述半導體晶圓表面保護用膜中的軟化層(B)同樣的彈性模數。液狀接著劑105的例子包括:環氧樹脂、丙烯酸 系樹脂、胺基甲酸酯樹脂、酚樹脂等。 In the method 1), the viscosity of the liquid adhesive 105 applied by the dispenser 100 at the time of coating (before hardening) is only about 1 Pa‧s to 500 Pa‧s; the cured product of the adhesive 105 is The storage elastic modulus G B (40) may be 10 MPa or more, and the storage elastic modulus G B (100) is preferably 1 MPa or more. That is, the cured product of the adhesive 105 preferably has the same elastic modulus as the softened layer (B) in the film for semiconductor wafer surface protection. Examples of the liquid adhesive 105 include an epoxy resin, an acrylic resin, a urethane resin, a phenol resin, and the like.

方法2)中,具有與半導體晶圓20的直徑相同直徑的貫通孔的樹脂製環110的儲存彈性模數GB(40)只要為10 MPa以上即可;另外,儲存彈性模數GB(100)較佳為1 MPa以上。即,較佳為具有與上述半導體晶圓表面保護用膜中的軟化層(B)同樣的彈性模數。構成樹脂製環110的樹脂的例子包括:聚乙烯(高密度聚乙烯、低密度聚乙烯等)、聚丙烯(均聚丙烯、無規聚丙烯等)、聚苯乙烯、尼龍等。 In the method 2), the storage elastic modulus G B (40) of the resin ring 110 having the through hole having the same diameter as the diameter of the semiconductor wafer 20 may be 10 MPa or more; and the storage elastic modulus G B ( 100) is preferably 1 MPa or more. That is, it is preferable to have the same elastic modulus as the softened layer (B) in the film for semiconductor wafer surface protection. Examples of the resin constituting the resin ring 110 include polyethylene (high density polyethylene, low density polyethylene, etc.), polypropylene (homopolypropylene, atactic polypropylene, etc.), polystyrene, nylon, and the like.

方法3)中,注入至模具120的腔體125中的熔融樹脂只要為環氧樹脂等即可,冷卻固化後的熔融樹脂的儲存彈性模數GB(40)只要為10 MPa以上即可;另外,儲存彈性模數GB(100)較佳為1 MPa以上。即,較佳為具有與上述半導體晶圓表面保護用膜中的軟化層(B)同樣的彈性模數。 In the method 3), the molten resin injected into the cavity 125 of the mold 120 may be an epoxy resin or the like, and the storage elastic modulus G B (40) of the molten resin after cooling and solidification may be 10 MPa or more; Further, the storage elastic modulus G B (100) is preferably 1 MPa or more. That is, it is preferable to have the same elastic modulus as the softened layer (B) in the film for semiconductor wafer surface protection.

如此,形成於半導體晶圓的周圍的隆起部(邊緣)可藉由任意的方法來進行,但就可相對較容易地形成隆起部(邊緣),並且容易操作的方面而言,較佳為將本發明的半導體晶圓表面保護用膜熱壓接而形成。 Thus, the ridges (edges) formed around the semiconductor wafer can be performed by any method, but the ridges (edges) can be formed relatively easily, and in terms of ease of handling, it is preferable to The film for semiconductor wafer surface protection of the present invention is formed by thermocompression bonding.

隆起部在100℃的儲存彈性模數G(100)較佳為1 MPa以上。隆起部如後述般,在使用半導體晶圓表面保護用膜製作隆起部時,由於由上述膜的軟化層(B)構成,因此在此種情況下,隆起部的儲存彈性模數與軟化層(B)的儲存彈性模數相同。另外,在後述的半導體晶圓的背面研 磨步驟中,為了磨石與隆起部接觸而難以破損,磨石可有效地與半導體晶圓的電路非形成面接觸,較佳為隆起部(邊緣)實質上由具有某種程度柔軟性的樹脂形成。 The storage elastic modulus G (100) of the ridge at 100 ° C is preferably 1 MPa or more. As described later, when the ridge portion is formed using the film for semiconductor wafer surface protection, the embossed portion is composed of the softened layer (B) of the film. Therefore, in this case, the storage elastic modulus of the ridge portion and the softened layer ( B) has the same storage elastic modulus. In addition, the back side of the semiconductor wafer described later In the grinding step, the grinding stone is difficult to be broken in contact with the ridge portion, and the grinding stone can effectively contact the circuit non-formed surface of the semiconductor wafer. Preferably, the ridge portion (edge) is substantially a resin having a certain degree of flexibility. form.

一邊參照圖一邊對使用本發明的半導體晶圓表面保護用膜的半導體裝置的製造方法的一例進行說明。圖2A是表示在半導體晶圓表面保護用膜上配置半導體晶圓的步驟(安裝步驟)的一例的圖;圖2B是表示在半導體晶圓表面保護用膜上配置有半導體晶圓的積層物的圖;圖2C是表示在半導體晶圓的外周形成半導體表面保護用膜的隆起部的步驟(壓製步驟)的一例的圖;圖2D是表示隆起部的一例的放大圖;圖2E是表示將半導體晶圓的電路非形成面研磨的步驟的一例的圖。 An example of a method of manufacturing a semiconductor device using the semiconductor wafer surface protective film of the present invention will be described with reference to the drawings. 2A is a view showing an example of a step (mounting step) of arranging a semiconductor wafer on a film for protecting a semiconductor wafer surface, and FIG. 2B is a view showing a laminate in which a semiconductor wafer is placed on a film for protecting a semiconductor wafer surface. 2C is a view showing an example of a step (pressing step) of forming a raised portion of a film for protecting a semiconductor surface on the outer periphery of a semiconductor wafer; FIG. 2D is an enlarged view showing an example of a raised portion; and FIG. 2E is a view showing a semiconductor; A diagram showing an example of a step in which the circuit of the wafer is not surface-polished.

關於安裝步驟 About the installation steps

圖2A表示在半導體晶圓表面保護用膜上配置半導體晶圓的例子。首先,準備切出大於半導體晶圓20的尺寸的半導體晶圓表面保護用膜10。接著,將半導體晶圓20配置於半導體晶圓表面保護用膜10上(1)的步驟)。此時,使半導體晶圓20的電路形成面20A與半導體晶圓表面保護用膜10的黏著層(C)16接觸。 FIG. 2A shows an example in which a semiconductor wafer is placed on a film for protecting a semiconductor wafer surface. First, the semiconductor wafer surface protection film 10 larger than the size of the semiconductor wafer 20 is prepared. Next, the semiconductor wafer 20 is placed on the semiconductor wafer surface protection film 10 (step 1). At this time, the circuit formation surface 20A of the semiconductor wafer 20 is brought into contact with the adhesion layer (C) 16 of the semiconductor wafer surface protection film 10.

具體而言,在加熱板40上載置半導體晶圓20、以及包圍半導體晶圓20的環框30。接著,在半導體晶圓20及環框30上載置半導體晶圓表面保護用膜10。此時,使半導體晶圓20的電路形成面20A與半導體晶圓表面保護用膜10的黏著層(C)16接觸。 Specifically, the semiconductor wafer 20 and the ring frame 30 surrounding the semiconductor wafer 20 are placed on the heater board 40. Next, the semiconductor wafer surface protection film 10 is placed on the semiconductor wafer 20 and the ring frame 30. At this time, the circuit formation surface 20A of the semiconductor wafer 20 is brought into contact with the adhesion layer (C) 16 of the semiconductor wafer surface protection film 10.

接著,一邊使輥35旋轉一邊自半導體晶圓表面保護用膜10的一個端部遍及另一個端部而抵壓於半導體晶圓20。藉此,半導體晶圓20的電路形成面20A與半導體晶圓表面保護用膜10密接。藉由輥35將半導體晶圓表面保護用膜10抵壓於半導體晶圓20之間,加熱板40可為持常溫;亦可將加熱板40加熱,將半導體晶圓表面保護用膜10加熱至到達溫度(TM)。 Then, one end portion of the semiconductor wafer surface protection film 10 is pressed against the semiconductor wafer 20 from the other end portion while rotating the roller 35. Thereby, the circuit formation surface 20A of the semiconductor wafer 20 is in close contact with the semiconductor wafer surface protection film 10. The semiconductor wafer surface protection film 10 is pressed between the semiconductor wafers 20 by the roller 35, and the heating plate 40 can be kept at a normal temperature; or the heating plate 40 can be heated to heat the semiconductor wafer surface protection film 10 to Arrival temperature (TM).

安裝步驟中的半導體晶圓表面保護用膜10的溫度(TM),較佳為與在半導體晶圓的外周形成半導體表面保護用膜的隆起部的步驟(後述)中的半導體晶圓表面保護用膜10的溫度(TP)為相同溫度,或者高於其的高溫。其理由的詳細內容於下文闡述,原因是存在以下情況:在形成隆起部的步驟中,在半導體晶圓表面保護用膜10上產生皺褶;或者在形成隆起部的步驟後,半導體晶圓20自半導體晶圓表面保護用膜10剝離。 The temperature (TM) of the semiconductor wafer surface protection film 10 in the mounting step is preferably a semiconductor wafer surface protection in a step (described later) of forming a bump portion of the semiconductor surface protection film on the outer periphery of the semiconductor wafer. The temperature (TP) of the film 10 is the same temperature or higher than the temperature thereof. The reason for the reason is explained below because there is a case where wrinkles are formed on the semiconductor wafer surface protecting film 10 in the step of forming the ridge portion; or after the step of forming the ridge portion, the semiconductor wafer 20 The film 10 for semiconductor wafer surface protection is peeled off.

安裝步驟後,將半導體晶圓20與半導體晶圓表面保護用膜10以及環框30一起自加熱板40取出,而獲得如圖2B所示的在半導體晶圓表面保護用膜上配置有半導體晶圓的積層物。將該積層物稱為「安裝框」。 After the mounting step, the semiconductor wafer 20 is taken out from the heating plate 40 together with the semiconductor wafer surface protective film 10 and the ring frame 30, and a semiconductor crystal is disposed on the semiconductor wafer surface protective film as shown in FIG. 2B. Round laminate. This laminate is referred to as a "mounting frame."

關於壓製步驟 About the pressing step

接著,如圖2C所示般,藉由熱壓製機的一對熱板(上熱板22-1與下熱板22-2)熱壓接半導體晶圓20與半導體晶圓表面保護用膜10((2)的步驟)。藉此,將半導體晶圓20壓入至熔融的軟化層(B)14中,藉此擠出的軟化層 (B)14在半導體晶圓20的端部附近形成隆起部(邊緣)24。上熱板22-1是配置於半導體晶圓20之側的熱板;下熱板22-2是配置於半導體晶圓保護膜10之側的熱板。上熱板22-1與半導體晶圓20可直接接觸,亦可介隔幾個構件(例如夾具等)。同樣,下熱板22-2與半導體晶圓保護膜10可直接接觸,亦可介隔幾個構件(例如夾具等)。 Next, as shown in FIG. 2C, the semiconductor wafer 20 and the semiconductor wafer surface protective film 10 are thermocompression-bonded by a pair of hot plates (the upper hot plate 22-1 and the lower hot plate 22-2) of the hot press. (Steps of (2)). Thereby, the semiconductor wafer 20 is pressed into the molten softened layer (B) 14, whereby the softened layer is extruded. (B) 14 forms a ridge (edge) 24 near the end of the semiconductor wafer 20. The upper hot plate 22-1 is a hot plate disposed on the side of the semiconductor wafer 20, and the lower hot plate 22-2 is a hot plate disposed on the side of the semiconductor wafer protective film 10. The upper hot plate 22-1 may be in direct contact with the semiconductor wafer 20, or may be separated by several members (for example, a jig or the like). Similarly, the lower hot plate 22-2 may be in direct contact with the semiconductor wafer protective film 10, or may be separated by several members (for example, a jig or the like).

隆起部(邊緣)24的高度較佳為例如進行背面研磨的半導體晶圓20的厚度的0.2倍~1倍左右。若隆起部(邊緣)24的高度過低,則無法穩定保持半導體晶圓20的端部。具體而言,在對厚度為1000 μm的半導體晶圓20進行背面加工時,隆起部(邊緣)24的高度較佳為200 μm以上。另外,圖2B表示未將半導體晶圓20的端部的角除去的形態,但亦可對半導體晶圓20的端部實施倒角加工(直線)或R加工(曲線)而將角除去。在對半導體晶圓20的端部實施倒角加工(直線)或R加工(曲線)時,隆起部(邊緣)24的高度可與倒角加工或R加工後的半導體晶圓的端部的厚度相當。 The height of the raised portion (edge) 24 is preferably, for example, about 0.2 to 1 times the thickness of the semiconductor wafer 20 to be back-polished. If the height of the ridges (edges) 24 is too low, the ends of the semiconductor wafer 20 cannot be stably held. Specifically, when the semiconductor wafer 20 having a thickness of 1000 μm is subjected to back surface processing, the height of the ridge portion (edge) 24 is preferably 200 μm or more. 2B shows a form in which the corners of the end portions of the semiconductor wafer 20 are not removed. However, the ends of the semiconductor wafer 20 may be chamfered (straight line) or R-processed (curved) to remove the corners. When chamfering (straight line) or R processing (curve) is performed on the end portion of the semiconductor wafer 20, the height of the ridge portion (edge) 24 may be the thickness of the end portion of the semiconductor wafer after chamfering or R processing. quite.

熱壓接溫度(熱壓接溫度TP)或壓製壓力只要讓軟化層(B)14熔融而可形成隆起部(邊緣)24的條件即可。具體而言,壓製壓力較佳為1 MPa~10 MPa,更佳為3 MPa~10 MPa。壓製時間例如可設為1分鐘~5分鐘左右。熱壓接溫度TP較佳為120℃~180℃的範圍,更佳為130℃~170℃的範圍,尤佳為150℃。熱壓接溫度(TP)是指壓製機的一對熱板(上熱板22-1與下熱板22-2)的平均溫度。 The thermocompression bonding temperature (thermocompression bonding temperature TP) or the pressing pressure may be a condition in which the softening layer (B) 14 is melted to form the ridge portion (edge) 24. Specifically, the pressing pressure is preferably from 1 MPa to 10 MPa, more preferably from 3 MPa to 10 MPa. The pressing time can be, for example, about 1 minute to 5 minutes. The thermocompression bonding temperature TP is preferably in the range of 120 ° C to 180 ° C, more preferably in the range of 130 ° C to 170 ° C, and particularly preferably 150 ° C. The thermocompression bonding temperature (TP) refers to the average temperature of a pair of hot plates (upper hot plate 22-1 and lower hot plate 22-2) of the press.

而且,熱壓接溫度(TP)較佳為,與上述安裝步驟中的半導體晶圓表面保護用膜10的溫度(TM)為相同溫度、或低於其的溫度。藉由壓製步驟中的加熱,半導體晶圓表面保護用膜10將會熱膨脹;若熱壓接溫度(TP)為安裝步驟中的溫度(TM)以下,則壓製步驟中的半導體晶圓表面保護用膜10的熱膨脹的程度與安裝步驟中的半導體晶圓表面保護用膜10的熱膨脹的程度為同等程度、或小於其的程度。由於將安裝步驟中經充分熱膨脹的半導體晶圓表面保護用膜10固定於半導體晶圓,因此在壓製步驟中半導體晶圓表面保護用膜10難以熱膨脹,而難以產生皺褶。另一方面,若不恰當地調整熱壓接溫度(TP)與溫度(TM),則半導體晶圓表面保護用膜10容易在半導體晶圓20的周邊產生皺褶。 Further, the thermocompression bonding temperature (TP) is preferably the same temperature as or lower than the temperature (TM) of the semiconductor wafer surface protective film 10 in the mounting step. The semiconductor wafer surface protection film 10 will thermally expand by heating in the pressing step; if the thermocompression bonding temperature (TP) is below the temperature (TM) in the mounting step, the semiconductor wafer surface protection in the pressing step is used. The degree of thermal expansion of the film 10 is equal to or less than the degree of thermal expansion of the semiconductor wafer surface protective film 10 in the mounting step. Since the semiconductor wafer surface protective film 10 which is sufficiently thermally expanded in the mounting step is fixed to the semiconductor wafer, the semiconductor wafer surface protecting film 10 is hard to thermally expand in the pressing step, and wrinkles are less likely to occur. On the other hand, if the thermocompression bonding temperature (TP) and the temperature (TM) are improperly adjusted, the semiconductor wafer surface protection film 10 is likely to wrinkle around the semiconductor wafer 20.

而且,若在壓製步驟後將半導體晶圓表面保護用膜10冷卻,可能會發生半導體晶圓表面保護用膜10與半導體晶圓20剝離(半導體晶圓20自膜10浮起)。該剝離亦可藉由將熱壓接溫度(TP)設為安裝步驟的溫度(TM)以下而抑制。如此藉由在半導體表面保護膜抑制皺褶,而在半導體晶圓的背面研磨步驟中,可更難弄破半導體晶圓。 Further, when the semiconductor wafer surface protective film 10 is cooled after the pressing step, the semiconductor wafer surface protecting film 10 and the semiconductor wafer 20 may be peeled off (the semiconductor wafer 20 floats from the film 10). This peeling can also be suppressed by setting the thermocompression bonding temperature (TP) to be lower than the temperature (TM) of the mounting step. Thus, by suppressing wrinkles in the semiconductor surface protective film, it is more difficult to break the semiconductor wafer in the back grinding step of the semiconductor wafer.

另外,熱壓接溫度(TP)較佳為高於半導體晶圓表面保護用膜10的軟化層(B)的軟化溫度(TmB)。藉由將熱壓接溫度(TP)設為軟化溫度(TmB)以上而使軟化層(B)軟化,而容易形成隆起部(邊緣)24。另一方面較佳為,熱壓接溫度(TP)低於「半導體晶圓表面保護用膜 10的軟化層(B)的軟化溫度(TmB)+40℃」。若熱壓接溫度(TP)過高,則無法保持使軟化層(B)軟化而形成的隆起部(邊緣)24的形狀,而流動成為扁平的形狀。藉此,隆起部(邊緣)24的高度變低。 Further, the thermocompression bonding temperature (TP) is preferably higher than the softening temperature (TmB) of the softening layer (B) of the semiconductor wafer surface protective film 10. The softened layer (B) is softened by setting the thermocompression bonding temperature (TP) to a softening temperature (TmB) or more, and the ridge portion (edge) 24 is easily formed. On the other hand, it is preferable that the thermocompression bonding temperature (TP) is lower than the film for semiconductor wafer surface protection. The softening temperature (TmB) of the softened layer (B) of 10 + 40 ° C". When the thermocompression bonding temperature (TP) is too high, the shape of the ridge portion (edge) 24 formed by softening the softened layer (B) cannot be maintained, and the flow becomes a flat shape. Thereby, the height of the ridge (edge) 24 becomes low.

另外,如上所述,熱壓接溫度(TP)是指壓製機的一對熱板(上熱板22-1與下熱板22-2)的平均溫度。上熱板22-1的溫度(TP1)與下熱板22-2的溫度(TP2)可為相同的溫度,較佳為使上熱板22-1的溫度(TP1)高於下熱板22-2的溫度(TP2)。熱壓接溫度(TP)的溫度越高,則越能迅速地形成隆起部(邊緣)24,但若下熱板22-2的溫度(TP2)較高,則無法保持隆起部(邊緣)24的形狀而流動而扁平化。另一方面,由於上熱板22-1與半導體晶圓表面保護用膜10不直接接觸(兩者間有間隙),因此難以藉由上熱板22-1的溫度(TP1)而使隆起部(邊緣)24的形狀扁平化。因此,藉由使上熱板22-1的溫度(TP1)高於下熱板22-2的溫度(TP2),而可保持隆起部(邊緣)24的形狀,並且迅速地形成隆起部(邊緣)24。 Further, as described above, the thermocompression bonding temperature (TP) means the average temperature of a pair of hot plates (the upper hot plate 22-1 and the lower hot plate 22-2) of the press. The temperature of the upper hot plate 22-1 (TP1) and the temperature of the lower hot plate 22-2 (TP2) may be the same temperature, preferably the temperature of the upper hot plate 22-1 (TP1) is higher than that of the lower hot plate 22 -2 temperature (TP2). The higher the temperature of the thermocompression bonding temperature (TP), the more rapidly the ridge (edge) 24 is formed, but if the temperature (TP2) of the lower hot plate 22-2 is high, the ridge (edge) 24 cannot be maintained. The shape is flowing and flattened. On the other hand, since the upper hot plate 22-1 is not in direct contact with the semiconductor wafer surface protection film 10 (there is a gap therebetween), it is difficult to make the ridge portion by the temperature (TP1) of the upper hot plate 22-1. The shape of (edge) 24 is flattened. Therefore, by making the temperature (TP1) of the upper hot plate 22-1 higher than the temperature (TP2) of the lower hot plate 22-2, the shape of the ridge (edge) 24 can be maintained, and the ridges (edges) can be quickly formed. )twenty four.

具體而言,較佳為上熱板22-1的溫度(TP1)高於「半導體晶圓表面保護用膜10的軟化層(B)的軟化溫度(TmB)+20℃」,且低於「半導體晶圓表面保護用膜10的軟化層(B)的軟化溫度(TmB)+40℃」。並且,較佳為下熱板22-2的溫度(TP2)高於「上熱板22-1的溫度(TP1)-40℃」,且低於「上熱板22-1的溫度(TP1)」。如此,較佳為熱壓接溫度(TP)高於「上熱板22-1的溫度(TP1)-20℃」, 且低於「上熱板22-1的溫度(TP1)」。 Specifically, it is preferable that the temperature (TP1) of the upper hot plate 22-1 is higher than the "softening temperature (TmB) + 20 ° C of the softened layer (B) of the semiconductor wafer surface protective film 10", and is lower than " The softening temperature (TmB) + 40 ° C" of the softened layer (B) of the film 10 for semiconductor wafer surface protection. Further, it is preferable that the temperature (TP2) of the lower hot plate 22-2 is higher than "the temperature of the upper hot plate 22-1 (TP1) - 40 ° C" and lower than the temperature of the upper hot plate 22-1 (TP1). "." Thus, it is preferable that the thermocompression bonding temperature (TP) is higher than "the temperature of the upper hot plate 22-1 (TP1) - 20 ° C", It is lower than the "temperature (TP1) of the upper hot plate 22-1".

隆起部(邊緣)24的高度如圖2D所示,定義為半導體晶圓表面保護用膜10的自半導體晶圓20的電路形成面接觸的面至隆起部(邊緣)24的頂點的高度h。隆起部(邊緣)24的高度可藉由顯微鏡觀察剝離半導體晶圓20後的半導體晶圓表面保護用膜10的剖面形狀而測定。 The height of the ridge portion (edge) 24 is defined as the height h of the surface of the semiconductor wafer surface protection film 10 from the surface where the circuit formation surface of the semiconductor wafer 20 contacts to the apex of the ridge portion (edge) 24, as shown in FIG. 2D. The height of the raised portion (edge) 24 can be measured by observing the cross-sectional shape of the semiconductor wafer surface protective film 10 after the semiconductor wafer 20 is peeled off by a microscope.

隆起部(邊緣)24並非必需與半導體晶圓20的端部接觸,但為了提高半導體晶圓20的保持性,較佳為與半導體晶圓20的端部接觸。 The raised portion (edge) 24 does not have to be in contact with the end portion of the semiconductor wafer 20, but in order to improve the retention of the semiconductor wafer 20, it is preferable to be in contact with the end portion of the semiconductor wafer 20.

接著,如圖2E所示,將半導體晶圓表面保護用膜10與半導體晶圓20一起放置於吸著台26上。如上所述,半導體晶圓表面保護用膜在基材層(A)與軟化層(B)之間可具有輕黏著層(D)(參照圖1B)。在具有輕黏著層(D)時,將基材層(A)除去後可將半導體晶圓表面保護用膜10放置於吸著台26上。 Next, as shown in FIG. 2E, the semiconductor wafer surface protective film 10 is placed on the absorbing table 26 together with the semiconductor wafer 20. As described above, the film for semiconductor wafer surface protection may have a light adhesion layer (D) between the base material layer (A) and the softening layer (B) (see FIG. 1B). When the light-adhesive layer (D) is provided, the semiconductor wafer surface protective film 10 can be placed on the absorbing table 26 by removing the base material layer (A).

接著,藉由磨石28研磨半導體晶圓的電路非形成面(背面)20B直至晶圓達到一定的厚度以下((3)的步驟)。背面研磨後的半導體晶圓的厚度例如可設為300 μm以下、較佳為可設為100 μm以下。研磨加工是藉由磨石的機械性研磨加工。研磨方式並無特別限制,可為直通式、饋進式等公知的研磨方式。研磨加工不僅可進行濕式研磨(濕式拋光),而且還可進行乾式研磨(乾式拋光)。 Next, the circuit non-forming surface (back surface) 20B of the semiconductor wafer is polished by the grindstone 28 until the wafer reaches a certain thickness or less (step (3)). The thickness of the semiconductor wafer after the back surface polishing can be, for example, 300 μm or less, or preferably 100 μm or less. The grinding process is a mechanical grinding process by grinding stones. The polishing method is not particularly limited, and may be a known polishing method such as a straight-through type or a feed-through type. The grinding process can be performed not only by wet grinding (wet polishing) but also by dry grinding (dry polishing).

接著,在常溫下剝離半導體晶圓表面保護用膜10((4)的步驟)。半導體晶圓表面保護用膜10的剝離例如可藉由 公知的膠帶剝離機來進行。並且,在半導體晶圓表面保護用膜10包含放射線硬化型黏著層(C)時,對半導體晶圓表面保護用膜10照射放射線使黏著層(C)硬化,而將半導體晶圓表面保護用膜10自半導體晶圓20剝離。 Next, the film for semiconductor wafer surface protection 10 is peeled off at normal temperature (step of (4)). The peeling of the film 10 for semiconductor wafer surface protection can be performed, for example, by A known tape peeling machine is used. In addition, when the semiconductor wafer surface protection film 10 includes the radiation-curable pressure-sensitive adhesive layer (C), the semiconductor wafer surface protection film 10 is irradiated with radiation to cure the adhesive layer (C), and the semiconductor wafer surface protection film is used. 10 is peeled off from the semiconductor wafer 20.

在進行半導體晶圓的背面研磨的步驟(3)、與自半導體晶圓剝離半導體晶圓表面保護用膜的步驟(4)之間,根據需要可包括:對半導體晶圓的電路非形成面(背面)進行加工的步驟。對半導體晶圓的電路非形成面(背面)進行加工的步驟例如可進一步進行:選自由金屬濺鍍步驟、鍍敷處理步驟及加熱處理步驟所組成群中的步驟。加熱處理步驟例如可為將黏晶帶在加溫下貼附的步驟等。接著,將半導體晶圓切割。或者可不剝離半導體晶圓表面保護用膜10而對半導體晶圓切割。 Between the step (3) of performing back surface polishing of the semiconductor wafer and the step (4) of peeling off the film for protecting the surface of the semiconductor wafer from the semiconductor wafer, the non-formed surface of the semiconductor wafer may be included as needed ( Back) The step of processing. The step of processing the non-formed surface (back surface) of the semiconductor wafer may be further performed, for example, by a step selected from the group consisting of a metal sputtering step, a plating treatment step, and a heat treatment step. The heat treatment step may be, for example, a step of attaching the adhesive layer under heating, or the like. Next, the semiconductor wafer is diced. Alternatively, the semiconductor wafer may be diced without peeling off the semiconductor wafer surface protective film 10.

本發明的半導體晶圓表面保護用膜可藉由在特定條件下與半導體晶圓熱壓接,而在半導體晶圓的外周形成半導體晶圓表面保護用膜的隆起部(邊緣)。另外,藉由本發明的半導體晶圓表面保護用膜形成的隆起部(邊緣),在背面研磨時的半導體晶圓的到達溫度(約40℃左右)下亦不熔融,因此可良好地維持形狀。因此,在半導體晶圓的背面研磨時,可藉由隆起部(邊緣)穩定地持續保持半導體晶圓的端部,並且可抑制因與磨石的接觸所導致的半導體晶圓的端部的破損。因此,即便半導體晶圓是硬且脆的藍寶石基板,亦可不破損基板地進行背面研磨。 The film for semiconductor wafer surface protection of the present invention can form a ridge (edge) of a film for semiconductor wafer surface protection on the outer periphery of a semiconductor wafer by thermocompression bonding with a semiconductor wafer under specific conditions. In addition, the ridges (edges) formed by the film for semiconductor wafer surface protection of the present invention are not melted at the temperature (about 40 ° C) of the semiconductor wafer during back surface polishing, so that the shape can be favorably maintained. Therefore, when the back surface of the semiconductor wafer is polished, the end portion of the semiconductor wafer can be stably maintained by the ridge portion (edge), and the damage of the end portion of the semiconductor wafer due to the contact with the grindstone can be suppressed. . Therefore, even if the semiconductor wafer is a hard and brittle sapphire substrate, the back surface polishing can be performed without damaging the substrate.

而且,在半導體晶圓表面保護用膜包含藉由放射線而 硬化的黏著層(C)時,藉由對半導體晶圓表面保護用膜照射放射線,而可容易地剝離半導體晶圓表面保護用膜。如此,如先前的蠟工法般,無須清洗蠟樹脂所附著的半導體晶圓,因此可將步驟簡化。 Moreover, the film for protecting the surface of the semiconductor wafer is contained by radiation In the case of the cured adhesive layer (C), the semiconductor wafer surface protective film can be easily peeled off by irradiating the semiconductor wafer surface protective film with radiation. Thus, as in the previous waxing method, it is not necessary to clean the semiconductor wafer to which the wax resin is attached, so the steps can be simplified.

關於安裝步驟的其他實施形態 Other embodiments regarding the installation steps

如上所述,在安裝步驟中在具有框的環框30的內部配置半導體晶圓20;遍及半導體晶圓20的一個面(通常是形成有電路的面20A)、與環框30,貼附半導體晶圓表面保護用膜10(參照圖2A)。此時,若環框30、與配置於環框30的內部的半導體晶圓20的間隙較大,則在半導體晶圓20與環框30之間半導體晶圓保護用膜會鬆弛。因此,較佳為在環框30與半導體晶圓20之間,配置環狀輔助構件50(參照圖5A及圖5B)。 As described above, the semiconductor wafer 20 is disposed inside the framed ring frame 30 in the mounting step; the semiconductor is attached to one surface of the semiconductor wafer 20 (usually the surface 20A on which the circuit is formed), and the ring frame 30, and the semiconductor is attached The wafer surface protection film 10 (see FIG. 2A). At this time, when the gap between the ring frame 30 and the semiconductor wafer 20 disposed inside the ring frame 30 is large, the film for semiconductor wafer protection is slack between the semiconductor wafer 20 and the ring frame 30. Therefore, it is preferable to arrange the annular auxiliary member 50 between the ring frame 30 and the semiconductor wafer 20 (see FIGS. 5A and 5B).

半導體晶圓20的外直徑DW、環框30的內直徑DAIN、環狀輔助構件50的環外直徑DBOUT、以及環狀輔助構件50的環內直徑DBIN,滿足式(1)DW<DBIN<DBOUT<DAIN的關係(參照圖5A)。 The outer diameter DW of the semiconductor wafer 20, the inner diameter DA IN of the ring frame 30, the outer diameter DB OUT of the annular auxiliary member 50, and the inner diameter DB IN of the annular auxiliary member 50 satisfy the formula (1) DW< The relationship of DB IN <DB OUT <DA IN (refer to FIG. 5A).

而且較佳為,儘可能減小半導體晶圓20與環狀輔助構件50的間隙、以及環狀輔助構件50與環框30的間隙。原因是進一步防止經貼附的半導體晶圓保護用膜10的鬆弛。即,半導體晶圓20的外直徑DW與環狀輔助構件50的環內直徑DBIN的差△D1,較佳為半導體晶圓20的外直徑DW的1%以內。同樣,環狀輔助構件50的環外直徑DBOUT與環框30的內直徑DAIN的差△D2,較佳為半導體 晶圓20的外直徑DW的1%以內。 Further, it is preferable to reduce the gap between the semiconductor wafer 20 and the annular auxiliary member 50 and the gap between the annular auxiliary member 50 and the ring frame 30 as much as possible. The reason is to further prevent the slack of the attached semiconductor wafer protective film 10. That is, the difference ΔD1 between the outer diameter DW of the semiconductor wafer 20 and the inner diameter DB IN of the annular auxiliary member 50 is preferably within 1% of the outer diameter DW of the semiconductor wafer 20. Similarly, the difference ΔD2 between the outer diameter DB OUT of the annular auxiliary member 50 and the inner diameter DA IN of the ring frame 30 is preferably within 1% of the outer diameter DW of the semiconductor wafer 20.

△D1=DBIN-DW………(2) △D1=DB IN -DW.........(2)

△D2=DAIN-DBOUT………(3) △D2=DA IN -DB OUT .........(3)

安裝步驟可藉由半導體晶圓安裝裝置來進行。半導體晶圓安裝裝置具有加熱單元、膠帶貼附單元、以及膠帶切割機構。 The mounting step can be performed by a semiconductor wafer mounting device. The semiconductor wafer mounting device has a heating unit, a tape attaching unit, and a tape cutting mechanism.

加熱單元例如是載置有預安裝框的加熱板40。預安裝框是指包括半導體晶圓20、包圍半導體晶圓的環狀輔助構件50、以及包圍環狀輔助構件50的環框30的結構體(圖5A)。預安裝框是半導體晶圓20的電路形成面20A的相反面(電路非形成面)以與加熱板40相對的方式載置於加熱板40上。 The heating unit is, for example, a heating plate 40 on which a pre-mounting frame is placed. The pre-mounting frame refers to a structure including a semiconductor wafer 20, an annular auxiliary member 50 surrounding the semiconductor wafer, and a ring frame 30 surrounding the annular auxiliary member 50 (FIG. 5A). The pre-mounting frame is placed on the opposite side of the circuit forming surface 20A of the semiconductor wafer 20 (circuit non-forming surface) so as to be opposed to the heating plate 40.

一邊藉由加熱板40將載置於加熱板40上的預安裝框的半導體晶圓20加熱,一邊由膠帶貼附單元遍及半導體晶圓20的電路形成面20A、環狀輔助構件50、以及環框30而貼附半導體晶圓表面保護用膜10。膠帶貼附單元例如包含輥35;輥35可遍及半導體晶圓20的電路形成面20A、環狀輔助構件50、以及環框30而轉動。 The semiconductor wafer 20 of the pre-mounted frame placed on the heating plate 40 is heated by the heating plate 40, and the tape attaching unit extends over the circuit forming surface 20A of the semiconductor wafer 20, the annular auxiliary member 50, and the ring. The film 10 for semiconductor wafer surface protection is attached to the frame 30. The tape attaching unit includes, for example, a roller 35; the roller 35 is rotatable throughout the circuit forming surface 20A of the semiconductor wafer 20, the annular auxiliary member 50, and the ring frame 30.

膠帶切割機構在將半導體晶圓保護膜10貼附於預安裝框之前、或貼附之後,根據環框的外徑切割半導體晶圓保護膜10。膠帶切割機構只要為切割器等即可(未圖示)。如此可獲得包括半導體晶圓20、環狀輔助構件50、環框 30、以及半導體晶圓保護膜10的安裝框。 The tape cutting mechanism cuts the semiconductor wafer protective film 10 according to the outer diameter of the ring frame before or after attaching the semiconductor wafer protective film 10 to the pre-mounting frame. The tape cutting mechanism may be a cutter or the like (not shown). The semiconductor wafer 20, the annular auxiliary member 50, and the ring frame are thus obtained. 30. A mounting frame of the semiconductor wafer protective film 10.

關於壓製步驟的其他實施形態 Other embodiments regarding the pressing step

如上所述,壓製步驟是藉由一對壓製板(上壓製板22-1與下壓製板22-2)壓製安裝步驟中所得的安裝框的步驟(參照圖2C)。然而,如圖6所示,若在壓製步驟後解除上熱板22-1與下熱板22-2的壓力,則會導致安裝框的半導體晶圓表面保護膜10的外周部薄於中央部。推測原因是,在壓製步驟中,安裝框的半導體晶圓表面保護膜10的外周部向外側流動,相對於此,中央部難以流動。 As described above, the pressing step is a step of pressing the mounting frame obtained in the mounting step by a pair of press plates (the upper press plate 22-1 and the lower press plate 22-2) (refer to Fig. 2C). However, as shown in FIG. 6, if the pressure of the upper hot plate 22-1 and the lower hot plate 22-2 is released after the pressing step, the outer peripheral portion of the semiconductor wafer surface protective film 10 of the mounting frame is thinner than the central portion. . It is presumed that in the pressing step, the outer peripheral portion of the semiconductor wafer surface protection film 10 of the mounting frame flows outward, and the central portion is less likely to flow.

因此較佳為,一對壓製板中,下壓製板22-2在與上壓製板22-1相對的面上具有凸部60。設置於下壓製板22-2上的凸部60在壓製中侵入至半導體晶圓保護膜10(圖7A)。因此,可使壓製步驟後的安裝框的半導體晶圓表面保護膜10的厚度均勻,且亦可形成隆起部(邊緣)24。 Therefore, it is preferable that the lower pressing plate 22-2 has the convex portion 60 on the surface opposite to the upper pressing plate 22-1 among the pair of pressing plates. The convex portion 60 provided on the lower press plate 22-2 intrudes into the semiconductor wafer protective film 10 during pressing (Fig. 7A). Therefore, the thickness of the semiconductor wafer surface protective film 10 of the mounting frame after the pressing step can be made uniform, and the ridges (edges) 24 can also be formed.

下壓製板22-2的凸部60的與半導體晶圓保護膜的接觸面的外周(周緣)較佳為圓形。因此,凸部60可為圓錐(圖7B),或可為圓頂(圖7C)。 The outer circumference (peripheral edge) of the contact surface of the convex portion 60 of the lower press plate 22-2 with the semiconductor wafer protective film is preferably circular. Thus, the protrusion 60 can be a cone (Fig. 7B) or can be a dome (Fig. 7C).

下壓製板22-2的凸部60的突出高度較佳為1 μm~100 μm;更佳為處於半導體晶圓表面保護用膜10的軟化層(B)的厚度的15%~100%的範圍內。凸部60的突出高度是指凸部60的最大高度。 The protruding height of the convex portion 60 of the lower pressing plate 22-2 is preferably from 1 μm to 100 μm, more preferably from 15% to 100% of the thickness of the softening layer (B) of the film 10 for semiconductor wafer surface protection. Inside. The protruding height of the convex portion 60 refers to the maximum height of the convex portion 60.

下壓製板22-2的凸部60的直徑CD大於安裝框的半導體晶圓的外直徑DW,且小於環框的內直徑DAIN。即滿足DW<CD<DAIN的關係。 The diameter CD of the convex portion 60 of the lower pressing plate 22-2 is larger than the outer diameter DW of the semiconductor wafer of the mounting frame, and smaller than the inner diameter DA IN of the ring frame. That is, the relationship of DW<CD<DA IN is satisfied.

凸部60的材質並無特別限制。只要適合於用以加工成凸狀的研磨即可,例如可為氧化鋁等陶瓷、碳化鎢等超硬合金等。 The material of the convex portion 60 is not particularly limited. The polishing may be carried out in a convex shape, and may be, for example, a ceramic such as alumina or a superhard alloy such as tungsten carbide.

壓製步驟可使用半導體晶圓壓製裝置來進行。半導體晶圓壓製裝置包括:具有加熱機構的上壓製板22-1、以及在與上壓製板22-1相對的面具有凸部60的下壓製板22-2。壓製步驟中,首先,在上壓製板22-1與下壓製板22-2之間配置安裝步驟中所得的安裝框。此時,以安裝框的半導體晶圓20與上壓製板22-1相對,安裝框的半導體晶圓表面保護用膜10與下壓製板22-2相對的方式配置。 The pressing step can be performed using a semiconductor wafer pressing apparatus. The semiconductor wafer pressing apparatus includes an upper pressing plate 22-1 having a heating mechanism, and a lower pressing plate 22-2 having a convex portion 60 on a surface opposite to the upper pressing plate 22-1. In the pressing step, first, the mounting frame obtained in the mounting step is disposed between the upper pressing plate 22-1 and the lower pressing plate 22-2. At this time, the semiconductor wafer 20 of the mounting frame is opposed to the upper pressing plate 22-1, and the semiconductor wafer surface protecting film 10 of the mounting frame is disposed to face the lower pressing plate 22-2.

所配置的安裝框如圖7A所示包括:半導體晶圓20、與環框30、以及半導體晶圓表面保護用膜10的結構體(參照圖2B)。 As shown in FIG. 7A, the mounted mounting frame includes a semiconductor wafer 20, a ring frame 30, and a structure of the semiconductor wafer surface protecting film 10 (see FIG. 2B).

配置安裝框後,藉由上壓製板22-1的加熱機構加熱安裝框。接著,藉由上壓製板22-1與下壓製板22-2壓製由上壓製板22-1與下壓製板22-2夾住的安裝框。 After the mounting frame is placed, the mounting frame is heated by the heating mechanism of the upper pressing plate 22-1. Next, the mounting frame sandwiched by the upper pressing plate 22-1 and the lower pressing plate 22-2 is pressed by the upper pressing plate 22-1 and the lower pressing plate 22-2.

藉由自上壓製板22-1與下壓製板22-2剝離安裝框,而可在半導體晶圓保護膜上形成隆起部(邊緣),並且可使壓製步驟後的半導體晶圓保護膜的厚度達到均勻。 By peeling the mounting frame from the upper pressing plate 22-1 and the lower pressing plate 22-2, a ridge portion (edge) can be formed on the semiconductor wafer protective film, and the thickness of the semiconductor wafer protective film after the pressing step can be made. Achieve uniformity.

實例 Instance (實例1) (Example 1) 材料的準備 Material preparation

準備均聚丙烯(hPP)(Prime Polymer公司製造、密度:910 kg/m3)作為基材層(A)的材料。準備直鏈狀低 密度聚乙烯(LLDPE)(Prime Polymer公司製造、密度918 kg/m3)作為軟化層(B)的材料。製備以下的黏著層用塗佈液作為黏著層(C)的材料。 A homopolypropylene (hPP) (manufactured by Prime Polymer Co., Ltd., density: 910 kg/m 3 ) was prepared as a material of the substrate layer (A). A linear low-density polyethylene (LLDPE) (manufactured by Prime Polymer Co., Ltd., density: 918 kg/m 3 ) was prepared as a material of the softening layer (B). The following coating liquid for an adhesive layer was prepared as a material of the adhesive layer (C).

黏著層用塗佈液的製備 Preparation of coating liquid for adhesive layer

使用丙烯酸乙酯30重量份、丙烯酸2-乙基己酯40重量份、丙烯酸甲酯10重量份、及甲基丙烯酸縮水甘油酯20重量份的單體混合物、並且使用過氧化苯甲醯系聚合起始劑[日本油脂(股)製造、Nyper BMT-K40]0.8重量份(作為起始劑為0.32重量份),在甲苯65重量份、乙酸乙酯50重量份中在80℃反應10小時。反應結束後,將所得的溶液冷卻,接著添加二甲苯100重量份、丙烯酸10重量份、十四烷基二甲基苄基氯化銨[日本油脂(股)製造、CATION M2-100]0.3重量份,一邊吹入空氣一邊在85℃下反應50小時。藉此獲得丙烯酸系黏著劑聚合物的溶液(黏著劑主劑)。 Using a monomer mixture of 30 parts by weight of ethyl acrylate, 40 parts by weight of 2-ethylhexyl acrylate, 10 parts by weight of methyl acrylate, and 20 parts by weight of glycidyl methacrylate, and using benzoyl peroxide polymerization 0.8 parts by weight of the initiator (manufactured by Nippon Oil & Fats Co., Ltd., Nyper BMT-K40) (0.32 part by weight as a starter) was reacted at 80 ° C for 10 hours in 65 parts by weight of toluene and 50 parts by weight of ethyl acetate. After completion of the reaction, the obtained solution was cooled, and then 100 parts by weight of xylene, 10 parts by weight of acrylic acid, and tetradecyldimethylbenzylammonium chloride [manufactured by Nippon Oil & Fats Co., Ltd., CATION M2-100] 0.3 weight were added. The mixture was reacted at 85 ° C for 50 hours while blowing air. Thereby, a solution (adhesive main component) of the acrylic adhesive polymer was obtained.

在所得的丙烯酸系黏著劑聚合物的溶液(黏著劑主劑)中,相對於丙烯酸系黏著劑聚合物固體成分100重量份,添加作為分子內鍵斷裂型光聚合起始劑的苯偶醯二甲基縮酮[日本Ciba-Geigy(股)、Irgacure-651]2重量份、作為分子內具有聚合性碳-碳雙鍵的單體的二季戊四醇六丙烯酸酯與二季戊四醇單羥基五丙烯酸酯的混合物[東亞合成化學工業(股)製造、ARONIX M-400]0.3重量份,接著添加作為熱交聯劑的異氰酸酯系交聯劑[三井東壓化學(股)製造、Olester P49-75-S]1.35重量份(作為熱交聯劑為1重 量份),而獲得紫外線(ultraviolet,UV)黏著劑。依據JIS Z0237測定所得的UV黏著劑的黏著力,結果為3 N/25 mm。 In the solution (adhesive main component) of the obtained acrylic pressure-sensitive adhesive polymer, benzophenone II as an intramolecular bond cleavage type photopolymerization initiator is added to 100 parts by weight of the solid component of the acrylic pressure-sensitive adhesive polymer. Methyl ketal [Japan Ciba-Geigy Co., Irgacure-651] 2 parts by weight, dipentaerythritol hexaacrylate as a monomer having a polymerizable carbon-carbon double bond in the molecule, and dipentaerythritol monohydroxypentaacrylate 0.3 parts by weight of a mixture [manufactured by East Asian Synthetic Chemical Industry Co., Ltd., ARONIX M-400], followed by addition of an isocyanate crosslinking agent as a thermal crosslinking agent [Mitsubishi Toyo Chemical Co., Ltd., Olester P49-75-S] 1.35 parts by weight (1 weight as a thermal crosslinking agent) Quantitative), and obtain ultraviolet (UV) adhesive. The adhesion of the obtained UV adhesive was measured in accordance with JIS Z0237, and it was 3 N/25 mm.

1)儲存彈性模數的測定 1) Determination of storage elastic modulus

將成為基材層(A)的均聚丙烯(hPP)(Prime Polymer公司製造、密度:910 kg/m3)擠出成形,而製作厚度500 μm的樣品膜。同樣將成為軟化層(B)的直鏈狀低密度聚乙烯(LLDPE)(Prime Polymer公司製造、密度918 kg/m3)擠出成形,而製作厚度500 μm的樣品膜。將成為黏著層(C)的上述UV黏著劑塗佈於玻璃基板上並乾燥後,進行剝離而製作厚度300 μm的樣品膜。 A homopolypropylene (hPP) (manufactured by Prime Polymer Co., Ltd., density: 910 kg/m 3 ) which is a base material layer (A) was extrusion-molded to prepare a sample film having a thickness of 500 μm. Similarly, a linear low-density polyethylene (LLDPE) (manufactured by Prime Polymer Co., Ltd., density: 918 kg/m 3 ) which is a softened layer (B) was extrusion-molded to prepare a sample film having a thickness of 500 μm. The UV adhesive which is the adhesive layer (C) was applied onto a glass substrate and dried, and then peeled off to prepare a sample film having a thickness of 300 μm.

藉由以下方法測定這些樣品膜的儲存彈性模數。即,將樣品膜放置於動態黏彈性測定裝置(TA Instruments公司製造:ARES)中,使用直徑8 mm的平行板型附加裝置,測定以升溫速度3℃/分鐘自30℃升溫至200℃時的儲存彈性模數。測定頻率設為1 Hz。測定結束後,對於基材層(A)與軟化層(B)的樣品膜,根據所得的10℃~200℃的儲存彈性模數-溫度曲線,分別讀取40℃、100℃、及150℃的儲存彈性模數的值。對於黏著層(C)的樣品膜,根據所得的10℃~200℃的儲存彈性模數-溫度曲線讀取25℃的儲存彈性模數的值。 The storage elastic modulus of these sample films was measured by the following method. That is, the sample film was placed in a dynamic viscoelasticity measuring apparatus (manufactured by TA Instruments: ARES), and a parallel plate type attachment device having a diameter of 8 mm was used to measure the temperature rise from 30 ° C to 200 ° C at a temperature increase rate of 3 ° C /min. Store the elastic modulus. The measurement frequency is set to 1 Hz. After the measurement, the sample film of the base material layer (A) and the softened layer (B) was read at 40 ° C, 100 ° C, and 150 ° C according to the obtained storage elastic modulus-temperature curve of 10 ° C to 200 ° C, respectively. The value of the stored elastic modulus. For the sample film of the adhesive layer (C), the value of the storage elastic modulus at 25 ° C was read from the obtained storage elastic modulus-temperature curve of 10 ° C to 200 ° C.

半導體晶圓表面保護用膜的製作 Fabrication of semiconductor wafer surface protection film

將成為基材層(A)的均聚丙烯(hPP)(Prime Polymer公司製造、密度:910 kg/m3)、與成為軟化層(B)的直鏈 狀低密度聚乙烯(LLDPE)(Prime Polymer公司製造、密度918 kg/m3)共擠出,而獲得2層的共擠出膜。在所得的共擠出膜的軟化層(B)上塗佈上述UV黏著劑後,進行乾燥而形成黏著層(C),而獲得半導體晶圓表面保護用膜。半導體晶圓表面保護用膜的基材層(A)/軟化層(B)/黏著層(C)的厚度為60 μm/70 μm/5 μm,合計厚度為135 μm。 A homopolypropylene (hPP) (manufactured by Prime Polymer Co., Ltd., density: 910 kg/m 3 ) to be a base layer (A), and a linear low-density polyethylene (LLDPE) to be a softened layer (B) (Prime) Copolymerized at a density of 918 kg/m 3 manufactured by Polymer, and a 2-layer co-extruded film was obtained. The UV adhesive is applied onto the softened layer (B) of the obtained coextruded film, and then dried to form an adhesive layer (C) to obtain a film for semiconductor wafer surface protection. The thickness of the base material layer (A)/softening layer (B)/adhesive layer (C) of the film for semiconductor wafer surface protection is 60 μm/70 μm/5 μm, and the total thickness is 135 μm.

2)隆起部(邊緣)的形成性的評價 2) Evaluation of the formation of the ridge (edge)

將所得的半導體晶圓表面保護用膜切出大於藍寶石晶圓的尺寸。接著,將厚度650 μm、4英吋尺寸的藍寶石晶圓配置於半導體晶圓表面保護用膜上。此時,使藍寶石晶圓的電路形成面與半導體晶圓表面保護用膜的黏著層(C)接觸。將這些層放置於熱壓製機中,以140℃、10 MPa的壓力熱壓接2分鐘。 The obtained film for semiconductor wafer surface protection is cut to a size larger than that of the sapphire wafer. Next, a sapphire wafer having a thickness of 650 μm and a size of 4 inches was placed on the film for semiconductor wafer surface protection. At this time, the circuit formation surface of the sapphire wafer is brought into contact with the adhesion layer (C) of the film for semiconductor wafer surface protection. These layers were placed in a hot press and thermocompression bonded at 140 ° C, 10 MPa for 2 minutes.

接著,對半導體晶圓表面保護用膜照射紫外線約1000 mJ後,將半導體晶圓表面保護用膜自半導體晶圓剝離,藉由顯微鏡觀察所得的半導體晶圓表面保護用膜的剖面形狀。測定半導體晶圓表面保護用膜的剖面中的2個部位的隆起部(邊緣)的高度,並求出這些高度的平均值。隆起部(邊緣)的高度是測定隆起部(邊緣)的頂點相對於半導體晶圓表面保護用膜的與半導體晶圓的電路形成面接觸的表面的高度。隆起部(邊緣)的形成性的評價是根據以下基準來進行。 Then, the semiconductor wafer surface protective film is irradiated with ultraviolet rays for about 1000 mJ, and the semiconductor wafer surface protective film is peeled off from the semiconductor wafer, and the cross-sectional shape of the obtained semiconductor wafer surface protective film is observed by a microscope. The height of the ridges (edges) at two locations in the cross section of the film for semiconductor wafer surface protection was measured, and the average value of these heights was obtained. The height of the ridge (edge) is a height at which the apex of the ridge (edge) is measured with respect to the surface of the semiconductor wafer surface protective film that is in contact with the circuit forming surface of the semiconductor wafer. The evaluation of the formability of the ridges (edges) was performed based on the following criteria.

○:隆起部(邊緣)的高度為200 μm以上 ○: The height of the ridge (edge) is 200 μm or more

×:隆起部(邊緣)的高度小於200 μm ×: The height of the ridge (edge) is less than 200 μm

3)背面研磨性的評價 3) Evaluation of back grinding property

與上述同樣地,將所得的半導體晶圓表面保護用膜切出大於藍寶石晶圓的尺寸。接著,將厚度650 μm、4英吋尺寸的藍寶石晶圓配置於半導體晶圓表面保護用膜上。將這些層放置於熱壓製機中,以140℃、10 MPa的壓力熱壓接2分鐘。 In the same manner as described above, the obtained film for semiconductor wafer surface protection was cut out to a size larger than that of the sapphire wafer. Next, a sapphire wafer having a thickness of 650 μm and a size of 4 inches was placed on the film for semiconductor wafer surface protection. These layers were placed in a hot press and thermocompression bonded at 140 ° C, 10 MPa for 2 minutes.

90 μm背面研磨性 90 μm back grinding

將使藍寶石晶圓熱壓接的半導體晶圓表面保護用膜放置於Disco DGP8761的吸著台上,藉由濕式研磨藍寶石晶圓的電路非形成面(背面)直至晶圓厚度為90 μm。研磨時的晶圓的溫度約40℃。並且,根據以下基準評價背面研磨性。 The semiconductor wafer surface protective film for thermocompression bonding of the sapphire wafer was placed on the sorption table of the Disco DGP8761 by wet-grinding the non-formed surface (back surface) of the sapphire wafer until the wafer thickness was 90 μm. The temperature of the wafer during polishing was about 40 °C. Further, the back surface polishing property was evaluated based on the following criteria.

○:可進行背面研磨直至晶圓的厚度為90 μm ○: Back grinding can be performed until the thickness of the wafer is 90 μm

×:在晶圓的厚度為90 μm前基板破裂(無法背面研磨) ×: The substrate is broken before the thickness of the wafer is 90 μm (cannot be back-grinded)

70 μm背面研磨性 70 μm back grinding

將進行背面研磨直至晶圓的厚度為90 μm的藍寶石晶圓,進一步藉由濕式研磨直至晶圓厚度為70 μm。並且根據以下基準評價背面研磨性。 The sapphire wafer is back-polished to a thickness of 90 μm, and further wet-polished until the wafer thickness is 70 μm. Further, the back grinding property was evaluated based on the following criteria.

○:可進行背面研磨直至晶圓的厚度為70 μm ○: Back grinding can be performed until the thickness of the wafer is 70 μm

×:在晶圓的厚度為70 μm前基板破裂(無法背面研磨) ×: The substrate is broken before the thickness of the wafer is 70 μm (cannot be back-grinded)

4)DP(乾式拋光)後的隆起部的形狀的評價 4) Evaluation of the shape of the ridge after DP (dry polishing)

對於上述3)的藉由濕式的背面研磨結束後的樣品,進一步藉由乾式進行研磨加工(乾式拋光)5分鐘。乾式拋光時的晶圓的溫度約100℃。接著,對半導體晶圓表面保護用膜照射紫外線約1000 mJ後,自半導體晶圓表面保護用膜剝離藍寶石晶圓。藉由顯微鏡觀察所得的半導體晶圓表面保護用膜的剖面形狀,測定隆起部(邊緣)的高度。DP耐熱性的評價是根據以下基準來進行。 The sample after completion of the wet back grinding of the above 3) was further subjected to a dry process (dry polishing) for 5 minutes. The temperature of the wafer during dry polishing is about 100 °C. Next, after the semiconductor wafer surface protective film is irradiated with ultraviolet rays for about 1000 mJ, the sapphire wafer is peeled off from the semiconductor wafer surface protective film. The cross-sectional shape of the obtained film for semiconductor wafer surface protection was observed by a microscope, and the height of the ridge (edge) was measured. The evaluation of DP heat resistance was carried out based on the following criteria.

○:隆起部(邊緣)的高度為晶圓的研磨後的厚度程度(邊緣未熔融而殘留) ○: The height of the ridge (edge) is the thickness of the wafer after polishing (the edge is not melted and remains)

×:隆起部(邊緣)的高度低於晶圓的研磨厚度(邊緣熔融而消失) ×: The height of the ridge (edge) is lower than the polishing thickness of the wafer (the edge melts and disappears)

5)研磨後的基材層(A)的表面平滑性 5) Surface smoothness of the substrate layer (A) after grinding

藉由觸針式表面形狀測定機(Veeco公司Dektac3)評價上述4)的DP(乾式拋光)後的基材層(A)的表面平滑性。表面平滑性的評價是根據以下基準來進行。 The surface smoothness of the base material layer (A) after the DP (dry polishing) of the above 4) was evaluated by a stylus type surface shape measuring machine (Veeco Dektac 3). The evaluation of the surface smoothness was performed based on the following criteria.

○:因吸著台的表面形狀的轉印而基材層(A)表面的凹凸的Ra小於1 μm ○: Ra of the unevenness of the surface of the base layer (A) due to the transfer of the surface shape of the absorbing table is less than 1 μm

×:因吸著台的表面形狀的轉印而基材層(A)表面的凹凸的Ra為1 μm以上 ×: Ra of the unevenness on the surface of the base layer (A) is 1 μm or more due to the transfer of the surface shape of the absorbing table

(實例2) (Example 2)

將基材層(A)與軟化層(B)的厚度分別變更為30 μm,除此以外,以與實例1相同的方式製作半導體晶圓表面保護用膜,並進行同樣的評價。 A semiconductor wafer surface protective film was produced in the same manner as in Example 1 except that the thickness of the base layer (A) and the softened layer (B) was changed to 30 μm, and the same evaluation was performed.

(實例3) (Example 3)

將軟化層(B)的材料變更為乙烯-α-烯烴共聚物(TAFMER(三井化學公司製造)、密度:893 kg/m3),除此以外,以與實例1相同的方式製作半導體晶圓表面保護用膜,並進行同樣的評價。 A semiconductor wafer was produced in the same manner as in Example 1 except that the material of the softening layer (B) was changed to an ethylene-α-olefin copolymer (TAFMER (manufactured by Mitsui Chemicals, Inc.), density: 893 kg/m 3 ). The film for surface protection was evaluated in the same manner.

(實例4) (Example 4)

將軟化層(B)的材料變更為直鏈狀低密度聚乙烯(LLDPE)(Prime Polymer公司製造、密度938 kg/m3),將基材層(A)與軟化層(B)的厚度分別變更為30 μm,除此以外,以與實例1相同的方式製作半導體晶圓表面保護用膜,並進行同樣的評價。 The material of the softened layer (B) was changed to a linear low-density polyethylene (LLDPE) (manufactured by Prime Polymer Co., Ltd., density: 938 kg/m 3 ), and the thicknesses of the base layer (A) and the softened layer (B) were respectively A semiconductor wafer surface protective film was produced in the same manner as in Example 1 except that the film was changed to 30 μm, and the same evaluation was performed.

(實例5) (Example 5)

將軟化層(B)的材料變更為無規聚丙烯(rPP)(Prime Polymer公司製造、密度:910 kg/m3),將基材層(A)與軟化層(B)的厚度分別變更為30 μm,除此以外,以與實例1相同的方式製作半導體晶圓表面保護用膜,並進行同樣的評價。 The material of the softened layer (B) was changed to a random polypropylene (rPP) (manufactured by Prime Polymer Co., Ltd., density: 910 kg/m 3 ), and the thicknesses of the base layer (A) and the softened layer (B) were changed to A film for semiconductor wafer surface protection was produced in the same manner as in Example 1 except that 30 μm was used, and the same evaluation was performed.

(比較例1) (Comparative Example 1)

分別將基材層(A)的材料變更為無規聚丙烯(rPP)(Prime Polymer公司製造、密度:910 kg/m3),將軟化層(B)的材料變更為乙烯-α-烯烴共聚物(TAFMER(三井化學公司製造)、密度:893 kg/m3),除此以外,以與實例1相同的方式製作半導體晶圓表面保護用膜,並進行同樣的評價。 The material of the base material layer (A) was changed to a random polypropylene (rPP) (manufactured by Prime Polymer Co., Ltd., density: 910 kg/m 3 ), and the material of the softened layer (B) was changed to ethylene-α-olefin copolymerization. A semiconductor wafer surface protective film was produced in the same manner as in Example 1 except that the material (TAFMER (manufactured by Mitsui Chemicals, Inc.), density: 893 kg/m 3 ) was used, and the same evaluation was performed.

(比較例2) (Comparative Example 2)

分別將基材層(A)的材料變更為直鏈狀低密度聚乙烯(LLDPE)(Prime Polymer公司製造、密度918 kg/m3),將軟化層(B)的材料變更為乙烯-α-烯烴共聚物(TAFMER(三井化學公司製造)、密度:893 kg/m3),除此以外,以與實例1相同的方式製作半導體晶圓表面保護用膜,並進行同樣的評價。 The material of the base material layer (A) was changed to a linear low-density polyethylene (LLDPE) (manufactured by Prime Polymer Co., Ltd., density: 918 kg/m 3 ), and the material of the softened layer (B) was changed to ethylene-α- A semiconductor wafer surface protective film was produced in the same manner as in Example 1 except that the olefin copolymer (TAFMER (manufactured by Mitsui Chemicals, Inc.), density: 893 kg/m 3 ) was used, and the same evaluation was performed.

(比較例3) (Comparative Example 3)

分別將基材層(A)的材料變更為直鏈狀低密度聚乙烯(LLDPE)(Prime Polymer公司製造、密度918 kg/m3),將軟化層(B)的材料變更為乙烯-α-烯烴共聚物(TAFMER(三井化學公司製造)、密度:861 kg/m3),除此以外,以與實例1相同的方式製作半導體晶圓表面保護用膜,並進行同樣的評價。 The material of the base material layer (A) was changed to a linear low-density polyethylene (LLDPE) (manufactured by Prime Polymer Co., Ltd., density: 918 kg/m 3 ), and the material of the softened layer (B) was changed to ethylene-α- A semiconductor wafer surface protective film was produced in the same manner as in Example 1 except that the olefin copolymer (TAFMER (manufactured by Mitsui Chemicals, Inc.), density: 861 kg/m 3 ) was used, and the same evaluation was performed.

(比較例4) (Comparative Example 4)

分別將軟化層(B)的材料變更為乙烯-α-烯烴共聚物(TAFMER(三井化學公司製造)、密度:861 kg/m3),將基材層(A)與軟化層(B)的厚度變更為30 μm,除此以外,以與實例1相同的方式製作半導體晶圓表面保護用膜,並進行同樣的評價。 The material of the softening layer (B) was changed to an ethylene-α-olefin copolymer (TAFMER (manufactured by Mitsui Chemicals, Inc.), density: 861 kg/m 3 ), and the substrate layer (A) and the softened layer (B) were A film for semiconductor wafer surface protection was produced in the same manner as in Example 1 except that the thickness was changed to 30 μm, and the same evaluation was performed.

將實例1~實例5及比較例1~比較例4的樣品膜的儲存彈性模數、及半導體晶圓表面保護用膜的評價結果示於表1~表3。 The storage elastic modulus of the sample films of Examples 1 to 5 and Comparative Examples 1 to 4 and the evaluation results of the film for semiconductor wafer surface protection are shown in Tables 1 to 3.

如表1及表2所示可知,軟化層(B)在40℃的儲存彈性模數GB(40)為10 MPa以上的實例1~實例5的半導體晶圓表面保護用膜,藉由熱壓製可良好地形成隆起部(邊緣),且在背面研磨時晶圓亦不破損。其原因認為,在 背面研磨時隆起部(邊緣)不熔融,而可穩定地保持晶圓的端部。 As shown in Tables 1 and 2, the film of the semiconductor wafer surface protection of Examples 1 to 5 in which the softening layer (B) has a storage elastic modulus G B (40) at 40 ° C of 10 MPa or more is obtained by heat. The embossing (edge) is well formed by pressing, and the wafer is not damaged at the time of back grinding. The reason for this is considered to be that the ridge portion (edge) is not melted during back grinding, and the end portion of the wafer can be stably held.

另一方面可知,軟化層(B)在40℃的儲存彈性模數GB(40)小於10 MPa的比較例3及比較例4的半導體晶圓表面保護用膜,雖然藉由熱壓製可形成隆起部(邊緣),但在背面研磨時晶圓破損。其原因認為,在背面研磨時隆起部(邊緣)亦軟化,而無法穩定保持晶圓的端部。 On the other hand, it is understood that the film for semiconductor wafer surface protection of Comparative Example 3 and Comparative Example 4 in which the softening layer (B) has a storage elastic modulus G B (40) of 40 ° C or less is 10 MPa, although it can be formed by hot pressing. The ridge (edge), but the wafer is broken during back grinding. The reason for this is that the ridge portion (edge) is also softened during back grinding, and the end portion of the wafer cannot be stably held.

實例1~實例5中,在實例3中在70 μm研磨時晶圓破裂,相對於此,實例2中即使在70 μm研磨時晶圓亦未破裂。其原因認為,實例2的半導體晶圓表面保護用膜的軟化層(B)在40℃的儲存彈性模數GB(40)高於實例3的半導體晶圓表面保護用膜。另外,在實例1中在70 μm研磨時晶圓破裂的原因認為,半導體晶圓表面保護用膜相對於晶圓的最終加工厚度而過厚,而無法抑制半導體晶圓的變形(彎曲、撓曲)。 In Examples 1 to 5, the wafer was broken at 70 μm in Example 3, whereas in Example 2, the wafer was not broken even at 70 μm. The reason for this is that the softening layer (B) of the film for semiconductor wafer surface protection of Example 2 has a storage elastic modulus G B (40) at 40 ° C higher than that of the semiconductor wafer surface protective film of Example 3. In addition, the reason why the wafer was broken at the time of polishing at 70 μm in Example 1 was that the film for semiconductor wafer surface protection was too thick with respect to the final processed thickness of the wafer, and the deformation of the semiconductor wafer (bending, flexing) could not be suppressed. ).

而且可知,實例1及實例2的半導體晶圓表面保護用膜,在乾式拋光(DP)時的接近100℃的高溫下,隆起部(邊緣)亦不軟化,而可穩定地保持藍寶石晶圓的端部。 Further, it can be seen that the film for semiconductor wafer surface protection of Examples 1 and 2 does not soften the ridge portion (edge) at a high temperature of approximately 100 ° C at the time of dry polishing (DP), and can stably maintain the sapphire wafer. Ends.

而且可知,比較例1~比較例3中,研磨後的基材層(A)的表面平滑性較低。其原因認為,比較例1~比較例3的半導體晶圓表面保護用膜的基材層(A)在150℃的儲存彈性模數GA(150)小於1 MPa,在背面研磨時轉印吸著台的表面形狀。如此,若在背面研磨時將吸著台的表面形狀轉印至基材層(A)的表面,則其後的切割步驟中使 半導體晶圓表面保護用膜固定在其他吸著台上時,在吸著台與半導體晶圓表面保護用膜的基材層(A)之間容易產生漏氣。若產生此種漏氣,則半導體晶圓表面保護用膜在吸著台上固定不了,因此欠佳。 Further, in Comparative Examples 1 to 3, the surface smoothness of the base material layer (A) after polishing was low. The reason why the base material layer (A) of the semiconductor wafer surface protective film of Comparative Example 1 to Comparative Example 3 has a storage elastic modulus G A (150) at 150 ° C of less than 1 MPa, and is transferred at the time of back grinding. The surface shape of the platform. As described above, when the surface shape of the absorbing table is transferred to the surface of the base material layer (A) during the back surface polishing, when the semiconductor wafer surface protective film is fixed to the other absorbing table in the subsequent dicing step, Air leakage is likely to occur between the sorption table and the base material layer (A) of the semiconductor wafer surface protection film. If such a leak occurs, the film for semiconductor wafer surface protection cannot be fixed on the absorbing table, which is not preferable.

(實例6) (Example 6)

將與實例2中所用的膜同樣的膜貼附於藍寶石晶圓上(安裝步驟),進行熱壓接(壓製步驟),而形成隆起部(邊緣)。 The same film as that used in Example 2 was attached to a sapphire wafer (mounting step), and thermocompression bonding (pressing step) was performed to form a ridge (edge).

具體而言,將半導體晶圓表面保護用膜切出大於藍寶石晶圓的尺寸。另外,準備厚度650 μm、4英吋尺寸的藍寶石晶圓。如圖2A所示,配置於半導體晶圓表面保護用膜上。將加熱板溫度加熱至140℃,藉由輥使半導體晶圓表面保護用膜壓接於藍寶石晶圓,而獲得藍寶石晶圓與半導體晶圓表面保護用膜的積層物。輥壓力設為0.5 MPa,輥速度設為10 mm/秒。 Specifically, the film for semiconductor wafer surface protection is cut to a size larger than that of the sapphire wafer. In addition, a sapphire wafer having a thickness of 650 μm and a size of 4 inches was prepared. As shown in FIG. 2A, it is disposed on a film for semiconductor wafer surface protection. The temperature of the hot plate was heated to 140 ° C, and the semiconductor wafer surface protective film was pressure-bonded to the sapphire wafer by a roll to obtain a laminate of the sapphire wafer and the semiconductor wafer surface protective film. The roll pressure was set to 0.5 MPa and the roll speed was set to 10 mm/sec.

接著,如圖2C所示,藉由熱壓製機的上熱板(配置於半導體晶圓表面保護用膜的熱板)與下熱板(配置於藍寶石晶圓側的熱板),夾住所得的積層物,以180秒、10 MPa進行壓接。此時,將上熱板的溫度設為140℃,將下熱板的溫度設為120℃,即,將兩者的平均溫度TP設為130℃。 Next, as shown in FIG. 2C, the upper hot plate (the hot plate disposed on the semiconductor wafer surface protective film) and the lower hot plate (the hot plate disposed on the sapphire wafer side) of the hot press are sandwiched. The laminate was crimped at 180 seconds and 10 MPa. At this time, the temperature of the upper hot plate was set to 140 ° C, and the temperature of the lower hot plate was set to 120 ° C, that is, the average temperature TP of both was set to 130 ° C.

接著,對半導體晶圓表面保護用膜照射紫外線約1000 mJ後,將半導體晶圓表面保護用膜自藍寶石晶圓剝離,藉由顯微鏡觀察所得的半導體晶圓表面保護用膜的剖面形狀。測定半導體晶圓表面保護用膜的剖面中2個部位的隆 起部(邊緣)的高度,求出這些高度的平均值。 Then, the semiconductor wafer surface protective film was irradiated with ultraviolet rays for about 1000 mJ, and the semiconductor wafer surface protective film was peeled off from the sapphire wafer, and the cross-sectional shape of the obtained semiconductor wafer surface protective film was observed by a microscope. Measuring the height of two parts in the cross section of the film for semiconductor wafer surface protection The height of the starting part (edge) is obtained by averaging these heights.

1.半徑方向的張力的有無 1. The presence or absence of tension in the radial direction

在壓製步驟後,以將半導體晶圓表面保護用膜貼附於環框的狀態,在藍寶石晶圓中央載置150 g砝碼,測定膜的沉入量。將沉入2 mm以上的情況作為無張力的情況並評價為×。 After the pressing step, a film of the semiconductor wafer surface protection was attached to the ring frame, and a 150 g weight was placed on the center of the sapphire wafer to measure the amount of film sinking. The case where the sinking was 2 mm or more was regarded as the case of no tension and was evaluated as ×.

2.皺褶 2. Wrinkles

在壓製步驟後,藉由目視,將在藍寶石晶圓的周圍的半導體晶圓表面保護用膜上產生10條以上放射狀皺褶的情況評價為×。 After the pressing step, 10 or more radial wrinkles were formed on the semiconductor wafer surface protective film around the sapphire wafer by visual observation.

3. 48小時後的剝離 3. Stripping after 48 hours

在壓製步驟後,以在藍寶石晶圓上貼附半導體晶圓表面保護用膜的狀態在室溫下放置48小時。然後,將在晶圓表面保護用膜與藍寶石晶圓端部見到1 mm以上的剝離的情況評價為×。 After the pressing step, the semiconductor wafer surface protective film was attached to the sapphire wafer at room temperature for 48 hours. Then, the case where the wafer surface protective film and the sapphire wafer end portion were peeled off by 1 mm or more was evaluated as ×.

(實例7) (Example 7)

將與實例2中所用的膜同樣的膜貼附於藍寶石晶圓上(安裝步驟),進行熱壓接(壓製步驟),而形成隆起部(邊緣)。具體而言,將半導體晶圓表面保護用膜切出大於藍寶石晶圓的尺寸。另外,準備厚度650 μm、4英吋尺寸的藍寶石晶圓。如圖2A所示,配置於半導體晶圓表面保護用膜上。將加熱板溫度加熱至100℃,藉由輥使半導體晶圓表面保護用膜壓接於藍寶石晶圓,而獲得藍寶石晶圓與半導體晶圓表面保護用膜的積層物。輥壓力設為0.5 MPa, 輥速度設為10 mm/秒。 The same film as that used in Example 2 was attached to a sapphire wafer (mounting step), and thermocompression bonding (pressing step) was performed to form a ridge (edge). Specifically, the film for semiconductor wafer surface protection is cut to a size larger than that of the sapphire wafer. In addition, a sapphire wafer having a thickness of 650 μm and a size of 4 inches was prepared. As shown in FIG. 2A, it is disposed on a film for semiconductor wafer surface protection. The temperature of the hot plate was heated to 100 ° C, and the film for semiconductor wafer surface protection was pressure-bonded to the sapphire wafer by a roll to obtain a laminate of the sapphire wafer and the film for semiconductor wafer surface protection. The roller pressure is set to 0.5 MPa, The roller speed was set to 10 mm/sec.

接著,如圖2C所示,藉由熱壓製機的上熱板(配置於半導體晶圓表面保護用膜的熱板)與下熱板(配置於藍寶石晶圓側的熱板),夾住所得的積層物,以180秒、10 MPa進行壓接。此時,將上熱板的溫度設為140℃,將下熱板的溫度設為120℃,即,將兩者的平均溫度TP設為130℃。 Next, as shown in FIG. 2C, the upper hot plate (the hot plate disposed on the semiconductor wafer surface protective film) and the lower hot plate (the hot plate disposed on the sapphire wafer side) of the hot press are sandwiched. The laminate was crimped at 180 seconds and 10 MPa. At this time, the temperature of the upper hot plate was set to 140 ° C, and the temperature of the lower hot plate was set to 120 ° C, that is, the average temperature TP of both was set to 130 ° C.

與實例6同樣,求出隆起部(邊緣)的高度,並評價「半徑方向的張力的有無」「皺褶的有無」「48小時後的隆起(剝離)的有無」。 In the same manner as in Example 6, the height of the raised portion (edge) was determined, and "the presence or absence of the tension in the radial direction", "the presence or absence of the wrinkle", and the presence or absence of the swelling (peeling after 48 hours) were evaluated.

(實例8) (Example 8)

將與實例2中所用的膜同樣的膜貼附於藍寶石晶圓上(安裝步驟),進行熱壓接(壓製步驟),而形成隆起部(邊緣)。具體而言,將半導體晶圓表面保護用膜切出大於藍寶石晶圓的尺寸。另外,準備厚度650 μm、4英吋尺寸的藍寶石晶圓。如圖2A所示,配置於半導體晶圓表面保護用膜上。將加熱板溫度設為25℃,藉由輥使半導體晶圓表面保護用膜壓接於藍寶石晶圓上,而獲得藍寶石晶圓與半導體晶圓表面保護用膜的積層物。輥壓力設為0.5 MPa,輥速度設為10 mm/秒。 The same film as that used in Example 2 was attached to a sapphire wafer (mounting step), and thermocompression bonding (pressing step) was performed to form a ridge (edge). Specifically, the film for semiconductor wafer surface protection is cut to a size larger than that of the sapphire wafer. In addition, a sapphire wafer having a thickness of 650 μm and a size of 4 inches was prepared. As shown in FIG. 2A, it is disposed on a film for semiconductor wafer surface protection. The temperature of the hot plate was set to 25 ° C, and the film for semiconductor wafer surface protection was pressure-bonded to the sapphire wafer by a roll to obtain a laminate of the sapphire wafer and the film for semiconductor wafer surface protection. The roll pressure was set to 0.5 MPa and the roll speed was set to 10 mm/sec.

接著,如圖2C所示,藉由熱壓製機的上熱板(配置於半導體晶圓表面保護用膜的熱板)與下熱板(配置於藍寶石晶圓側的熱板),夾住所得的積層物,以180秒、10 MPa進行壓接。此時,將上熱板的溫度設為140℃,將下熱板的溫度設為120℃,即,將兩者的平均溫度TP設為130℃。 Next, as shown in FIG. 2C, the upper hot plate (the hot plate disposed on the semiconductor wafer surface protective film) and the lower hot plate (the hot plate disposed on the sapphire wafer side) of the hot press are sandwiched. The laminate was crimped at 180 seconds and 10 MPa. At this time, the temperature of the upper hot plate was set to 140 ° C, and the temperature of the lower hot plate was set to 120 ° C, that is, the average temperature TP of both was set to 130 ° C.

與實例6同樣,求出隆起部(邊緣)的高度,並評價「半徑方向的張力的有無」「皺褶的有無」「48小時後的浮起(剝離)的有無」。 In the same manner as in Example 6, the height of the raised portion (edge) was determined, and "the presence or absence of the tension in the radial direction", "the presence or absence of the wrinkle", and the presence or absence of the floating (peeling after 48 hours) were evaluated.

(參考例5) (Reference example 5)

將與實例2中所用的膜同樣的膜貼附於藍寶石晶圓上(安裝步驟),進行熱壓接(壓製步驟),而形成隆起部(邊緣)。具體而言,將半導體晶圓表面保護用膜切出大於藍寶石晶圓的尺寸。另外,準備厚度650 μm、4英吋尺寸的藍寶石晶圓。如圖2A所示,配置於半導體晶圓表面保護用膜上。將加熱板溫度設為100℃,藉由輥使半導體晶圓表面保護用膜壓接於藍寶石晶圓,而獲得藍寶石晶圓與半導體晶圓表面保護用膜的積層物。輥壓力設為0.5 MPa,輥速度設為10 mm/秒。 The same film as that used in Example 2 was attached to a sapphire wafer (mounting step), and thermocompression bonding (pressing step) was performed to form a ridge (edge). Specifically, the film for semiconductor wafer surface protection is cut to a size larger than that of the sapphire wafer. In addition, a sapphire wafer having a thickness of 650 μm and a size of 4 inches was prepared. As shown in FIG. 2A, it is disposed on a film for semiconductor wafer surface protection. The temperature of the hot plate was set to 100 ° C, and the semiconductor wafer surface protective film was pressure-bonded to the sapphire wafer by a roll to obtain a laminate of the sapphire wafer and the semiconductor wafer surface protective film. The roll pressure was set to 0.5 MPa and the roll speed was set to 10 mm/sec.

接著,如圖2C所示,藉由熱壓製機的上熱板(配置於半導體晶圓表面保護用膜的熱板)與下熱板(配置於藍寶石晶圓側的熱板),夾住所得的積層物,以180秒、10 MPa進行壓接。此時,將上熱板的溫度設為110℃,將下熱板的溫度設為90℃,即將兩者的平均溫度TP設為100℃。 Next, as shown in FIG. 2C, the upper hot plate (the hot plate disposed on the semiconductor wafer surface protective film) and the lower hot plate (the hot plate disposed on the sapphire wafer side) of the hot press are sandwiched. The laminate was crimped at 180 seconds and 10 MPa. At this time, the temperature of the upper hot plate was set to 110 ° C, and the temperature of the lower hot plate was set to 90 ° C, that is, the average temperature TP of both was set to 100 ° C.

與實例6同樣,求出隆起部(邊緣)的高度,並評價「半徑方向的張力的有無」「皺褶的有無」「48小時後的浮起(剝離)的有無」。 In the same manner as in Example 6, the height of the raised portion (edge) was determined, and "the presence or absence of the tension in the radial direction", "the presence or absence of the wrinkle", and the presence or absence of the floating (peeling after 48 hours) were evaluated.

實例6中,安裝步驟中的溫度TM高於壓製步驟中的溫度TP;且溫度TP比軟化層(B)的軟化點溫度(TmB)高14℃。因此,形成具有充分高度的邊緣,未產生皺褶, 且藍寶石基板與保護膜未剝離。 In Example 6, the temperature TM in the mounting step was higher than the temperature TP in the pressing step; and the temperature TP was 14 ° C higher than the softening point temperature (TmB) of the softening layer (B). Therefore, an edge having a sufficient height is formed without wrinkles, And the sapphire substrate and the protective film are not peeled off.

實例7中,安裝步驟中的溫度TM比壓製步驟中的溫度TP低30℃。因此,雖然可形成具有充分高度的邊緣,但確認到產生皺褶。而且實例8中,安裝步驟中的溫度TM比壓製步驟中的溫度TP低105℃。因此,雖然可形成具有充分高度的邊緣,雖然可形成具有充分高度的邊緣,但確認到產生皺褶,亦確認到藍寶石基板與保護膜剝離。 In Example 7, the temperature TM in the mounting step was 30 ° C lower than the temperature TP in the pressing step. Therefore, although an edge having a sufficient height can be formed, it is confirmed that wrinkles are generated. Also in Example 8, the temperature TM in the mounting step was 105 ° C lower than the temperature TP in the pressing step. Therefore, although an edge having a sufficient height can be formed, although an edge having a sufficient height can be formed, it was confirmed that wrinkles were generated, and it was confirmed that the sapphire substrate and the protective film were peeled off.

參考例5中,壓製步驟中的溫度TP低於軟化層(B)的軟化點溫度(TmB)。因此,無法形成充分的邊緣。 In Reference Example 5, the temperature TP in the pressing step was lower than the softening point temperature (TmB) of the softening layer (B). Therefore, a sufficient edge cannot be formed.

(實例9) (Example 9)

將與實例2中所用的膜同樣的膜貼附於藍寶石晶圓上(安裝步驟),進行熱壓接(壓製步驟),而形成隆起部(邊緣)。具體而言,將半導體晶圓表面保護用膜切出大於藍寶石晶圓的尺寸。另外,準備厚度650 μm、4英吋尺寸的藍寶石晶圓。如圖2A所示,配置於半導體晶圓表面保護用膜上。將加熱板溫度加熱至140℃,藉由輥使半導體晶圓表面保護用膜壓接於藍寶石晶圓,而獲得藍寶石晶圓與半導體晶圓表面保護用膜的積層物。輥壓力設為0.5 MPa,輥速度設為10 mm/秒。 The same film as that used in Example 2 was attached to a sapphire wafer (mounting step), and thermocompression bonding (pressing step) was performed to form a ridge (edge). Specifically, the film for semiconductor wafer surface protection is cut to a size larger than that of the sapphire wafer. In addition, a sapphire wafer having a thickness of 650 μm and a size of 4 inches was prepared. As shown in FIG. 2A, it is disposed on a film for semiconductor wafer surface protection. The temperature of the hot plate was heated to 140 ° C, and the semiconductor wafer surface protective film was pressure-bonded to the sapphire wafer by a roll to obtain a laminate of the sapphire wafer and the semiconductor wafer surface protective film. The roll pressure was set to 0.5 MPa and the roll speed was set to 10 mm/sec.

接著,如圖2C所示,藉由熱壓製機的上熱板(配置於半導體晶圓表面保護用膜的熱板)與下熱板(配置於藍寶石晶圓側的熱板),夾住所得的積層物,以180秒、10 MPa進行壓接。此時,將上熱板的溫度設為140℃,將下熱板的溫度設為100℃,即將兩者的平均溫度設為120℃。 Next, as shown in FIG. 2C, the upper hot plate (the hot plate disposed on the semiconductor wafer surface protective film) and the lower hot plate (the hot plate disposed on the sapphire wafer side) of the hot press are sandwiched. The laminate was crimped at 180 seconds and 10 MPa. At this time, the temperature of the upper hot plate was set to 140 ° C, and the temperature of the lower hot plate was set to 100 ° C, that is, the average temperature of both was 120 ° C.

接著,與實例6同樣,求出隆起部(邊緣)的高度。 Next, in the same manner as in Example 6, the height of the ridge portion (edge) was obtained.

(實例10) (Example 10)

將與實例2中所用的膜同樣的膜貼附於藍寶石晶圓上(安裝步驟),進行熱壓接(壓製步驟),而形成隆起部(邊緣)。具體而言,將半導體晶圓表面保護用膜切出大於藍寶石晶圓的尺寸。另外,準備厚度650 μm、4英吋尺寸的藍寶石晶圓。如圖2A所示,配置於半導體晶圓表面保護用膜上。將加熱板溫度加熱至140℃,藉由輥使半導體晶圓表面保護用膜壓接於藍寶石晶圓,而獲得藍寶石晶圓與半導體晶圓表面保護用膜的積層物。輥壓力設為0.5 MPa,輥速度設為10 mm/秒。 The same film as that used in Example 2 was attached to a sapphire wafer (mounting step), and thermocompression bonding (pressing step) was performed to form a ridge (edge). Specifically, the film for semiconductor wafer surface protection is cut to a size larger than that of the sapphire wafer. In addition, a sapphire wafer having a thickness of 650 μm and a size of 4 inches was prepared. As shown in FIG. 2A, it is disposed on a film for semiconductor wafer surface protection. The temperature of the hot plate was heated to 140 ° C, and the semiconductor wafer surface protective film was pressure-bonded to the sapphire wafer by a roll to obtain a laminate of the sapphire wafer and the semiconductor wafer surface protective film. The roll pressure was set to 0.5 MPa and the roll speed was set to 10 mm/sec.

接著,如圖2C所示,藉由熱壓製機的上熱板(配置於半導體晶圓表面保護用膜的熱板)與下熱板(配置於藍寶石晶圓側的熱板),夾住所得的積層物,以180秒、10 MPa進行壓接。此時,將上熱板的溫度設為140℃,將下熱板的溫度設為140℃,即,將兩者的平均溫度設為140℃。 Next, as shown in FIG. 2C, the upper hot plate (the hot plate disposed on the semiconductor wafer surface protective film) and the lower hot plate (the hot plate disposed on the sapphire wafer side) of the hot press are sandwiched. The laminate was crimped at 180 seconds and 10 MPa. At this time, the temperature of the upper hot plate was set to 140 ° C, and the temperature of the lower hot plate was set to 140 ° C, that is, the average temperature of both was 140 ° C.

接著,與實例6同樣,求出隆起部(邊緣)的高度。 Next, in the same manner as in Example 6, the height of the ridge portion (edge) was obtained.

實例9中,安裝步驟中的溫度TM高於壓製步驟中的溫度TP;且溫度TP比軟化層(B)的軟化點溫度(TmB)高4℃。而且,壓製步驟中的上熱板溫度TP1高於下熱板溫度TP2。因此,形成具有充分高度的邊緣。 In Example 9, the temperature TM in the mounting step was higher than the temperature TP in the pressing step; and the temperature TP was 4 ° C higher than the softening point temperature (TmB) of the softening layer (B). Moreover, the upper hot plate temperature TP1 in the pressing step is higher than the lower hot plate temperature TP2. Therefore, an edge having a sufficient height is formed.

另一方面,實例10中,安裝步驟中的溫度TM與壓製步驟中的溫度TP為相同溫度;而且,壓製步驟中的上熱 板溫度TP1與下熱板溫度TP2為相同溫度。因此,導致邊緣稍稍扁平化,邊緣的高度與實例7相比而降低。 On the other hand, in Example 10, the temperature TM in the mounting step is the same as the temperature TP in the pressing step; moreover, the upper heat in the pressing step The plate temperature TP1 and the lower hot plate temperature TP2 are the same temperature. Therefore, the edge is slightly flattened, and the height of the edge is lowered as compared with Example 7.

(實例11~實例14) (Example 11 to Example 14)

將與實例2中所用的膜同樣的膜貼附於藍寶石晶圓上(安裝步驟),進行熱壓接(壓製步驟),而形成隆起部(邊緣)。具體而言,將半導體晶圓表面保護用膜切出大於藍寶石晶圓的尺寸。另外,準備厚度650 μm、4英吋尺寸的藍寶石晶圓。如圖2A所示,配置於半導體晶圓表面保護用膜上。將加熱板溫度加熱至140℃,藉由輥使半導體晶圓表面保護用膜壓接於藍寶石晶圓,而獲得藍寶石晶圓與半導體晶圓表面保護用膜的積層物。輥壓力設為0.5 MPa,輥速度設為10 mm/秒。 The same film as that used in Example 2 was attached to a sapphire wafer (mounting step), and thermocompression bonding (pressing step) was performed to form a ridge (edge). Specifically, the film for semiconductor wafer surface protection is cut to a size larger than that of the sapphire wafer. In addition, a sapphire wafer having a thickness of 650 μm and a size of 4 inches was prepared. As shown in FIG. 2A, it is disposed on a film for semiconductor wafer surface protection. The temperature of the hot plate was heated to 140 ° C, and the semiconductor wafer surface protective film was pressure-bonded to the sapphire wafer by a roll to obtain a laminate of the sapphire wafer and the semiconductor wafer surface protective film. The roll pressure was set to 0.5 MPa and the roll speed was set to 10 mm/sec.

接著,如圖7A所示,藉由熱壓製機的上熱板(配置於半導體晶圓表面保護用膜的熱板)、與如圖7B所示的具有圓錐狀凸部的下熱板(配置於藍寶石晶圓側的熱板),夾住所得的積層物,以180秒、10 MPa進行壓接。此時,將上熱板的溫度設為140℃,將下熱板的溫度設為120℃。實例11中,將凸部的高度設為0 μm(無凸部),實例12中,將凸部的高度設為5 μm,實例13中,將凸部的高度設為15 μm,實例14中,將凸部的高度設為25 μm。分別測定壓製步驟後的半導體晶圓表面保護用膜的厚度不均(最大厚度與最小厚度之差),與實例6同樣,求出隆起部(邊緣)的高度。 Next, as shown in FIG. 7A, the upper hot plate (the hot plate disposed on the semiconductor wafer surface protective film) of the hot press machine and the lower hot plate having the conical convex portion as shown in FIG. 7B (configuration) On the sapphire wafer side hot plate), the obtained laminate was sandwiched and crimped at 180 seconds and 10 MPa. At this time, the temperature of the upper hot plate was set to 140 ° C, and the temperature of the lower hot plate was set to 120 ° C. In Example 11, the height of the convex portion was set to 0 μm (no convex portion), in Example 12, the height of the convex portion was set to 5 μm, and in Example 13, the height of the convex portion was set to 15 μm, in Example 14. , set the height of the convex part to 25 μm. The thickness unevenness (the difference between the maximum thickness and the minimum thickness) of the semiconductor wafer surface protective film after the pressing step was measured, and the height of the ridge portion (edge) was determined in the same manner as in Example 6.

如表6所示可知,藉由在下熱板設置凸部,而可抑制壓製步驟後的半導體晶圓表面保護用膜的厚度不均,亦可形成隆起部(邊緣)。 As shown in Table 6, it is understood that by providing the convex portion on the lower heat plate, thickness unevenness of the semiconductor wafer surface protective film after the pressing step can be suppressed, and a ridge portion (edge) can be formed.

[產業上之可利用性] [Industrial availability]

本發明的半導體晶圓表面保護用膜即便對於特別是藍寶石基板等硬且脆的半導體晶圓,亦可無破損地進行背面研磨。 The film for semiconductor wafer surface protection of the present invention can be back-polished without damage even for a hard and brittle semiconductor wafer such as a sapphire substrate.

1‧‧‧藍寶石基板 1‧‧‧Sapphire substrate

2‧‧‧蠟樹脂層 2‧‧‧ wax resin layer

3‧‧‧磨石 3‧‧‧磨石

4‧‧‧先前的半導體晶圓保護膜 4‧‧‧Previous semiconductor wafer protective film

10'、10‧‧‧半導體晶圓表面保護用膜 10', 10‧‧‧Semiconductor wafer surface protection film

12‧‧‧基材層(A) 12‧‧‧Substrate layer (A)

14‧‧‧軟化層(B) 14‧‧‧Softening layer (B)

16‧‧‧黏著層(C) 16‧‧‧Adhesive layer (C)

18‧‧‧輕黏著層(D) 18‧‧‧Light adhesive layer (D)

20‧‧‧半導體晶圓 20‧‧‧Semiconductor wafer

20A‧‧‧半導體晶圓的電路形成面 20A‧‧‧Circuit forming surface of semiconductor wafer

20B‧‧‧半導體晶圓的電路非形成面(背面) 20B‧‧‧Semiconductor wafer circuit non-formed surface (back)

22-1‧‧‧上熱板 22-1‧‧‧Upper hot plate

22-2‧‧‧下熱板 22-2‧‧‧Next hot plate

24‧‧‧隆起部(邊緣) 24‧‧‧Uplift (edge)

26‧‧‧吸著台 26‧‧‧ suction table

28‧‧‧磨石 28‧‧‧磨石

30‧‧‧環框 30‧‧‧ ring frame

35‧‧‧輥 35‧‧‧roll

40‧‧‧加熱板 40‧‧‧heating plate

50‧‧‧環狀輔助構件 50‧‧‧Ring auxiliary components

60‧‧‧凸部 60‧‧‧ convex

100‧‧‧分配器 100‧‧‧Distributor

105‧‧‧接著劑 105‧‧‧Binder

110‧‧‧樹脂製環 110‧‧‧Resin ring

120‧‧‧模具 120‧‧‧Mold

125‧‧‧腔體 125‧‧‧ cavity

h‧‧‧高度 H‧‧‧height

DW‧‧‧半導體晶圓20的外直徑 DW‧‧‧ outer diameter of semiconductor wafer 20

DBIN‧‧‧環狀輔助構件50的環內直徑 DB IN ‧‧‧ring diameter of the annular auxiliary member 50

DBOUT‧‧‧環狀輔助構件50的環外直徑 Outer diameter of the DB OUT ‧‧‧ annular auxiliary member 50

DAIN‧‧‧環框30的內直徑 DA IN ‧‧‧ inner diameter of ring frame 30

圖1A是表示本發明的半導體晶圓表面保護膜的一個實施形態的示意圖。 Fig. 1A is a schematic view showing an embodiment of a semiconductor wafer surface protective film of the present invention.

圖1B是表示本發明的半導體晶圓表面保護膜的其他一個實施形態的示意圖。 Fig. 1B is a schematic view showing another embodiment of the semiconductor wafer surface protective film of the present invention.

圖2A是表示在半導體晶圓表面保護用膜上配置半導體晶圓的步驟(安裝步驟)的一例的圖。 2A is a view showing an example of a step (mounting step) of arranging a semiconductor wafer on a film for protecting a semiconductor wafer surface.

圖2B是表示在半導體晶圓表面保護用膜上配置半導體晶圓的積層物的圖。 2B is a view showing a laminate in which a semiconductor wafer is placed on a film for protecting a semiconductor wafer surface.

圖2C是表示在半導體晶圓的外周形成半導體表面保護用膜的隆起部的步驟(壓製步驟)的一例的圖。 2C is a view showing an example of a step (pressing step) of forming a raised portion of the film for semiconductor surface protection on the outer circumference of the semiconductor wafer.

圖2D是表示隆起部的一例的放大圖。 2D is an enlarged view showing an example of a raised portion.

圖2E是表示將半導體晶圓的電路非形成面研磨的步驟的一例的圖。 2E is a view showing an example of a procedure of polishing a circuit non-formation surface of a semiconductor wafer.

圖3是表示藉由先前的蠟工法的半導體晶圓的保護方法的一例的圖。 3 is a view showing an example of a method of protecting a semiconductor wafer by the prior waxing method.

圖4是表示使用先前的半導體晶圓表面保護用膜的半導體晶圓的保護方法的一例的圖。 4 is a view showing an example of a method of protecting a semiconductor wafer using a conventional semiconductor wafer surface protection film.

圖5A及圖5B是表示安裝步驟的其他實施形態的圖。 5A and 5B are views showing another embodiment of the mounting step.

圖6是表示藉由壓製步驟而半導體晶圓表面保護用膜的厚度變得不均勻的狀態的圖。 FIG. 6 is a view showing a state in which the thickness of the film for semiconductor wafer surface protection is made uneven by the pressing step.

圖7A是表示壓製步驟的其他實施形態的圖,圖7B~圖7C是表示凸部的形狀的例子的圖。 Fig. 7A is a view showing another embodiment of a pressing step, and Figs. 7B to 7C are views showing an example of a shape of a convex portion.

圖8A、圖8B以及圖8C是表示在半導體晶圓的外周形成與半導體表面保護用膜不同的隆起部的方法的圖。 8A, 8B, and 8C are views showing a method of forming a ridge portion different from the film for semiconductor surface protection on the outer circumference of the semiconductor wafer.

10‧‧‧半導體晶圓表面保護用膜 10‧‧‧Semiconductor wafer surface protection film

12‧‧‧基材層(A) 12‧‧‧Substrate layer (A)

14‧‧‧軟化層(B) 14‧‧‧Softening layer (B)

16‧‧‧黏著層(C) 16‧‧‧Adhesive layer (C)

Claims (20)

一種半導體晶圓表面保護用膜,包括:基材層(A),在150℃的儲存彈性模數GA(150)為1 MPa以上;軟化層(B),在120℃~180℃的任意溫度下的儲存彈性模數GB(120~180)為0.05 MPa以下,且在40℃的儲存彈性模數GB(40)為10 MPa以上。 A film for protecting a surface of a semiconductor wafer, comprising: a substrate layer (A) having a storage elastic modulus G A (150) at 150 ° C of 1 MPa or more; and a softening layer (B) at 120 ° C to 180 ° C The storage elastic modulus G B (120-180) at a temperature is 0.05 MPa or less, and the storage elastic modulus G B (40) at 40 ° C is 10 MPa or more. 如申請專利範圍第1項所述之半導體晶圓表面保護用膜,其中上述軟化層(B)在100℃下的儲存彈性模數GB(100)為1 MPa以上。 The film for semiconductor wafer surface protection according to claim 1, wherein the softening layer (B) has a storage elastic modulus G B (100) at 100 ° C of 1 MPa or more. 如申請專利範圍第1項所述之半導體晶圓表面保護用膜,其中上述軟化層(B)在60℃下的拉伸彈性模數EB(60)與在25℃下的拉伸彈性模數EB(25)滿足1>EB(60)/EB(25)>0.1的關係。 The film for semiconductor wafer surface protection according to claim 1, wherein the softening layer (B) has a tensile elastic modulus E B (60) at 60 ° C and a tensile elastic modulus at 25 ° C. The number E B (25) satisfies the relationship of 1>E B (60)/E B (25)>0.1. 如申請專利範圍第1項所述之半導體晶圓表面保護用膜,其中更包括:黏著層(C),其隔著上述軟化層(B)而配置於與上述基材層(A)相反側;上述黏著層(C)的依據JIS Z0237而測定的黏著力為0.1 N/25 mm~10 N/25 mm。 The film for semiconductor wafer surface protection according to claim 1, further comprising an adhesive layer (C) disposed on the opposite side of the base material layer (A) via the softened layer (B) The adhesive force of the above adhesive layer (C) measured according to JIS Z0237 is 0.1 N/25 mm to 10 N/25 mm. 如申請專利範圍第1項所述之半導體晶圓表面保護用膜,其中上述基材層(A)配置於最表面。 The film for semiconductor wafer surface protection according to claim 1, wherein the base material layer (A) is disposed on the outermost surface. 如申請專利範圍第4項所述之半導體晶圓表面保護用膜,其中上述黏著層(C)隔著上述軟化層(B)而配置於與上述基材層(A)的相反側的最表面。 The film for semiconductor wafer surface protection according to claim 4, wherein the adhesive layer (C) is disposed on the outermost surface opposite to the base material layer (A) via the softened layer (B). . 如申請專利範圍第1項所述之半導體晶圓表面保護用膜,其中上述軟化層(B)包含:烴烯烴的均聚物、烴烯烴的共聚物、或這些的混合物。 The film for semiconductor wafer surface protection according to claim 1, wherein the softening layer (B) comprises a homopolymer of a hydrocarbon olefin, a copolymer of a hydrocarbon olefin, or a mixture thereof. 如申請專利範圍第1項所述之半導體晶圓表面保護用膜,其中構成上述軟化層(B)的樹脂的密度為880 kg/m3~960 kg/m3The film for semiconductor wafer surface protection according to claim 1, wherein the resin constituting the softened layer (B) has a density of 880 kg/m 3 to 960 kg/m 3 . 如申請專利範圍第1項所述之半導體晶圓表面保護用膜,其中上述基材層(A)是聚烯烴層、聚酯層、或聚烯烴層與聚酯層的積層體。 The film for semiconductor wafer surface protection according to claim 1, wherein the substrate layer (A) is a polyolefin layer, a polyester layer, or a laminate of a polyolefin layer and a polyester layer. 一種半導體裝置的製造方法,包括:在半導體晶圓表面保護用膜上,以上述半導體晶圓的電路形成面與上述半導體晶圓表面保護用膜接觸的方式配置半導體晶圓的步驟;在上述半導體晶圓的外周,形成保持上述半導體晶圓的上述半導體晶圓表面保護用膜的隆起部的步驟;研磨藉由上述隆起部所保持的上述半導體晶圓的電路非形成面的步驟;自上述半導體晶圓的電路形成面剝離上述半導體晶圓表面保護用膜的步驟;上述隆起部在100℃下的儲存彈性模數G(100)為1 MPa以上。 A method of manufacturing a semiconductor device, comprising: a step of disposing a semiconductor wafer on a surface of a semiconductor wafer surface protection film in such a manner that a circuit formation surface of the semiconductor wafer is in contact with the semiconductor wafer surface protection film; a step of forming a raised portion of the semiconductor wafer surface protective film for holding the semiconductor wafer on the outer periphery of the wafer; and a step of polishing a circuit non-formed surface of the semiconductor wafer held by the raised portion; The step of peeling off the semiconductor wafer surface protective film on the circuit forming surface of the wafer; the storage elastic modulus G (100) of the raised portion at 100 ° C is 1 MPa or more. 如申請專利範圍第10項所述之半導體裝置的製造方法,其中上述半導體晶圓表面保護用膜是如申請專利範圍第1項所述之半導體晶圓表面保護用膜,且 以120℃~180℃的溫度、1 MPa~10 MPa的壓力熱壓接上述半導體晶圓表面保護用膜與上述半導體晶圓而形成上述隆起部。 The method for producing a semiconductor device according to claim 10, wherein the film for protecting a surface of the semiconductor wafer is the film for surface protection of a semiconductor wafer according to the first aspect of the invention, and The semiconductor wafer surface protective film and the semiconductor wafer are thermocompression-bonded at a temperature of 120 ° C to 180 ° C and a pressure of 1 MPa to 10 MPa to form the raised portion. 一種半導體裝置的製造方法,其是如申請專利範圍第11項所述之半導體裝置的製造方法,且在上述半導體晶圓表面保護用膜上以上述半導體晶圓的電路形成面與上述半導體晶圓表面保護用膜接觸的方式配置上述半導體晶圓的步驟中的膜的溫度TM、與形成上述半導體晶圓表面保護用膜的隆起部的步驟中的熱壓接溫度TP、以及上述軟化層(B)的軟化點溫度TmB,滿足以下通式的關係:[式1]TP≦TM [式2]TmB<TP<TmB+40℃。 A method of manufacturing a semiconductor device according to claim 11, wherein the semiconductor wafer surface protection film has a circuit formation surface of the semiconductor wafer and the semiconductor wafer The temperature TM of the film in the step of arranging the semiconductor wafer, the thermocompression bonding temperature TP in the step of forming the ridge portion of the semiconductor wafer surface protective film, and the softening layer (B) The softening point temperature TmB satisfies the relationship of the following formula: [Formula 1] TP≦TM [Formula 2] TmB<TP<TmB+40°C. 如申請專利範圍第11項所述之半導體裝置的製造方法,其中上述半導體晶圓表面保護用膜的軟化層(B),以較基材層(A)而成為上述半導體晶圓的電路形成面側的方式,將上述半導體晶圓配置於上述半導體晶圓表面保護用膜上。 The method of manufacturing a semiconductor device according to claim 11, wherein the softened layer (B) of the semiconductor wafer surface protective film is a circuit forming surface of the semiconductor wafer with respect to the base material layer (A) In a side view, the semiconductor wafer is placed on the semiconductor wafer surface protective film. 如申請專利範圍第10項所述之半導體裝置的製造方法,其中上述半導體晶圓包含莫氏硬度為8以上的高硬度材料基板。 The method of manufacturing a semiconductor device according to claim 10, wherein the semiconductor wafer comprises a high hardness material substrate having a Mohs hardness of 8 or more. 一種半導體晶圓壓製裝置,其藉由具有加熱機構的上壓製板、與上壓製板相對的下壓製板夾住安裝框壓製而成,上述安裝框包含半導體晶圓、具有包圍上述半導體晶圓的框的環框A、遍及上述半導體晶圓的電路形成面與上述框A而貼附的如申請專利範圍第1項所述之半導體晶圓表面保護膜;且上述半導體晶圓的外直徑DW、與上述環框A的內直徑DAIN滿足式(1)DW<DAIN的關係;上述下壓製板在與上述上壓製板相對的面具有凸部;上述壓製時的上述凸部與上述安裝框的接觸面的外周為圓形。 A semiconductor wafer pressing device is formed by pressing an upper pressing plate having a heating mechanism and a lower pressing plate opposite to the upper pressing plate, wherein the mounting frame comprises a semiconductor wafer and has a semiconductor wafer surrounding the semiconductor wafer. a ring frame A of the frame, a semiconductor wafer surface protection film according to claim 1 attached to the circuit forming surface of the semiconductor wafer and the frame A; and an outer diameter DW of the semiconductor wafer The inner diameter DA IN of the ring frame A satisfies the relationship of the formula (1) DW < DA IN ; the lower pressing plate has a convex portion on a surface opposite to the upper pressing plate; the convex portion and the above-mentioned mounting frame at the time of pressing The outer circumference of the contact surface is circular. 如申請專利範圍第15項所述之半導體晶圓壓製裝置,其中上述凸部的高度為1 μm~100 μm。 The semiconductor wafer pressing apparatus according to claim 15, wherein the height of the convex portion is 1 μm to 100 μm. 如申請專利範圍第15項所述之半導體晶圓壓製裝置,其中上述凸部的高度相對於半導體晶圓表面保護膜的軟化層(B)的厚度而為15%~100%的範圍內。 The semiconductor wafer pressing apparatus according to claim 15, wherein the height of the convex portion is in a range of 15% to 100% with respect to a thickness of the softened layer (B) of the semiconductor wafer surface protective film. 如申請專利範圍第15項所述之半導體晶圓壓製裝置,其中上述凸部的直徑CD滿足DW<CD<DAIN的關係。 The semiconductor wafer pressing apparatus according to claim 15, wherein the diameter CD of the convex portion satisfies the relationship of DW < CD < DA IN . 一種半導體晶圓安裝裝置,其用於製作安裝框,該安裝框包含半導體晶圓、包圍上述半導體晶圓的環狀輔助構件B、包圍上述半導體晶圓與上述環狀輔助構件B的環框A、遍及上述半導體晶圓的電路形成面與上述環狀輔助構件B以及上述環框A而貼附的如申請專利範圍第1項所述之半導體晶圓表面保護膜;且 上述半導體晶圓的外直徑DW、上述環框A的內直徑DAIN、上述環狀輔助構件B的環外直徑DBOUT、以及上述環狀輔助構件B的環內直徑DBIN,滿足式(1)DW<DBIN<DBOUT<DAIN的關係;上述半導體晶圓安裝裝置包括:對上述半導體晶圓的電路形成面的相反面進行加熱的加熱單元、遍及上述半導體晶圓的電路形成面、上述環框A、以及上述環狀輔助構件B而轉動,以貼附上述半導體晶圓表面保護膜的貼附輥、以及沿著上述環框A的外形狀切割上述表面保護膜的膠帶切割機構。 A semiconductor wafer mounting device for fabricating a mounting frame including a semiconductor wafer, an annular auxiliary member B surrounding the semiconductor wafer, and a ring frame A surrounding the semiconductor wafer and the annular auxiliary member B a semiconductor wafer surface protection film according to claim 1, wherein the semiconductor wafer surface protection film is attached to the circuit forming surface of the semiconductor wafer, the annular auxiliary member B, and the ring frame A; and the semiconductor wafer is external to the semiconductor wafer The diameter DW, the inner diameter DA IN of the ring frame A, the outer diameter DB OUT of the annular auxiliary member B, and the inner diameter DB IN of the annular auxiliary member B satisfy the formula (1) DW < DB IN < a relationship of DB OUT <DA IN ; the semiconductor wafer mounting apparatus includes: a heating unit that heats an opposite surface of the circuit formation surface of the semiconductor wafer; a circuit formation surface that extends over the semiconductor wafer; the ring frame A; The ring-shaped auxiliary member B is rotated to attach the semiconductor wafer surface protective film, and the tape cutting mechanism for cutting the surface protective film along the outer shape of the ring frame A 如申請專利範圍第19項所述之半導體晶圓安裝裝置,其中下述式所示的△D1與△D2的任意者均為DW的1%以內:△D1=DBIN-DW………(2) △D2=DAIN-DBOUT………(3)。 The semiconductor wafer mounting device according to claim 19, wherein any one of ΔD1 and ΔD2 represented by the following formula is within 1% of DW: ΔD1=DB IN -DW......... 2) △ D2 = DA IN - DB OUT ... (3).
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