TW201312633A - 用於防治半導體層中的缺陷之方法 - Google Patents
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Abstract
本發明係關於防治與將原子物質植入轉移至受體基板(2)上之半導體層(10)中相關的缺陷之方法，該半導體層(10)藉由導熱性低於該轉移半導體層(10)之該導熱性的層(3、3')而與該受體基板(2)熱絕緣，該方法之特徵在於其包含向該半導體層(10)施加選擇性電磁輻照，該電磁輻照經實施以便將該半導體層(10)加熱至低於該層(10)之融合溫度之溫度，而不致使該受體基板(2)之溫度增加超過500℃。
Description
本發明係關於防治半導體層中的缺陷之方法。
Smart CutTM方法廣泛用於製造半導體結構之方法中，用於將層自稱作供體之基板轉移至稱作受體之基板。
一般而言，此方法包含將離子物質植入供體基板中之步驟。
供體基板中之植入輪廓屬於高斯(Gaussian)類型，在對應於在某一深度下具有最多植入物質之平面的平面中具有峰，從而在供體基板中形成脆化區。
欲轉移之層定界於供體基板之實施植入之表面與脆化區之間。
Smart CutTM方法隨後包含組裝供體基板與受體基板以使欲轉移之層接觸受體基板之步驟。
隨後，以使供體基板沿脆化區破裂之方式施加機械、熱或其他力。
分離可再循環之供體基板之剩餘部分與包含受體基板及轉移層之最終半導體結構。
然而，在轉移後，缺陷存於轉移層中，該等缺陷與植入相關且與已在供體基板中實施以形成脆化區之破裂相關。
該等缺陷通常可包含轉移層之晶格中的缺陷、以及植入物質之殘餘物等。
該等缺陷能夠改變轉移層中或其上形成之電子裝置的操
作。
為防治該等缺陷，對半導體結構應用已知解決方案，由此在高溫下形成熱處理。
就此而言，可參照文件US 6,403,450，其闡述防治破裂後缺陷之方法，該方法包含氧化轉移層之表面，之後於約1100℃之溫度下進行熱處理。
然而，存在不可在該高溫下施加熱處理之情況。
在受體基板係先前已經處理以便包含電子裝置、互連件、金屬化區等之基板時，明顯係此種情況，此可藉由施加高溫(換言之大於約500℃)下之熱處理來改變。
在轉移層本身不可暴露於高溫時，例如在此層包含若暴露於超過800℃之溫度將受損(由於形成接面之層中之摻雜劑擴散)之PN接面時，亦係此種情形。
文件US 2005/0280155揭示將包含PN接面之半導體層轉移至包含電子裝置之受體基板及包含金屬化部分之互連件區上的方法之一個實例，其中可藉由Smart CutTM方法實施半導體層之轉移。
因此，該受體基板不能暴露於高溫。
然而，施加較低溫度(換言之低於約500℃)之溫度下之熱處理、或施加不實施任何熱處理以便避免損害受體基板之控制處理步驟(拋光等)可不足以防治轉移層中之所有缺陷。
此不足或不完整缺陷防治會損害稍後在轉移層中或其上形成之裝置的操作。
具體而言，由於植入明顯具有使某些類型之摻雜劑去活化的效應，故其含有之PN接面具有不再操作的風險。
本發明之目的係克服該等問題且更具體而言提供防治因植入轉移層中而出現之缺陷的方法，無論該受體基板中存在何種裝置或功能，該方法均無損害受體基板之風險。
根據本發明，提供防治與將原子物質植入轉移至受體基板上之半導體層中相關的缺陷之方法，半導體層藉由導熱性低於轉移半導體層之導熱性的層而與受體基板熱絕緣，該方法之特徵在於其包含向半導體層施加選擇性電磁輻照，該電磁輻照經實施以便將該半導體層加熱至低於該層之融合溫度之溫度，而不致使受體基板之溫度增加超過500℃。
以尤佳方式選擇該選擇性電磁輻照之波長，以使僅轉移半導體層吸收該輻照。
根據本發明之一個較佳實施例，該電磁輻照係脈衝雷射輻照，該脈衝之能量密度及持續時間經選擇以便將半導體層加熱至低於該層之融合溫度之溫度以防治缺陷，而不致使受體基板之溫度增加超過500℃。
根據一個特定實施例，轉移半導體層係由矽製得且輻照之波長比360 nm短。
在此情形下，較佳選擇脈衝之能量及持續時間以將該轉移層升高至介於800℃與1300℃之間之範圍內的溫度。
此外，受體基板可有利地包含至少一個電子裝置及/或
一個功能化區及/或一個金屬化區。
根據本發明之一個尤為有利之實施例，轉移層係包含電功能部分之矽層。因此，本發明之防治方法可使該轉移層之電功能(其可因植入而受損)重新活化。
較佳地，導熱性低於轉移半導體層之導熱性的層之厚度在介於10 nm與10000 nm之間之範圍內。
本發明亦係關於製造包含受體基板及半導體層之半導體結構的方法，該方法包含：-將原子物質植入供體基板中，以便產生定界欲轉移之半導體層的脆化區，-在供體基板及/或受體基板上形成導熱性低於半導體層之導熱性的層，-將供體基板黏合至受體基板上，導熱性低於半導體層之導熱性的該層使受體基板與半導體層熱絕緣，-使供體基板沿脆化區破裂，以便將半導體層轉移至受體基板上，-對轉移半導體層應用例如上述防治缺陷之方法，以防治與植入該層中相關之缺陷。
有利地，在破裂與防治缺陷步驟之間實施轉移半導體層表面之拋光。
根據一個特定實施例中，借助導熱性大於或等於半導體層之導熱性的黏合層將供體基板黏合至受體基板上。
舉例而言，該黏合層包含矽層及/或金屬層，以便在受體基板與轉移薄膜之間提供導電界面。
根據本發明之一個特定實施例中，導熱性低於半導體層之導熱性的層不連續。
本發明之另一目標係關於包含基板及半導體層之半導體結構，其中基板包含至少一個電子裝置及/或功能化區及/或金屬化區且因導熱性低於半導體層之導熱性的層而與半導體層熱絕緣，該結構之特徵在於半導體層包含P型供體濃度高於1017 cm-3之部分。該結構有利地係藉由根據本發明防治缺陷之方法獲得，該結構使得含於半導體層中之P型摻雜劑重新活化。
根據以下參照隨附圖式之詳細說明，本發明之其他特徵及優點將變得顯而易見。
應注意，在結構之圖式中，未必遵守各個層之間之厚度之比率以有利於其表示。
圖1A至1D圖解說明藉由自供體基板1轉移半導體層10製造在受體基板2上包含該層10的結構中的連續步驟。
參照圖1A，脆化區11係藉由將物質植入(由箭頭示意性表示)包含欲轉移之層11之供體基板1中來形成。
供體基板1可為主體基板或者複合基板，換言之由各種材料之層之堆疊構成。
欲轉移之層11係半導體材料(例如矽、鍺、SiGe、III-V二元、三元、四元或甚至更高元合金)之單晶層。
其亦可由該等層之堆疊構成。
舉例而言，轉移層可為包含PN接面之矽層。
植入物質通常係輕原子，例如較佳氫或氦。可植入單一物質(例如，僅氫)，然而，另一選擇為，同時或連續共植入兩種物質(例如，氫+氦)可較佳。
植入供體基板中之物質係根據通常具有高斯形狀之植入輪廓分佈；脆化區11位於植入峰處。
彼等熟習此項技術者熟悉端視供體基板1之材料及欲植入之物質在給定深度(對應於欲轉移之層10之厚度)下形成脆化區11的植入劑量及能量。
在第二步驟(圖1B)中，將脆化供體基板1黏合至受體基板2上。
在此處提供之圖中，受體基板2展示具有功能化區20，其可包含金屬化區、互連件或傳導連接。
出於此原因，受體基板2必須不經受高溫以避免對該等功能之任何損害。
或者，根據最終半導體結構之應用，基板2可為由一或多種材料、半導體或其他物質製得之主體或複合基板。
將熱絕緣層3(換言之，其導熱性低於轉移半導體層10之導熱性)插在該轉移層10與受體基板2之間。
該層3使得受體基板與轉移層熱隔離，以使在將轉移層加熱至低於其融合溫度之高溫時，受體基板中之溫度增加仍低於500℃。
此外，該層3使得加熱轉移層10所需之能量最小化，此乃因此加熱限制於相對較薄之轉移層。
為滿足該等功能，該熱絕緣層3之厚度範圍有利地介於
10 nm與10000 nm之間，較佳介於50 nm與1000 nm之間。
該層3有利地係由氧化物(例如SiO2)構成。
然而，可利用導熱性低於半導體層10之材料之導熱性的任何其他材料，例如SiO2、Al2O3、SiN、HfO2、TiO2等。
層3可均勻(自單一材料或自層之堆疊形成)或不均勻，換言之自互補圖案形成，該等圖案中之每一者皆係自熱絕緣材料形成。
該層3可連續，換言之在受體基板或轉移層之整個表面上擴展。
或者(未展示)，該層可不連續，換言之僅在受體基板或轉移層表面之某些區域上自絕緣材料形成，具體而言面向必須維持於低於500℃之溫度下之受體基板的區域。
根據一個特定實施例，該層3亦構成在供體基板1與受體基板2之間形成之黏合層。
具體而言，該黏合層可使兩個基板之間之黏合能量增加。
因此，舉例而言，若供體基板及受體基板係由矽製得，則黏合層可為SiO2層。
該層可在黏合至一個基板上之前形成，或者由在兩個基板中之每一者上形成之兩個氧化物層之總成構成。
或者(未展示)，與熱絕緣層分離之黏合層可在供體基板及/或受體基板上形成。
舉例而言，黏合層可包含矽層。
根據本發明之另一實施例，尤其期望在轉移半導體層與
受體基板之間形成傳導連接時，黏合層可包含金屬層。
此外，黏合層可連續(換言之，覆蓋基板(供體及受體)之整個表面)或者不連續，換言之僅覆蓋該基板表面之一部分，隨後根據給定圖案佈置該黏合層。
在黏合層並非熱絕緣，換言之其導熱性大於或等於轉移層10之導熱性時(對於金屬層或矽層而言，情形通常係如此)，在黏合之前，在黏合層上或其下形成熱絕緣層3。
在黏合層之融合溫度低於轉移半導體層之融合溫度時(對於金屬層而言可為此種情形)，較佳將熱絕緣層放置在轉移半導體層與黏合層之間，以該方式避免在轉移層之加熱期間黏合層之溫度顯著增加。
或者(未展示)，可不利用黏合層而將供體基板黏合至受體基板上，熱絕緣層(連續或不連續)位於界面處。
較佳地，藉由分子黏附實施黏合。
熱絕緣層及(若適用)黏合層可藉由任何適宜方法形成，例如藉由沈積技術，例如化學氣相沈積或CVD、物理氣相沈積或PVD，或原子層沈積或ALD。
視情況，可在黏合步驟(不管其是否涉及使用黏合層)之前進行經設計以增加黏合能量之供體基板及/或受體基板表面上的處理或加工步驟。
該等加工或處理步驟可尤其包含清潔、化學蝕刻、拋光、電漿活化等操作。
可在黏合之後進行經設計以加強黏合之熱處理。
假定受體基板2不可耐受高溫，此熱處理將在中等溫度
(例如小於或等於500℃)下實施。
隨後，沿脆化區11引起供體基板1破裂，且在與供體基板之剩餘部分分離後，獲得圖1C中圖解說明之包含供體基板2、潛在地包含黏合層3及轉移半導體層10之結構。
由於在破裂後轉移層10之表面12呈現特定粗糙度，故可有利地例如藉由化學-機械拋光(CMP)製程對其進行拋光，以減小其粗糙度。
參照圖1D，施加熱處理，其局部化至轉移層10，換言之其不導致結構之剩餘部分顯著加熱。
該熱處理之目的係防治轉移層10中與植入相關之缺陷，而不引起該轉移層10熔融。
舉例而言，在轉移層係包含一或多個p-n接面之矽層時，植入之效應係將使用於形成該接面之摻雜劑電性去活化。
應注意，已知氫之植入會導致矽層之n型摻雜。
具體而言，若層之初始摻雜係p型摻雜或若層包含具有p型摻雜之部分，則該摻雜可使層之電性能降格，在接面中可為此種情形。
由於根據本發明之處理，與植入及破裂相關之缺陷之防治可使摻雜劑重新活化。
與導致加熱整個半導體結構之先前技術之熱處理相比，本發明提供轉移層之局部熱處理，從而避免加熱受體基板、或以足夠減輕方式最低限度加熱該受體基板，以便不改變其所包含之裝置或功能(若相關，若黏合層對溫度敏
感，則此亦適於黏合層)。
出於此目的，本發明之解決方案係藉由脈衝對轉移層施加電磁輻照。
下文詳細提供此輻照之參數。
波長
輻照之波長經選擇以使輻射完全或實質上完全被轉移層10吸收。
此使得由輻照引起之加熱局部化於轉移層10處且使得受體基板2之溫度保持低於超過會改變其所包含之裝置或功能之溫度。
如先前所述，在黏合層之融合溫度低於轉移半導體層之融合溫度時(對於金屬層而言，可為此種情形)，較佳以將黏合層升高至顯著低於其融合溫度之溫度的方式將熱絕緣層放置在轉移半導體層與黏合層之間。
此外，轉移層吸收之輻射應產生保持低於轉移層之融合溫度之該層的溫度。
實際上，在此處理期間，此解決方案試圖避免熔融轉移層，以便在該層中無產生結晶缺陷的風險，該風險可能係由於融合-重結晶之機制。該等缺陷將可能損害轉移層之電性能。
圖2圖解說明隨波長λ變化之矽中之吸收係數α的曲線。
自此曲線可推斷出，為避免輻射透射至受體基板，雷射之波長應比360 nm短。此乃因超過360 nm，吸收係數會減
小，此意味著輻射通過轉移層到達下伏層並使其加熱。
脈衝之持續時間
選擇脈衝之持續時間在一方面足夠長以提供足以防治由於植入轉移層10中而出現之缺陷的能量，且另一方面足夠短以便不使受體基板2之溫度產生顯著增加。
另外，選擇兩個脈衝之間之時間間隔長於使熱在矽中擴散所需之時間。
舉例而言，若受體基板包含金屬化區，則溫度增加不能超過金屬之融合溫度。
通常，對於具有微米級厚度之轉移層10而言，脈衝之持續時間的數量級係約10奈秒。
舉例而言，目前市場上之雷射提供介於10 ns與200 ns之間之範圍內的脈衝持續時間。
功率
由雷射遞送之功率必須在理論上足以使得在每一脈衝期間加熱轉移層。
實際上，可聚焦雷射束，以使所遞送之每單位表面積之能量達到所需等級。
此聚焦技術之唯一限制係焦斑之大小，若其極小，則其對該方法之效率具有負面效應。
熱絕緣層3(不管連續或不連續)之一個明顯優點在於其使得由雷射提供之能量僅限制於厚度相對於結構之總厚度較小的轉移層10。
此使得可使用具有中等功率之雷射，其在任一方面利用
市場上目前存在之工業裝置可容易存取。
舉例而言，圖3中圖解說明之絕緣體上之矽(SOI)結構係藉由Smart CutTM方法製造，該結構連續包含由厚度為幾百微米之主體矽製得之受體基板2'、厚度為145 nm之二氧化矽(稱作BOX，術語「埋置氧化物」之縮寫)之熱絕緣黏合層3'及厚度為之0.8 μm之單晶矽之轉移層10。用於製造此結構SOI之條件係用122 keV之能量及8×1016 at/cm2之劑量之氫植入。
破裂後，與植入及破裂相關之缺陷損害矽之轉移層10。
藉由施加化學-機械拋光(CMP)消除該等缺陷之大部分，但殘餘缺陷使矽之結晶度降格且對隨後欲在轉移層中或其上形成之電子裝置的性能有害。
將雷射之輻照施加至兩個相同半導體結構。
第一處理步驟係用由JPSA公司銷售之雷射輻照，波長為193 nm且脈衝持續時間為20 ns FWHM(半高全寬)。
第二處理係用由Excico公司銷售之雷射輻照，波長為308 nm且脈衝持續時間為160 ns FWHM。
為將半導體結構之表面部分加熱(換言之，局部化於轉移層10處)至低於矽之融合溫度之溫度，雷射之每單位表面積之能量針對第一雷射及第二雷射分別限於0.16 J/cm2及0.7 J/cm2。
可建立由多層中之瞬時傳導之熱方程之解析組成且慮及脈衝雷射之瞬時性質的模擬。
該等模擬之結果提供於圖4A及4B中，其展示不同時間時半導體結構之層10、3'、2'中之每一者的溫度輪廓。
橫座標軸展示結構中之深度，起點對應於轉移半導體層10之自由表面12。
圖4A展示在第一處理之情形下之半導體結構中之溫度輪廓；曲線(c1)至(c5)展示每5 ns之溫度增加，直至雷射脈衝結束為止。
圖4B展示在第二處理之情形下之半導體結構中之溫度輪廓；曲線(c1)至(c20)展示每10 ns之溫度增加，直至雷射脈衝結束為止。
在兩種情形下，可觀察到，即使在該等相對較低功率等級下，加熱亦限制於轉移半導體層10且可在數個脈衝中達到接近但低於矽之融合溫度的溫度，其適於防治與植入相關之缺陷。
另一方面，即使隨時間加熱受體基板2'，但此加熱不超過200℃。
該等相同模擬亦使得可在圖3中圖解說明之結構中觀察到一個脈衝期間之各個層表面之溫度隨時間的變化。
圖5A及5B分別展示在第一處理及第二處理情形下轉移層10表面處(曲線(a))及熱絕緣層3'與受體基板2'之間之界面處(曲線(b))的溫度變化。
在兩種情形下，經驗證，受體基板2'表面之溫度從不超過500℃。在第一情形下，此溫度甚至不超過200℃。
對於一給定對之厚度之轉移層及黏合層而言，可在模擬
中調節獲得低於層10之融合溫度的空氣與轉移層10之間之界面處之溫度所需的功率密度。
藉由掃描多個厚度之轉移層及黏合層，獲得圖6中圖解說明之製圖。
圖6展示在第一處理(JPSA雷射)情形下隨轉移層10之厚度eSOI(在橫座標上)及熱絕緣層3'之厚度eBOX(在縱座標上)變化的雷射之功率密度的製圖。
界定處理之參數以使將空氣與轉移層10之間之界面加熱至極接近該層之材料之融合溫度但低於此溫度之溫度，而熱絕緣層3'與受體基板2'之間之界面保持於低於400℃之溫度下。
製圖之下方陰影部分係處理導致熱絕緣層3'與受體基板2'之間之界面之溫度增加大於400℃的區。
此圖在受體基板2'相對於轉移層之熱絕緣方面強調SiO2層3'之效率。
此圖亦展示，在轉移層10之厚度(5 nm至200 nm)及熱絕緣層3'之厚度(大於50 nm)的某些組態中，相對中等功率密度(約0.4.1011 W/cm2)使得可在層10表面上達到相對較高溫度，而在受體基板中不超過400℃。
在製圖之上方部分上，可看到各個區，其對應於所需功率密度之不同值，其在介於0.4.1011 W/cm2與1.8.1011 W/cm2之間之範圍內且其可(例如)由不同顏色表示。
一般而言，熱絕緣層3、3'之厚度愈大，則必須由雷射提供以供將轉移層表面加熱至所需溫度的能量就愈低。
若熱絕緣層過薄，則不可將轉移層表面升高至低於矽之融合溫度之高溫，同時維持該層與受體基板之界面於低於500℃之溫度下。
最後，在轉移層極薄(奈米級)時，光學長度較小，其需要較高功率束以達到用於防治缺陷之低於矽之融合溫度的溫度。
可藉由各種技術觀察藉由雷射處理之缺陷之防治。
具體而言，Raman光譜使得可借助半高下之峰寬(FWHM)表徵轉移層之結晶度。
圖7圖解說明隨雷射之能量密度F變化之轉移層10之矽之結晶度的改良，縱座標軸係Raman UV光譜之半高下之峰寬W(cm-1)。
曲線(a)對應於施加至圖3中之半導體結構的第一雷射處理，其中經由欲轉移之層植入H+離子。
曲線(b)對應於施加至圖3中之半導體結構的第二雷射處理，其中經由欲轉移之層植入H+離子。
曲線(c)對應於施加至圖3中之半導體結構的第二雷射處理，其中經由欲轉移之層實施He/H+之共植入。
觀察到，在雷射之能量密度增加時，結晶品質增加(即，峰寬度減小)。
因此，對於高能量密度而言，在轉移層中，獲得類似於主體矽(由點Si表示之參照材料)及經歷高於1000℃之溫度下之熱處理的SOI中之矽層之結晶品質的結晶品質。
圖8圖解說明摻雜劑之活化之恢復，在該情形下其中轉
移層係包含PN接面之矽層。
在此圖中，縱座標軸對應於轉移層中之摻雜n(以表示cm-3)之程度。正方形對應於P摻雜，三角形對應於N摻雜。
橫座標對應於藉由雷射輻照之連續植入、破裂及缺陷防治步驟。
在植入(步驟1)之前，N摻雜係於約5.1017 cm-3下，而P摻雜係約8.1019 cm-3。
植入(不管此植入為H+離子之植入(步驟2)或He/H+離子之共植入(步驟2'))具有使摻雜劑去活化之效應，此使得摻雜n之程度顯著降低。
亦在破裂(對應於在H+植入之後之破裂的步驟3或對應於在H+/He共植入之後之破裂的步驟3')之後及在拋光(對應於經歷H+植入之轉移層之拋光的步驟4或對應於經歷H+/He共植入之轉移層之拋光的步驟4')之後觀察此去活化。
雷射處理具有使摻雜劑恢復之效應。
因此，步驟5在於對經歷H+植入之轉移層施加能量密度為0.65 J/cm2之雷射處理。
步驟5'係關於施加至經歷H+/He共植入之轉移層的相同雷射處理。
因此，本發明可獲得如下結構：其中轉移半導體層包含P型供體濃度大於1017 cm-3之一部分，在不可將受體基板暴露於高於500℃之溫度時，其可不利用先前技術之方法獲得。
最後，不言而喻，剛提供之實例僅係特定圖解說明且關於本發明申請案之領域、尤其關於所處理半導體結構之性質及材料絕不加以限制。
具體而言，本發明有利地適於藉由Smart CutTM方法製造之半導體結構，其中受體基板必須不暴露於過高之溫度。
然而，本發明亦適於受體基板不經受該等限制之結構；例如，「習用」SOI結構，其中受體基板係(例如)主體矽基板。
1‧‧‧供體基板
2‧‧‧受體基板
2'‧‧‧受體基板
3‧‧‧熱絕緣層/黏合層
3'‧‧‧熱絕緣層/黏合層
10‧‧‧轉移半導體層
11‧‧‧脆化區
12‧‧‧表面
20‧‧‧功能化區
圖1A至1D示意性圖解說明藉由Smart CutTM方法將半導體層轉移至功能化受體基板上之各個步驟；圖2展示隨輻射波長變化之矽中之吸收係數的曲線；圖3圖解說明藉由Smart CutTM方法獲得之絕緣體上之半導體型的結構；圖4A及4B分別展示隨著脈衝之進程利用JPSA雷射及Excico雷射之圖3中之結構中的溫度輪廓；圖5A及5B分別展示利用JPSA雷射及Excico雷射之針對圖3中之結構的轉移半導體層(曲線(a))及受體基板(曲線(b))表面處溫度隨時間的變化；圖6圖解說明隨轉移層之厚度及黏合層之厚度變化之雷射之功率密度的製圖；圖7展示針對藉由雷射或以其他方式處理之各種結構之隨雷射之能量密度變化的Raman峰之寬度的變化；及圖8圖解說明轉移半導體層的摻雜劑濃度經由方法之各
個步驟之變化。
2‧‧‧受體基板
3‧‧‧熱絕緣層/黏合層
10‧‧‧轉移半導體層
Claims (14)
- 一種防治與將原子物質植入轉移至受體基板(2)上之半導體層(10)中相關的缺陷之方法，該半導體層(10)藉由導熱性低於該轉移半導體層(10)之該導熱性的層(3、3')而與該受體基板(2)熱絕緣，該方法之特徵在於其包含向該半導體層(10)施加選擇性電磁輻照，該電磁輻照經實施以便將該半導體層(10)加熱至低於該層(10)之融合溫度之溫度，而不致使該受體基板(2)之溫度增加超過500℃。
- 如請求項1之方法，其中該選擇性電磁輻照之波長經選擇以使僅該轉移半導體層(10)吸收該輻照。
- 如請求項2之方法，其中該電磁輻照係脈衝雷射輻照，該等脈衝之能量密度及持續時間經選擇以便將該半導體層(10)加熱至低於該層(10)之該融合溫度之溫度，而不致使該受體基板(2)之該溫度增加超過500℃。
- 如請求項3之方法，其中該轉移半導體層(10)係由矽製得且其中該輻照之該波長比360 nm短。
- 如請求項4之方法，其中該等脈衝之該能量及該持續時間經選擇以便將該轉移層(10)升高至介於800℃與1300℃之間之範圍內之溫度。
- 如請求項1至5中任一項之方法，其中該受體基板(2)包含至少一個電子裝置及/或一個功能化區及/或一個金屬化區。
- 如請求項1至5中任一項之方法，其中該轉移層(10)係包 含電功能部分之矽層。
- 如請求項1至5中任一項之方法，其中導熱性低於該轉移半導體層(10)之該導熱性的該層(3、3')具有介於10 nm與10000 nm之間之範圍內之厚度。
- 一種製造包含受體基板(2)及半導體層(10)之半導體結構的方法，該方法包含：將原子物質植入供體基板(1)中，以便產生定界該欲轉移之半導體層(10)的脆化區(11)，在該供體基板(1)及/或該受體基板(2)上形成導熱性低於該半導體層(10)之該導熱性的層(3、3')，將該供體基板(1)黏合至該受體基板(2)上，導熱性低於該半導體層(10)之該導熱性的該層(3、3')使該受體基板(2)與該半導體層(10)熱絕緣，使該供體基板(1)沿該脆化區(11)破裂，以便將該半導體層(10)轉移至該受體基板(2)上，對該轉移半導體層(10)應用如請求項1至8中任一項之方法，以防治與該植入該層(10)中相關之缺陷。
- 如請求項9之方法，其中在破裂與防治缺陷步驟之間，實施該轉移半導體層(10)之表面(12)的拋光。
- 如請求項9或10中任一項之方法，其中借助導熱性大於或等於該半導體層(10)之該導熱性的黏合層將該供體基板(1)黏合至該受體基板(2)上。
- 如請求項11之方法，其中該黏合層包含矽層及/或金屬層。
- 如請求項9或10之方法，其中導熱性低於該半導體層(10)之該導熱性的該層(3、3')不連續。
- 一種半導體結構，其包含基板(2)及半導體層(10)，其中該基板(2)包含至少一個電子裝置及/或一個功能化區及/或一個金屬化區且藉由導熱性低於該半導體層(10)之該導熱性的層(3、3')而與該半導體層(10)熱絕緣，該結構之特徵在於該半導體層(10)包含P型供體濃度高於1017 cm-3之部分。
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| US6008078A (en) * | 1990-07-24 | 1999-12-28 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing a semiconductor device |
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| SG178765A1 (en) * | 2009-01-21 | 2012-03-29 | Semiconductor Energy Lab | Method for manufacturing soi substrate and semiconductor device |
| US8362482B2 (en) * | 2009-04-14 | 2013-01-29 | Monolithic 3D Inc. | Semiconductor device and structure |
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