TW201305396A - 具有覆蓋層之填充銅開口 - Google Patents
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Abstract
本發明係關於基板中之用銅沈積物填充之開口。熱退火方法導致該銅沈積物不可逆膨脹,且因此導致該銅沈積物中形成空洞及該基板之表面與主動或被動上覆結構之間形成裂紋。本發明提供在熱退火期間或之後抑制銅之不可逆膨脹之覆蓋層。
Description
本發明係關於用於基板中之填充銅開口之覆蓋層。
由選自矽、玻璃及陶瓷之基板材料製成之電子裝置包括用銅填充之開口。
矽基板中形成之開口在本文中以穿矽導通孔(TSV)表示。
玻璃基板中形成之開口在本文中以穿玻璃導通孔(TGV)表示。
陶瓷基板中形成之開口在本文中以穿陶瓷導通孔(TCV)表示。
開口之表面經活化以用於電鍍銅。典型活化程序包括藉助貴金屬離子活化隨後還原,或藉由貴金屬之膠狀粒子之沈積。用於該目的之最常見貴金屬係鈀。
另一常見方法係藉由PVD或CVD或ALD沈積由銅組成之晶種層。
然後藉由電鍍用銅填充開口。用於填充該等開口之鍍銅浴液組合物及方法揭示於(例如)US 6,800,188 B2及US 2010/0041226 A1中。填充導通孔後,開口在基板之一側上或兩側上具有銅表面,此取決於用於所施加電子裝置之總體製造製程。
為獲得填充銅開口,將一定量之銅沈積於基板之頂部上。藉由(例如)包含化學機械拋光(CMP)、濕式化學蝕
刻、乾式蝕刻或上述之組合在內之方法中之一者移除此過鍍之銅(圖1a、2a及3a)。CMP製程揭示於(例如)「Chemical Mechanical Planarization」,SIMTech Technical Report(PT/01/003/JT)中。用於銅蝕刻之濕式化學方法揭示於「Printed Circuits Handbook」,C.F.Coombs,Jr.(編輯),第5版,第33.4-33.18頁中。
在開口係TSV之情形下,在矽或玻璃基板表面之頂部上製造至少一種主動或被動上覆結構,例如重分佈層(RDL)堆積物或接觸區域。
RDL將接合墊自微晶片之外表面重新定位至微晶片內部之互連物。該RDL包括銅軌道及介電材料。
接觸區域在填充銅TSV之頂部上包括一或多個金屬層之可焊接及/或可接合表面,該等金屬層係選自銅、鎳、鈀、金、錫、銀及其合金。
使開口中之銅沈積物在100℃至450℃、較佳300℃至450℃範圍內之溫度下熱退火1-100分鐘,以釋放來自電鍍銅沈積物之應力。該熱退火製程步驟與電鍍銅沈積物中之銅原子沿銅沈積物之晶界至表面之不可逆擴散相關。
此效應稱作突起且包括銅原子至填充銅開口之一或兩側之擴散並同時導致該填充銅開口中形成空洞。此針對具有一個開放側之TSV顯示於圖1中。由於突起係不可逆過程,因此空洞在熱退火製程後並不封閉。
此外,在填充銅開口之情形下,基板之表面與主動或被動上覆結構之間出現裂紋。
此針對作為矽基板頂部上之上覆結構之RDL堆積物顯示於圖2中。
因此,本發明之目標係提供達成以下目的之方法:減少開口中之銅沈積物中形成空洞且避免在該銅沈積物之熱退火期間或之後基板之表面與主動或被動上覆結構之間形成裂紋。
該等目標係藉由在將沈積至填充銅開口內之銅平坦化後施加覆蓋層來解決,該覆蓋層係沈積於該開口之一或兩個開口之頂部上。
該覆蓋層在熱退火期間抑制銅原子不可逆擴散至開口之一或兩個開放側,且藉此減少銅沈積物中形成空洞。
此外,在熱退火期間或之後,在主動或被動上覆結構與經平坦化電鍍銅及/或基板之表面之間不形成裂紋。
提供在平坦化製程步驟後基板(3)中用銅沈積物(4)填充之開口(2)(圖3a、圖4a及圖5a)。清潔經平坦化銅沈積物(4)且將覆蓋層(1)沈積至經清潔銅表面上(圖3b、圖4b及圖5b)。當使基板經受熱退火步驟時,會抑制銅沈積物中形成空洞及銅沿導通孔之開放側方向擴散(圖3c)。
在本發明之一項實施例中,活化銅沈積物(4)之經平坦化及清潔之表面,然後藉由(例如)將基板浸泡於含有Pd2+離子之溶液(1)中無電沈積覆蓋層。
然後藉由氣相沈積方法(例如物理氣相沈積(PVD)、化學
氣相沈積(CVD)及原子層沈積(ALD))或藉由無電鍍敷沈積覆蓋層(1)。
沈積覆蓋層(1)之較佳沈積方法係無電鍍敷。
在藉由氣相沈積方法沈積覆蓋層(1)之情形下,沈積覆蓋層材料後需要蝕刻程序。可出於該目的施加濕式化學蝕刻與乾式蝕刻(例如藉由電漿蝕刻)二者或濕式化學蝕刻與乾式蝕刻之組合。
用於濕式化學蝕刻之適宜組合物包括H2O2或過氧化物鹽。
當藉由氣相沈積方法沈積覆蓋層材料時,該覆蓋層材料會覆蓋基板之整個表面且在整個基板表面上提供不可接受之電接觸,需要蝕刻程序。因此,必須移除在經平坦化銅沈積物之間沈積之所有經沈積覆蓋層材料。
在藉由無電鍍敷沈積覆蓋層(1)之情形下,無需蝕刻程序,此乃因覆蓋層材料係選擇性沈積至通孔(2)中之銅沈積物(4)上。
覆蓋層(1)材料係選自包括以下之群:Ta、Mo、W、Ti-W合金、Ta-W合金、Ti-N合金、Ta-N合金、W-N合金、Ni-B合金、Ni-P合金、Ni-M-P合金、Ni-M-B合金、Ni-M-P-B合金、Co-P合金、Co-B合金、Co-P-B合金、Co-M-P合金、Co-M-B合金及Co-M-P-B合金,其中M係選自由Mn、Zr、Mo、Ta及W組成之群。
較佳覆蓋層(1)材料係選自由以下組成之群:Ni-B合金、Ni-P合金、Ni-M-P合金、Ni-M-B合金、Ni-M-P-B合
金、Co-P合金、Co-B合金、Co-P-B合金、Co-M-P合金、Co-M-B合金及Co-M-P-B合金,其中M係選自由Mn、Zr、Re、Mo、Ta及W組成之群。
最佳覆蓋層(1)材料係選自由Co-M-P合金、Co-M-B合金及Co-M-P-B合金組成之群,其中M係Mo或W。
覆蓋層(1)之厚度在50 nm至1500 nm、更佳100 nm至1000 nm範圍內。
用於上述Ni及Co合金之無電鍍敷之鍍敷浴液組合物包括Ni離子或Co離子源、還原劑(例如次磷酸鈉及/或硼氫化鈉)、至少一種錯合劑及至少一種穩定劑。
包括Ni或Co鹽及還原劑(例如次磷酸或其浴液溶性鹽)之Ni及Co合金電鍍水溶液適用於藉由無電鍍敷沈積覆蓋層(1)。較佳地,次磷酸鹽還原劑係選自次磷酸鈉、次磷酸鉀及次磷酸銨。此溶液較佳應不含可形成不溶性亞磷酸鹽之鹼金屬離子或鹼土金屬離子。
鍍敷浴液視情況進一步含有M離子源。適宜M離子源係選自包括提供Mn、Zr、Re、Mo、Ta及W之水溶性化合物之群。較佳M離子源係鉬酸鹽及鎢酸鹽,例如Na2MoO4及Na2WO4。添加至鍍敷浴液中之M離子之量係在5 g/l至20 g/l、更佳8 g/l至12 g/l範圍內。鍍敷浴液中M離子之量必須足以在覆蓋層(1)中達成2重量百分比M至7重量百分比M之濃度。
在無電Ni及Co合金溶液中,Ni或Co離子操作濃度通常為1 g/l至18 g/l,較佳利用3 g/l至9 g/l。
鍍敷浴液中所用還原劑之量係在2 g/l至60 g/l、更佳12 g/l至50 g/l且最佳20 g/l至45 g/l範圍內。對於習用實踐而言,在反應期間補充還原劑。
錯合劑係以高達200 g/l、更佳15 g/l至75 g/l之量採用。
在一項實施例中,選擇羧酸、多胺或磺酸或其混合物作為錯合劑。有用羧酸包含單-、二-、三-及四-羧酸。羧酸可經由多個取代基部分(例如羥基或胺基)取代,且該等酸可以其鈉、鉀或銨鹽形式引入鍍敷溶液中。一些錯合劑(例如乙酸)亦可用作緩衝劑,且該等添加組份針對任一鍍敷溶液之適當濃度可根據該等組份之雙重功能進行最佳化。
該等用作錯合劑之羧酸之實例包含:單羧酸,例如乙酸、羥基乙酸(乙醇酸)、胺基乙酸(甘胺酸)、2-胺基丙酸(丙胺酸);2-羥基丙酸(乳酸);二羧酸,例如琥珀酸、胺基琥珀酸(天冬胺酸)、羥基琥珀酸(蘋果酸)、丙二酸(propanedioic acid,malonic acid)、酒石酸;三羧酸,例如2-羥基-1,2,3丙烷三甲酸(檸檬酸);及四羧酸,例如乙二胺四乙酸(EDTA)。在一項實施例中,利用兩種或更多種上述錯合劑之混合物。
水性無電鍍敷浴液可在上述pH範圍內操作。由於鍍敷溶液具有在其操作期間因形成氫離子而變得酸性較強之傾向性,因此可藉由添加浴液溶性且浴液相容性鹼性物質(例如鈉、鉀或銨之氫氧化物、碳酸鹽及碳酸氫鹽)來週期性地或連續地調節pH。可藉由以高達30 g/l、更佳2 g/l至10
g/l之量添加多種緩衝化合物(例如乙酸、丙酸、硼酸或諸如此類)來改良鍍敷溶液之操作pH之穩定性。
無電鍍敷溶液亦包含業內迄今已知類型之有機及/或無機穩定劑,包含可以諸如乙酸鹽等浴液溶性且相容性鹽之形式方便地引入之鉛離子、鎘離子、錫離子、鉍離子、銻離子及鋅離子。用於無電鍍敷溶液中之有機穩定劑包含含有硫之化合物,例如,硫脲、硫醇、磺酸鹽、硫氰酸鹽等。該等穩定劑係以諸如佔溶液之0.05 ppm至5 ppm等少量使用,且更佳係以0.1 ppm至2 ppm或3 ppm之量使用。
欲鍍敷之基板係在至少40℃至高達溶液沸點之溫度下與鍍敷溶液接觸。在一項實施例中,在70℃至95℃之溫度下且更佳在80℃至90℃之溫度下採用酸性類型之無電鍍敷浴液。鹼性側上之無電鍍敷浴液通常在寬操作範圍內但通常在低於酸性無電鍍敷溶液之溫度下操作。
無電鍍敷溶液與所鍍敷基板之接觸持續時間隨所沈積Ni或Co合金之期望厚度而變化。通常,接觸時間可在2分鐘至10分鐘範圍內。
在Ni或Co合金沈積期間,通常採用溫和攪拌,且此攪拌可係溫和空氣攪拌、機械攪拌、藉由泵送之浴液循環、欲鍍敷基板之旋轉等。亦可使鍍敷溶液經受週期性或連續性過濾處理以減少其中污染物之含量。在一些實施例中,亦可週期性或連續性地補充浴液組份,以將組份之濃度(且具體而言,鎳離子及次磷酸根離子之濃度)以及pH值維持在期望範圍內。
然後較佳用水沖洗基板。
在本發明之一項實施例中,在製造主動或被動上覆結構前不移除覆蓋層(1)。而是,例如,在覆蓋層(1)之頂部及基板(3)之表面上製造RDL堆積物(5)(圖2c)。然後使銅沈積物(4)在100℃至450℃範圍內之溫度下熱退火1分鐘至100分鐘。
在本發明之另一實施例中,在熱退火後且在製造主動或被動上覆結構前移除覆蓋層(1)(圖3c)。
可藉由濕式化學蝕刻、乾式蝕刻、電漿蝕刻、藉由CMP或上述方法之組合移除覆蓋層(1)。
用於覆蓋層材料之適宜蝕刻溶液為業內已知:可藉由(例如)電漿蝕刻(例如SF6/Ar、HBr/O2及Cl2/O2電漿)移除Ti-W合金、Ta-W合金、Ti-N合金及Ti-N合金。
可藉由使基板與硝酸接觸或藉助電漿移除Ni-B合金、Ni-P合金、Ni-M-P合金、Ni-M-B合金、Ni-M-P-B合金、Co-P合金、Co-B合金、Co-P-B合金、Co-M-P合金、Co-M-B合金及Co-M-P-B合金,其中M係選自由Mn、Zr、Re、Mo、Ta及W組成之群。
然後製造主動或被動上覆結構。例如,然後藉由業內已知方法在經平坦化及熱退火之銅沈積物(4)之頂部及矽基板(3)之表面上製造RDL堆積物(5)(圖4c及5d)。該RDL堆積物(5)包括銅軌道(5a)及介電材料(5b)。苯并環丁烯及聚醯亞胺通常用作介電材料(5b)。
在本發明之又一實施例中,在熱退火銅沈積物後移除覆
蓋層(1)。此後不製造主動或被動上覆結構。而是,該等基板中之至少兩者經由填充銅開口之表面藉由銅擴散接合而接合在一起。
下列實例進一步闡釋本發明。
使具有TSV之矽基板經受銅之電鍍,之後將填充銅TSV平坦化。
使具有填充銅TSV且無沈積至經平坦化銅沈積物上之覆蓋層(1)之矽基板在450℃下經受30分鐘熱退火。
熱退火後準備之剖面之SEM顯微照片顯示填充銅TSV之開放側上銅之突起(圖1b)。
藉由無電鍍敷將由平均厚度為0.8 μm之CoWP合金組成之覆蓋層(1)沈積於實例1之基板之經平坦化銅沈積物之頂部上。接下來,使該基板經受熱退火(450℃,30分鐘)。
熱退火後準備之剖面之SEM顯微照片顯示填充銅TSV之開放側上之銅無突起(圖3c)。
(1)‧‧‧覆蓋層
(2)‧‧‧開口或通孔
(3)‧‧‧基板
(4)‧‧‧銅沈積物
(5)‧‧‧重分佈層堆積物
(5a)‧‧‧銅軌道
(5b)‧‧‧介電材料
圖1顯示根據先前技術在熱退火前(a)及熱退火後(b)用銅填充之導通孔。
圖2顯示根據先前技術在銅填充TSV及基板表面上製造RDL堆積物之方法。
圖3顯示根據本發明在熱退火前(a)及熱退火後(b)在頂部
上具有覆蓋層之用銅填充之導通孔。
圖4顯示在製造RDL前不移除覆蓋層之本發明方法。
圖5顯示在製造RDL堆積物前移除覆蓋層之本發明方法。
(5)‧‧‧重分佈層堆積物
(5a)‧‧‧銅軌道
(5b)‧‧‧介電材料
Claims (1)
- 一種導通孔中之電鍍銅沈積物之頂部上之覆蓋層(1)的用途,其用以抑制該銅沈積物之突起其中該覆蓋層(1)係由選自由以下組成之群之金屬或金屬合金組成:Ni-B合金、Ni-P合金、Ni-M-P合金、Ni-M-B合金、Ni-M-P-B合金、Co-P合金、Co-B合金、Co-P-B合金、Co-M-P合金、Co-M-B合金及Co-M-P-B合金,其中M係選自由Mn、Zr、Re、Mo、Ta及W組成之群,且其中該覆蓋層(1)係藉由無電鍍敷沈積,且其中該覆蓋層(1)之厚度在50 nm至1500 nm範圍內。
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JP2007031826A (ja) * | 2005-06-23 | 2007-02-08 | Hitachi Chem Co Ltd | 接続用端子、およびこれを有する半導体搭載用基板 |
DE102006052202B3 (de) * | 2006-11-06 | 2008-02-21 | Infineon Technologies Ag | Halbleiterbauelement sowie Verfahren zur Herstellung eines Halbleiterbauelements |
US7964961B2 (en) * | 2007-04-12 | 2011-06-21 | Megica Corporation | Chip package |
WO2009072544A1 (ja) * | 2007-12-04 | 2009-06-11 | Hitachi Metals, Ltd. | 電極構造及びその製造方法、回路基板、半導体モジュール |
US9607936B2 (en) * | 2009-10-29 | 2017-03-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Copper bump joint structures with improved crack resistance |
TWI391037B (zh) * | 2009-11-09 | 2013-03-21 | Advance Materials Corp | 接墊結構及其製法 |
EP2581470B1 (en) * | 2011-10-12 | 2016-09-28 | ATOTECH Deutschland GmbH | Electroless palladium plating bath composition |
-
2011
- 2011-06-14 EP EP11169737A patent/EP2535929A1/en not_active Withdrawn
-
2012
- 2012-05-09 JP JP2014515112A patent/JP2014517540A/ja active Pending
- 2012-05-09 US US14/125,611 patent/US9076773B2/en active Active
- 2012-05-09 KR KR1020137032980A patent/KR102004555B1/ko active IP Right Grant
- 2012-05-09 WO PCT/EP2012/058572 patent/WO2012171727A1/en active Application Filing
- 2012-05-09 CN CN201280029058.8A patent/CN103597595A/zh active Pending
- 2012-06-14 TW TW101121259A patent/TW201307187A/zh unknown
- 2012-06-14 TW TW101121398A patent/TWI553753B/zh active
- 2012-06-14 TW TW101121413A patent/TW201305396A/zh unknown
-
2017
- 2017-01-31 JP JP2017015551A patent/JP2017123466A/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9899260B2 (en) | 2016-01-21 | 2018-02-20 | Micron Technology, Inc. | Method for fabricating a semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
TWI553753B (zh) | 2016-10-11 |
JP2014517540A (ja) | 2014-07-17 |
TW201308456A (zh) | 2013-02-16 |
TW201307187A (zh) | 2013-02-16 |
KR20140043753A (ko) | 2014-04-10 |
KR102004555B1 (ko) | 2019-07-26 |
EP2535929A1 (en) | 2012-12-19 |
WO2012171727A1 (en) | 2012-12-20 |
CN103597595A (zh) | 2014-02-19 |
US20140110844A1 (en) | 2014-04-24 |
US9076773B2 (en) | 2015-07-07 |
JP2017123466A (ja) | 2017-07-13 |
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