CN103597595A - 用于微电子器件的线可结合表面 - Google Patents
用于微电子器件的线可结合表面 Download PDFInfo
- Publication number
- CN103597595A CN103597595A CN201280029058.8A CN201280029058A CN103597595A CN 103597595 A CN103597595 A CN 103597595A CN 201280029058 A CN201280029058 A CN 201280029058A CN 103597595 A CN103597595 A CN 103597595A
- Authority
- CN
- China
- Prior art keywords
- alloy
- layer
- acid
- palladium
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4827—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05157—Cobalt [Co] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05164—Palladium [Pd] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05664—Palladium [Pd] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01025—Manganese [Mn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0103—Zinc [Zn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0104—Zirconium [Zr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01051—Antimony [Sb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01061—Promethium [Pm]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01073—Tantalum [Ta]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
Abstract
本发明涉及在用于金属线结合应用的接触区/障壁层/第一结合层型的金属和金属合金层序列中的薄扩散障壁。所述扩散障壁选自Co-M-P、Co-M-B和Co-M-B-P合金,其中M选自Mn、Zr、Re、Mo、Ta和W,所述扩散障壁的厚度为0.03-0.3μm。所述第一结合层选自钯和钯合金。
Description
发明领域
本发明涉及用于金属线结合应用的在半导电衬底上的金属和金属合金层序列(layer sequence)。
发明背景
由诸如硅片的半导电衬底制成的微电子器件包括在外表面上的接触区,这些接触区用于提供在该微电子器件与IC衬底或印刷电路板之间的电接触。可以接触垫或凸起结构形式的这些接触区通常由铜、铜合金、铝或铝合金组成。为了提供这种电接触,应用焊接和线结合(wire
bonding)。
在这两种情况下,接触区都必须被做成通过将金属或金属合金层沉积在接触区之上以提供可焊接性和可结合性,该接触区提供障壁层和第一和/或第二可结合表面的功能。
障壁层防止在焊接或线结合期间在接触区与第一和/或第二结合层之间扩散。另外,障壁层通过提供硬“遮蔽层”而为在接触区下面的微电子器件的敏感部分提供机械保护。该功能在其中在结合期间将细金或铜线压到接触垫上的引线结合操作中特别需要。
US
6,815,789 B2公开了包含镍、钯及其合金中的至少一种的至少一层。该镍(合金)层充当障壁层。所述镍(合金)层的厚度应该为至少1μm,以提供足够的障壁性质。
US
2001/0033020 A1公开了具有0.5-1.5μm的厚度的选自镍、钴、铬、钼、钛、钨及其合金的障壁层。
US
6,445,069 B1公开了具有在0.5-20μm范围内的厚度的由镍制成的障壁层。
由于微电子器件正趋向小型化,在各个接触区之间的距离(表示为“间距”)减小。同时,桥接危险日益增加,即在接触区之间不想要的电接触日益增加。桥接由沉积到接触区上的厚障壁层引起。
线结合与力施加到具有可结合表面的接触区相关,因为在结合期间将线压到该可结合表面。
当障壁层的厚度减小时,这种桥接可减至最少。然而,同时,在线结合期间对在接触区下面的敏感区域的机械保护不再充分,且观察到由线结合引起的器件破损。
发明目的
因此,本发明的目的在于提供减少在接触区之间的桥接的危险且同时在引线结合期间对在所述接触区下面的微电子器件的敏感区域提供足够机械稳定性的具有线可结合表面的金属和金属层序列。
发明概述
这些目的用具有金属线可结合表面的包含至少一个金属和金属合金层序列的半导电衬底解决,其中所述层序列顺次由以下组成(consist
in this order of):
(i) 接触区,
(ii) 选自由选自Co-M-B、Co-M-P和Co-M-B-P合金组成的集合的钴合金的障壁层,
其中M选自Mn、Zr、Re、Mo、Ta和W且所述障壁层的厚度为0.03-0.3μm,和
(iii) 具有在0.05-0.3μm范围内的厚度的选自钯和钯合金的第一结合层。
三元或四元钴合金更优选选自Co-Mo-P、Co-W-P、Co-Mo-B、Co-W-B、Co-Mo-B-P和Co-W-B-P合金。
根据本发明的金属和金属合金层序列由于障壁层的厚度较低而减小桥接的危险。同时,所述金属和金属合金层序列提供足够的机械稳定性以防止在金属线结合操作期间在接触区下面的敏感区损坏。
附图简述
图1示出了在500℃下热退火8小时之后由在铜制成的接触区上面的Ni-P合金障壁层组成的金属和金属合金层序列的化学元素的分布。
图2示出了在500℃下热退火8小时之后由在铜制成的接触区上面的Co-W-P合金障壁层组成的金属和金属合金层序列的化学元素的分布。
发明详述
接触区的铜或铜合金表面通常通过预先用酸清洁剂处理且随后在微侵蚀浴中还原表面氧化铜而准备用于障壁层的镀覆。为此目的,侵蚀清洁通常在例如硫酸和过氧化氢溶液的氧化酸性溶液中进行。优选接着进行在诸如硫酸溶液的酸性溶液中的另外清洁。
对于铝和铝合金的预处理,利用不同的浸锌(zincation),例如Xenolyte®清洁剂ACA、Xenolyte®
Etch MA、Xenolyte® CFA或Xenolyte® CF (全部自Atotech Deutschland
GmbH购得),它们符合不含氰化物的化学品的工业标准。铝和铝合金的所述预处理方法例如公开在US
7,223,299 B2中。
对于本发明的目的,可以使用的是,在沉积三元或四元钴合金扩散障壁层之前将另外的活化步骤应用到接触区。所述活化溶液可包含产生薄钯层的钯盐。所述层非常薄且通常不覆盖全部铜或铜合金线结合部分。并不考虑层组合的不同层,而是考虑活化,其形成金属晶种层。这种晶种层通常几埃厚。这种晶种层通过浸渍交换工艺镀到铜或铜合金层上。
接着,选自Co-M-P、Co-M-B和Co-M-B-P合金的三元或四元钴合金通过无电镀沉积到活化的接触区上。M选自Mn、Zr、Re、Mo、Ta和W。更优选M选自Mo和W。
所述三元或四元钴合金的厚度为0.03-0.3μm,更优选为0.05-0.25μm。
所述三元或四元钴合金优选选自Co-Mo-P、Co-W-P、Co-Mo-B、Co-W-B、Co-Mo-B-P和Co-W-B-P合金且最优选选自Co-Mo-P和Co-W-P合金。
合适的钴合金镀覆溶液包含钴盐和诸如次磷酸或选自次磷酸钠、次磷酸钾和次磷酸铵的其浴可溶性盐的还原剂。该溶液应该不含能够形成不溶性正亚磷酸盐的碱或碱土金属离子。其他合适的镀浴包含选自硼烷化合物或硼烷与次磷酸盐化合物的混合物的还原剂。
在次磷酸盐化合物作为还原剂使用的情况下,获得Co-M-P合金沉积物。硼烷化合物还原剂导致Co-M-B合金沉积物且作为所述还原剂的次磷酸盐与硼烷化合物的混合物导致Co-M-B-P合金沉积物。
所述镀浴还含有M-离子源。合适的来源选自水溶性钼酸盐和钨酸盐,诸如Na2MoO4和Na2WO4。加到所述镀浴中的M-离子的量为5-20g/l,更优选为8-12g/l。
在无电镀钴合金溶液中,操作钴离子浓度通常为1-18g/l,优选为3-9g/l。
在所述镀浴中采用的还原剂的量为2-60g/l,更优选为12-50g/l且最优选为20-45g/l。作为常规作法,所述还原剂在反应期间补充。
络合剂以至多200g/l、更优选15-75g/l的量采用。
在一个实施方案中,将选择羧酸、多元胺或磺酸或其混合物作为络合剂。有用的羧酸包括单-、二-、三-和四-羧酸。所述羧酸可被诸如羟基或氨基的各种取代基部分(substituent
moiety)取代,且所述酸可作为其钠、钾或铵盐引入所述镀覆溶液中。诸如乙酸的一些络合剂例如也可充当缓冲剂,且考虑到其双重功能,可优化任何镀覆溶液中这类添加组分的适当浓度。
可作为所述络合剂使用的这类羧酸的实例包括:单羧酸,诸如乙酸、羟基乙酸(乙醇酸)、氨基乙酸(甘氨酸)、2-氨基丙酸(丙氨酸)、2-羟基丙酸(乳酸);二羧酸,诸如丁二酸、氨基丁二酸(天门冬氨酸)、羟基丁二酸(苹果酸)、丙二酸(propanedioic acid)(丙二酸(malonic acid))、酒石酸;三羧酸,诸如2-羟基-1,2,3-丙烷三甲酸(柠檬酸);和四羧酸,诸如乙二胺四乙酸(EDTA)。在一个实施方案中,利用上述络合剂中的两种或更多种的混合物。
所述水性无电镀浴可在上述pH范围内操作。因为镀覆溶液具有在其操作期间由于形成氢离子而变得酸性更强的趋势,所以pH可通过加入浴可溶解且浴相容的碱性物质如氢氧化钠、氢氧化钾或氢氧化铵、碳酸盐和碳酸氢盐定期或连续地调节。所述镀覆溶液的操作pH的稳定性可通过加入用量至多30g/l、更优选2-10g/l的各种缓冲化合物如乙酸、丙酸、硼酸等改进。
所述无电镀覆溶液还包含在本领域中至今已知类型的有机和/或无机稳定剂,所述有机和/或无机稳定剂包括铅离子、镉离子、锡离子、铋离子、锑离子和锌离子,其可以浴可溶解且相容的盐如乙酸盐等形式方便地引入。可用于无电镀覆溶液中的有机稳定剂包括含硫化合物,诸如硫脲、硫醇、磺酸盐、硫代氰酸盐等。所述稳定剂以少量,诸如占溶液的0.05-5ppm的量使用,且更优选以0.1ppm-2ppm或3ppm的量使用。
使待镀的衬底在至少40℃至最多镀覆溶液的沸点的温度下与该溶液接触。在一个实施方案中,在70℃-95℃的温度下且更优选在80℃-90℃的温度下采用酸型的无电镀浴。在碱侧的无电镀浴通常在宽操作范围内操作,但通常在比酸性无电镀覆溶液低的温度下操作。
所述无电镀覆溶液与待镀的衬底的接触持续时间为取决于所沉积钴合金的所要厚度的函数。通常,该接触时间可为5-10min。
在所述钴合金的沉积期间,通常采用轻微搅拌,且该搅拌可为轻微空气搅拌、机械搅拌、通过泵抽的浴循环、旋转待镀的衬底等。也可对所述镀覆溶液进行定期或连续过滤处理以降低其中的污染物水平。在一些实施方案中,也可在定期或连续基础上进行浴成分的补充以维持成分的浓度,且尤其是将钴离子和M-离子及次磷酸根离子的浓度以及pH水平维持在所要极限内。
随后优选用水冲洗所述衬底。
接着,将钯或钯合金的层沉积到三元或四元钴合金的层上。
根据本发明的钯层为具有大于99.0重量%、优选大于99.5重量%钯或甚至更优选大于99.9重量%或高于99.99重量%钯的钯含量的层。所述钯层在本文中表示为纯钯层。
在所述方法的另一实施方案中,所述钯镀层为包含90-99.9重量%的钯和0.1-10.0重量%的磷和/或硼的合金层。
沉积纯钯层的合适化学镀浴组合物例如描述在US
5,882,736中。所述镀浴含有钯盐、一种或多种氮化络合剂和甲酸或甲酸衍生物,但没有次磷酸盐和/或胺硼烷化合物。所述溶液的pH值高于4。优选将伯胺、仲胺或叔胺或多元胺用作氮化络合剂。它们例如为乙二胺;1,3-二氨基-丙烷、1,2-双(3-氨基-丙基-氨基)-乙烷;2-二乙基-氨基-乙基-胺;和二乙烯三胺。另外,还可使用二乙烯-三胺-五乙酸;硝基-乙酸;N-(2-羟基-乙基)-乙烯-二胺;乙二胺-N,N-二乙酸;2-(二甲基-氨基)-乙基-胺;1,2-二氨基-丙基-胺;1,3-二氨基-丙基-胺;3-(甲基-氨基)-丙基-胺;3-(二甲基-氨基)-丙基-胺;3-(二乙基-氨基)-丙基-胺;双(3-氨基-丙基)-胺;1,2-双(3-氨基-丙基)-烷基-胺;二乙烯-三胺;三乙烯-四胺;四乙烯-五胺;五乙烯-六胺;和这些氮化络合剂的任何所要的混合物。然而,含硫化合物不作为稳定剂与所述络合剂一起使用。
更优选用于以无电镀方式沉积纯钯层的溶液为水性的且含有钯盐,诸如氯化钯或硫酸钯;作为还原剂的不含次磷酸盐的化合物,诸如甲酸,无机酸如硫酸和盐酸,或无机碱如氢氧化钠或氢氧化钾;络合剂,如胺化合物如乙二胺,和如果需要的话,稳定化合物。或者,可使用其他无电镀钯和钯合金沉积溶液和方法,其在本领域中公知且描述在US 5,292,361、US 4,424,241、US
4,341,846、US 4,279,951和US 4,255,194中。
所述钯或钯合金镀覆方法在约45℃-80℃下进行1-60分钟以给出厚度为0.05-0.3μm、更优选为0.1-0.2μm的钯或钯合金镀层。
优选将纯钯沉积到所述三元或四元钴合金上。
任选将薄金或金合金层镀到所述纯钯或钯合金层上,充当第二结合层。
为此目的,可使用现有技术已知的无电镀金电解液。在所述纯钯或钯合金层上面的任选金层的厚度为0.01-0.5μm,优选为0.05-0.3μm。所述任选的金层最优选通过浸渍方法沉积。用于无电镀金的合适浴以商标Aurotech® SFplus购得(T = 80-90℃;pH =
4.5-6.0;浸渍时间 = 7-15分钟;0.5-2g/l
Au (作为K[Au(CN)2)。
实施例
现在将参考以下非限制性实施例说明本发明。
实施例1(比较)
通过无电镀将镍磷合金沉积到由铜制成的接触垫上。在沉积之后所述镍磷合金的厚度为1.0μm且磷浓度为12重量%。
随后将衬底在500℃下退火8小时。
铜向所述镍磷合金的扩散特性(和反之)使用XPS测量结合该层的剥落确定。
在退火步骤之后在镍磷合金层中观察到3-5原子%的铜含量。
因此,在高温下薄镍磷合金层没有阻止铜扩散。
实施例2
通过电镀将Co-W-P合金沉积到由铜制成的接触垫上。在沉积之后所述Co-W-P合金的厚度为0.2μm且磷浓度为3重量%。
如在实施例1中所述进行热退火和XPS测量。
在热退火之后在Co-W-P合金层中检测到可以忽略量的铜。
因此,在高温下薄Co-W-P合金层的确阻止了铜扩散。
实施例3
通过电镀将Co-W-P合金沉积到由铜制成的接触垫上。在沉积之后所述Co-W-P合金的厚度为0.2μm且磷浓度为3重量%。
接着,将纯钯中间层(厚度:0.3μm)且此后将金顶层(厚度:0.03μm)沉积到钯层上。
由铜接触垫、Co-W-P合金层、具有大于99重量%的钯含量的钯层和金层组成的最终金属和金属合金层序列的线结合性质使用第DVS2811号标准测定。
使用Delvotec 5410型TS结合机和金线Au-AH3 (Hereaus)及结合参数US功率75%(刻度线(没有校准刻度)、给定TS结合机的特定参数);25gf结合力和25ms结合时间。对于30个柱形凸起/垫尺寸进行测量。
在结合试验期间测定以下参数:
平均值:65.8g
标准偏差:7.5g
最小值:55.4g
剪切剥离(Shear lift off):0%
剪切力 > 35cN:0%
所有获得的值都在DVS第2811号标准及其要求的框架内。因此,对于使用纯钯/金精整的线结合应用,薄Co-W-P合金是合适的扩散障壁。
Claims (8)
1.半导电衬底,其包含至少一个金属层序列以生成金属线可结合表面,其中所述层序列顺次由以下组成:
(i) 接触区,
(ii) 选自Co-M-B、Co-M-P和Co-M-B-P合金的障壁层,
其中M选自Mn、Zr、Re、Mo、Ta和W且所述障壁层的厚度为0.03-0.3μm,和
(iii) 具有在0.05-0.3μm范围内的厚度的作为第一结合层的纯钯。
2.权利要求1的半导电衬底,其中所述障壁层选自Co-Mo-P、Co-W-P、Co-Mo-B、Co-W-B、Co-Mo-B-P和Co-W-B-P合金。
3.前述权利要求中任一项的半导电衬底,其中所述障壁层的厚度为0.05-0.15μm。
4.前述权利要求中任一项的半导电衬底,其中所述第一结合层的厚度为0.1-0.2μm。
5.前述权利要求中任一项的半导电衬底,其中堆叠还包含在所述第一结合层上面的第二结合层。
6.权利要求5的半导电衬底,其中所述第二结合层选自金和金合金。
7.权利要求5和6的半导电衬底,其中所述第二结合层的厚度为0.02-0.1μm。
8.前述权利要求中任一项的半导电衬底,其中所述接触区由选自铜、铜合金、铝和铝合金的金属组成。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP11169737.1 | 2011-06-14 | ||
EP11169737A EP2535929A1 (en) | 2011-06-14 | 2011-06-14 | Wire bondable surface for microelectronic devices |
PCT/EP2012/058572 WO2012171727A1 (en) | 2011-06-14 | 2012-05-09 | Wire bondable surface for microelectronic devices |
Publications (1)
Publication Number | Publication Date |
---|---|
CN103597595A true CN103597595A (zh) | 2014-02-19 |
Family
ID=46044718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201280029058.8A Pending CN103597595A (zh) | 2011-06-14 | 2012-05-09 | 用于微电子器件的线可结合表面 |
Country Status (7)
Country | Link |
---|---|
US (1) | US9076773B2 (zh) |
EP (1) | EP2535929A1 (zh) |
JP (2) | JP2014517540A (zh) |
KR (1) | KR102004555B1 (zh) |
CN (1) | CN103597595A (zh) |
TW (3) | TW201307187A (zh) |
WO (1) | WO2012171727A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108291307A (zh) * | 2015-11-27 | 2018-07-17 | 埃托特克德国有限公司 | 用于钯的化学浸镀的镀浴组合物及方法 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2740818B1 (en) * | 2012-12-05 | 2016-03-30 | ATOTECH Deutschland GmbH | Method for manufacture of wire bondable and solderable surfaces on noble metal electrodes |
CN103311130B (zh) * | 2013-05-14 | 2014-03-05 | 广州新视界光电科技有限公司 | 一种非晶金属氧化物薄膜晶体管及其制备方法 |
WO2015074703A1 (en) * | 2013-11-21 | 2015-05-28 | Heraeus Deutschland GmbH & Co. KG | Coated wire for bonding applications |
US9899260B2 (en) | 2016-01-21 | 2018-02-20 | Micron Technology, Inc. | Method for fabricating a semiconductor device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5882736A (en) * | 1993-05-13 | 1999-03-16 | Atotech Deutschland Gmbh | palladium layers deposition process |
CN100386857C (zh) * | 2000-02-22 | 2008-05-07 | 国际商业机器公司 | 制备用于电连接的导电座的方法及形成的导电座 |
US20080122091A1 (en) * | 2006-11-06 | 2008-05-29 | Thomas Gutt | Semiconductor device and method for producing a semiconductor device |
CN100573845C (zh) * | 2004-06-14 | 2009-12-23 | 恩索恩公司 | 在电子装置集成电路上的金属互连结构元件盖 |
US20100258954A1 (en) * | 2007-12-04 | 2010-10-14 | Hitachi Metals, Ltd. | Electrode structure and its manufacturing method, and semiconductor module |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4279951A (en) | 1979-01-15 | 1981-07-21 | Mine Safety Appliances Company | Method for the electroless deposition of palladium |
US4255194A (en) | 1979-01-15 | 1981-03-10 | Mine Safety Appliances Company | Palladium alloy baths for the electroless deposition |
US4341846A (en) | 1980-07-03 | 1982-07-27 | Mine Safety Appliances Company | Palladium boron plates by electroless deposition alloy |
US4424241A (en) | 1982-09-27 | 1984-01-03 | Bell Telephone Laboratories, Incorporated | Electroless palladium process |
JPH0539580A (ja) | 1991-08-02 | 1993-02-19 | Okuno Seiyaku Kogyo Kk | 無電解パラジウムめつき液 |
DE4415211A1 (de) * | 1993-05-13 | 1994-12-08 | Atotech Deutschland Gmbh | Verfahren zur Abscheidung von Palladiumschichten |
JP2000277897A (ja) * | 1999-03-24 | 2000-10-06 | Hitachi Chem Co Ltd | はんだボール接続用端子とその形成方法並びに半導体搭載用基板の製造方法 |
US20010033020A1 (en) | 2000-03-24 | 2001-10-25 | Stierman Roger J. | Structure and method for bond pads of copper-metallized integrated circuits |
US6445069B1 (en) | 2001-01-22 | 2002-09-03 | Flip Chip Technologies, L.L.C. | Electroless Ni/Pd/Au metallization structure for copper interconnect substrate and method therefor |
EP2273543A3 (en) | 2001-12-14 | 2011-10-26 | STMicroelectronics S.r.l. | Semiconductor electronic device and method of manufacturing thereof |
US7223299B2 (en) | 2003-09-02 | 2007-05-29 | Atotech Deutschland Gmbh | Composition and process for improving the adhesion of a siccative organic coating compositions to metal substrates |
JP2007031826A (ja) * | 2005-06-23 | 2007-02-08 | Hitachi Chem Co Ltd | 接続用端子、およびこれを有する半導体搭載用基板 |
US7964961B2 (en) * | 2007-04-12 | 2011-06-21 | Megica Corporation | Chip package |
US9607936B2 (en) * | 2009-10-29 | 2017-03-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Copper bump joint structures with improved crack resistance |
TWI391037B (zh) * | 2009-11-09 | 2013-03-21 | Advance Materials Corp | 接墊結構及其製法 |
EP2581470B1 (en) * | 2011-10-12 | 2016-09-28 | ATOTECH Deutschland GmbH | Electroless palladium plating bath composition |
-
2011
- 2011-06-14 EP EP11169737A patent/EP2535929A1/en not_active Withdrawn
-
2012
- 2012-05-09 WO PCT/EP2012/058572 patent/WO2012171727A1/en active Application Filing
- 2012-05-09 CN CN201280029058.8A patent/CN103597595A/zh active Pending
- 2012-05-09 US US14/125,611 patent/US9076773B2/en active Active
- 2012-05-09 KR KR1020137032980A patent/KR102004555B1/ko active IP Right Grant
- 2012-05-09 JP JP2014515112A patent/JP2014517540A/ja active Pending
- 2012-06-14 TW TW101121259A patent/TW201307187A/zh unknown
- 2012-06-14 TW TW101121398A patent/TWI553753B/zh active
- 2012-06-14 TW TW101121413A patent/TW201305396A/zh unknown
-
2017
- 2017-01-31 JP JP2017015551A patent/JP2017123466A/ja active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5882736A (en) * | 1993-05-13 | 1999-03-16 | Atotech Deutschland Gmbh | palladium layers deposition process |
CN100386857C (zh) * | 2000-02-22 | 2008-05-07 | 国际商业机器公司 | 制备用于电连接的导电座的方法及形成的导电座 |
CN100573845C (zh) * | 2004-06-14 | 2009-12-23 | 恩索恩公司 | 在电子装置集成电路上的金属互连结构元件盖 |
US20080122091A1 (en) * | 2006-11-06 | 2008-05-29 | Thomas Gutt | Semiconductor device and method for producing a semiconductor device |
US20100258954A1 (en) * | 2007-12-04 | 2010-10-14 | Hitachi Metals, Ltd. | Electrode structure and its manufacturing method, and semiconductor module |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108291307A (zh) * | 2015-11-27 | 2018-07-17 | 埃托特克德国有限公司 | 用于钯的化学浸镀的镀浴组合物及方法 |
CN108291307B (zh) * | 2015-11-27 | 2020-02-14 | 埃托特克德国有限公司 | 用于钯的化学浸镀的镀浴组合物及方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2017123466A (ja) | 2017-07-13 |
TW201305396A (zh) | 2013-02-01 |
EP2535929A1 (en) | 2012-12-19 |
KR20140043753A (ko) | 2014-04-10 |
US9076773B2 (en) | 2015-07-07 |
KR102004555B1 (ko) | 2019-07-26 |
TW201307187A (zh) | 2013-02-16 |
US20140110844A1 (en) | 2014-04-24 |
WO2012171727A1 (en) | 2012-12-20 |
JP2014517540A (ja) | 2014-07-17 |
TWI553753B (zh) | 2016-10-11 |
TW201308456A (zh) | 2013-02-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5665136B2 (ja) | 接合可能なウェハ表面のための応力が低減されたNi−P/Pd積層を調製するための方法 | |
CN101469420B (zh) | 化学镀金方法及电子部件 | |
CN104854260B (zh) | 在贵金属电极上制造可线接合和可焊接表面的方法 | |
CN103597595A (zh) | 用于微电子器件的线可结合表面 | |
KR20080069139A (ko) | 치환 주석 합금 도금 피막의 형성 방법, 치환 주석 합금도금욕 및 도금 성능의 유지 방법 | |
TW200902758A (en) | Electroless gold plating bath, electroless gold plating method and electronic parts | |
WO2014042829A1 (en) | Direct electroless palladium plating on copper | |
TWI582266B (zh) | 用於鈷合金無電沈積之鹼性鍍浴 | |
CN105051254B (zh) | 供无电电镀的铜表面活化的方法 | |
CN109457239A (zh) | 还原型非氰镀金液、镀金方法以及镀金产品 | |
TW202026462A (zh) | 無電鎳鍍浴溶液 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20140219 |