TW201236113A - Semiconductor device, method of manufacturing semiconductor device and electronic circuit - Google Patents

Semiconductor device, method of manufacturing semiconductor device and electronic circuit Download PDF

Info

Publication number
TW201236113A
TW201236113A TW101101191A TW101101191A TW201236113A TW 201236113 A TW201236113 A TW 201236113A TW 101101191 A TW101101191 A TW 101101191A TW 101101191 A TW101101191 A TW 101101191A TW 201236113 A TW201236113 A TW 201236113A
Authority
TW
Taiwan
Prior art keywords
resin portion
semiconductor device
lead
electrode
resin
Prior art date
Application number
TW101101191A
Other languages
English (en)
Other versions
TWI456705B (zh
Inventor
Tadahiro Imada
Keishiro Okamoto
Nobuhiro Imaizumi
Toshihide Kikkawa
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of TW201236113A publication Critical patent/TW201236113A/zh
Application granted granted Critical
Publication of TWI456705B publication Critical patent/TWI456705B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/4952Additional leads the additional leads being a bump or a wire
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45014Ribbon connectors, e.g. rectangular cross-section
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/48599Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/48699Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41766Source or drain electrodes for field effect devices with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01028Nickel [Ni]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01049Indium [In]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01073Tantalum [Ta]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/10329Gallium arsenide [GaAs]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/1033Gallium nitride [GaN]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/10344Aluminium gallium nitride [AlGaN]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13064High Electron Mobility Transistor [HEMT, HFET [heterostructure FET], MODFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

201236113 六、發明說明: 【發明所屬之技術領域】 此處討論的實施例係有關於一種半導體裝置,以及一 種半導體裝置的製造方法。 [交又參照] 本發明專利申請案主張於2011年2月23曰申請之曰 本專利申請案第2011-37533號的優先權,其中所揭露之内 容併入本說明書以資參考。 【先前技術】 氮化物半導體包含氮化鎵(GaN)、氮化鋁(A1N)及氮化 銦(InN),而包含這些氮化物半導體混晶的材料具有寬能隙 (band-gap),且用於高輸出電子裝置、短波長發光裝置等。 場效電晶體(FET)(例如,高電子遷移率電晶體(HEMT))用於 高輸出電子裝置。包含氮化物半導體的HEMT係用於高輸出 及高效率放大器、高功率開關裝置及類似者。在包含AiGaN 作為電子供應層及GaN作為電子傳遞層的HEMT中,由於介 於AlGaN及GaN之間不同的晶格常數所致之失真,係造成 在AlGaN中的壓電極化。因此,產生高濃度的二維電子氣, 並從而可以改進該HEMT的特性。 使用在包含氮化物半導體之HEMT中的GaN的能隙可 為3.4eV,其係大於矽(Si)的能隙(即h leV),以及大於砷 化鎵(GaAs)的能隙(即1. 4ev)。因此,該HEMT可操作在高 電壓。在此種HEM上之半導體基板表面上所形成的閘極電 核、源極電極及汲極電極,係藉由銲線連接引線架或類似 323810 3 201236113 者。 例如,日本專利公開號2010-21347揭露相關的技術。 高電壓係施加到例如在高電壓下操作高擊穿電壓功 率裝置的電極。因此,高電壓電流流經用於施加電壓到電 極的銲線。當相鄰的銲線之間的距離減少時,因為介於銲 線之間的電位差會增加,漏電流可能會增加。 當以用於高擊穿電壓的模塑樹脂(molding resin)進 行密封時,該模塑樹脂具有高黏度樹脂,銲線會被施加於 模塑樹脂的力所按壓,而銲線的形狀可能會改變。因此, 相鄰銲線之間的距離可能會縮小。此外,銲線被施加於模 塑樹脂的力所按壓,而可能欲連接部分(如電極)脫離。 有關於實現低電阻銲線,銲線材料可包含銅。因為以 模塑樹脂材料密封無法提供足夠的防潮性,故當該銲線材 料包含銅時,銅及其他材料可能被氧化。 【發明内容】 根據實施例的一方面,半導體裝置包含:具有電極的 半導體晶片;對應於該電極的引線;將該電極連接至該引 線的金屬線;第一樹脂部分,係覆蓋該金屬線及該電極之 間的連接部分及該金屬線及該引線之間的連接部分;以及 第二樹脂部分,係覆蓋該金屬線、該第一樹脂部分及該半 導體晶片。 根據該半導體裝置,藉由形成該第一樹脂部分,固定 該連接部分,以及形成該第二樹脂部分作為樹脂密封。可 以高生產率提供一種高度可靠的半導體裝置。 323810 4 201236113 本發明之更多的優點及新穎的功能,將提出說明如 下,並且藉由本發明的實施,熟悉此技藝之人士可由本說 明書所揭示之内容學習本發明ώ 【實施方式】 相同的組件、相似的組件、以及類似者將指定相同的 元件符號,並且將會省略或減少這些元件的描述。 第1圖係顯示一種例示性的半導體裝置。該半導體裝 置可包含在其上形成有經離散封裝的HEMT電晶體的半導 體晶片。 如第1圖所示,以晶元貼附劑30(如銲料)固定半導體 晶片10於引線架主體20上。該半導體晶片10可為包含 GaN基材料的HEMT。第2圖係顯不例不性之半導體晶片的 上表面。第2圖所示的半導體晶片可為第1圖所示的半導 體晶片。如第2圖所示,在半導體晶片10的表面上形成包 含金屬材料(如鋁(A1)、金(Au)、銅(Cu))的閘極電極墊 11、源極電極墊12及汲極電極墊13。 該閘極電極墊11以銲線41連接至閘極引線21。該源 極電極墊12以銲線42連接至源極引線22。該汲極電極墊 13以銲線43連接至汲極引線23。該銲線41、42及43可 為金屬線,並可包含如Al、Au、Cu的金屬材料。 從該閘極電極墊11及該銲線41之間的連接部分延伸 至該閘極引線21及該銲線41之間的連接部分之區域的銲 線41係被第一樹脂部分51所覆蓋。從該源極電極墊12 及該銲線42之間的連接部分延伸至該源極引線22及該銲 323810 5 201236113 線42之間的連接部分之區域的銲線42係被第一樹脂部分 52所覆蓋。從該汲極電極墊13及該銲線43之間的連接部 y刀延伸至該汲極引線23及該銲線43之間的連接部分之區 域的銲線43係被第一樹脂部分53所覆蓋。該第一樹脂部 分51、52及53包含如聚醯亞胺(p〇lyimide)的樹脂材料。 例如,藉由喷霧該樹脂材料,形成該第一樹脂部分51,52 及53。因此,可減少鮮線41、42及43變形等。包含如聚 醯亞胺之樹脂材料的該第一樹脂部分51、52及53的防潮 性高於模塑樹脂的防潮性。 分別以該第一樹脂部分51、52及53覆蓋該半導體晶 片10、該銲線41、42及43,以第二樹脂部分60覆蓋該引 線架主體20、部分閘極引線21、部分源極引線22及部分 /及極引線23。該第二樹脂部分60包含模塑樹脂及類似者^ 可藉由轉移模塑(transfer molding)方法進行樹脂密封。 在該半導體裝置中,分別以該第一樹脂部分51、52 及53覆蓋該銲線4卜42及43及類似者之後,以第二樹脂 部分60覆蓋該第一樹脂部分當藉由轉移模塑方法或類似 者進行樹脂密封時,因為已經分別以第一部分樹脂51、52 及53覆蓋該銲線41、42及43,故可減少該銲線4丨、42 及43的變形、斷線及類似者。 如模塑樹脂之樹脂材料可能没有足夠的防潮性。藉由 形成包含有具有高防潮性的樹脂材料(如聚醯亞胺)的該第 一樹脂部分51、52及53,從而減少水分從外部入侵。町 減少包含在銲線41、42及43中的Cu或類似者的氧化或腐 323810 6 201236113 银。 ' 屬於金屬導線之該銲線41、42及43可用作為金屬 • 線。或者是,可使用金屬帶或類似者取代金屬導線。 第3A圖至第3E圖係顯示一種例示性的半導體晶片之 製造方法。第3A圖至第3E圖所示的半導體晶片可為第一 圖或第2圖所示的半導體晶片。 如第3A圖所示,例如包含電子傳遞層121、間隔層 122、電子供應層123及覆蓋層124的半導體層藉由磊晶生 長(如有機金屬化學氣相沉積法(metal-organic vapor phase epitaxy ; M0VPE))形成在基板110上。該基板110 可包含Si、SiC、藍寶石(AI2O3)或類似者。在該基板110 上形成用以磊晶生長該電子傳遞層121及其他層的緩衝層 (未顯示)。例如,該緩衝層可為具有0. 1微米(#m)厚度的 未摻雜i-AIN層,該電子傳遞層121可為具有3#m厚度的 未摻雜i-GaN層,該間隔層122可為具有5nm厚度的未摻 雜i-AlGaN層。該電子供應層123可為具有30nm厚度的 n- Al〇_25Ga〇.75N層,且以5xl018cm 3濃度換雜有Si作為雜質 元素。該覆蓋層124可為具有10 nm厚度的n-GaN層,且 以5xl018cnf3濃度摻雜有Si作為雜質元素。 如第3B圖所示,移除形成在將形成源極電極132及 汲極電極133的區域中之覆蓋層124,使得在該區域中曝 露該電子供應層123。例如,施加光阻於該覆蓋層124的 表面。藉由曝光裝置曝露該光阻然後使其顯影,以形成在 即將形成該源極電極132及汲極電極133的區域具有開口 323810 7 201236113 的光阻圖案(未顯示)。藉由乾蝕刻(如使用氯基氣體的反應 離子刻蝕(RIE)),移除在該光阻圖案(未顯示)的開口中的 覆蓋層124。藉由有機溶劑或類似者,移除該光阻圖案(未 顯不)。因此,在即將形成該源極電極13 2及〉及極電極13 3 的區域中,移除該覆蓋層124,且在該區域中曝露該電子 供應層123。 如第3C圖所示,在藉由該覆蓋層124的移除而曝露 出該電子供應層123的區域中,形成該源極電極132及汲 極電極133。例如,施加光阻於形成該覆蓋層124的表面 上。藉由曝光裝置曝露談光阻然後使其顯影,以形成在即 將形成該源極電極132及汲極電極133的區域具有開口的 光阻圖案(未顯示)。藉由真空沉積或類似者,在整個表面 之上形成金屬薄膜,例如約20nm厚度的钽(Ta)薄膜及約 200nm厚度的鋁(A1)薄膜。然後藉由使用有機溶劑的剝離 法(lift-off),移除沉積在該光阻圖案上的金屬薄膜。使 用在未形成該光阻圖案的區域中的該金屬薄膜來形成該源 極電極132及該汲極電極133。由於經沉積之金屬薄膜(如 Ta薄膜)與該電子供應層123接觸,藉由在氮氣環境中於 400°C至700t的溫度範圍内(例如,在550°C)進行熱處 理,而於源極電極132及汲極電極133之間建立歐姆接觸。 當不用熱處理建立歐姆接觸時,得不進行熱處理。 如第3D圖所示,在該覆蓋層124上形成相應於閘極 絕緣膜的絕緣膜140。例如,該絕緣膜140可包含氧化鋁 (AI2O3)。例如,藉由使用三曱基銘(trimethy laluminum ; 323810 8 201236113 TMA)及純淨水(H2〇)的原子層沉積(ALD)於300°C的基板溫 度沉積具有約10nm厚度的絕緣膜140。 如第3E圖所示,在該絕緣膜140的特定區域上,形 成閘極電極131。例如,施加光阻於形成該絕緣膜140的 表面上。藉由曝光裝置曝露該光阻然後使其顯影,以形成 在即將形成閘極電極131的區域具有開口的光阻圖案(未 顯示)。藉由真空沉積或類似者,在整個表面之上形成金屬 薄膜,例如約40nm厚度的鎳(Ni)薄膜及約400nm厚度的金 (Au)薄膜。然後藉由使用有機溶劑的剝離法,移除沉積在 該光阻圖案上的金屬薄膜。使用在未形成該光阻圖案的區 域中的該金屬薄膜來形成該閘極電極131。在該絕緣膜140 上形成屬於金屬薄膜之Ni薄膜,且如果需要,可進行熱處 理或類似者。 形成保護膜或類似者。如第2圖所示,形成連接至該 閘極電極131的閘極電極墊11,連接至源極電極132的源 極電極墊12,以及連接至汲極電極133的汲極電極墊13。 該閘極電極131可包含該閘極電極墊11,該源極電極132 可包含該源極電極墊12,以及該汲極電極133可包含該汲 極電極塾13。如此’形成半導體晶片10。 可形成具有包含GaN或AlGaN的半導體層之半導體晶 片。另外,可形成具有包含InAIN或InGaAIN的半導體層 之半導體晶片。在包含操作於高電壓的電晶體及其他組件 之電子裝置中,該半導體層可包含Si、GaAs、SiC、C或類 似者。 323810 9 201236113 第4A圖至第4F圖係顯示一種例示性的半導體裝置之 製造方法。 如第4A圖所示,藉由處理金屬板或類似者製備引線 架160。該引線架160可包含銅或類似者的導電金屬材料。 該引線架160包含固定有半導體晶片10於其上的引線架主 體20、閘極引線21、源極引線22及汲極引線23。該汲極 引線23連接至該引線架主體20。該閘極引線21以介於其 間的接合部分161連接該汲極引線23的一侧。該源極引線 22以介於其間的接合部分162連接該汲極引線23的另一 侧。 如第4B圖所示,以晶元貼附劑30(如銲料)將該半導 體晶片10固定在該引線架主體20。 如第4C圖所示,藉由銲線接合進行連接。藉由銲線 41將閘極電極墊11連接至該閘極引線21。藉由銲線42 將源極電極墊12連接至該源極引線22。藉由銲線43將汲 極電極墊13連接至該汲極引線23。包含於該銲線41、42 及43的材料實質上可相同或類似於包含於該閘極電極墊 11、該源極電極墊12、或該没極電極墊13的材料。 如第4D圖所示,藉由以該第一樹脂部分51、52及53 分別覆蓋該銲線41、42及43而將其等固定。例如,從該 閘極電極墊11及該銲線41之間的連接部分延伸至該閘極 引線21及該銲線41之間的連接部分之區域的銲線41係以 第一個樹脂部分51覆蓋。從該源極電極墊12及該銲線42 之間的連接部分延伸至該源極引線22及該銲線42之間的 323810 10 2〇1236i13 連接部分之區域的銲線42係以第一 從該汲極雪炼執n 4分52覆蓋。 極引Π #線43之_連接部分延伸至汲 俜以笛 銲線43之_連接部分之區域的銲線43 ^第:個樹脂部分53覆蓋。包含於該第—樹脂部分Η、 村為㈣㈣絲似者。藉由儒樹脂材 =如《亞胺)’並使用在欲形成該第—樹脂部分51 52 3t的區域具有開口的蔭遮罩(shadow mask)來形成該第 樹月^刀5卜52及53。或者是,藉由使用分配器或類 似者提供樹脂材料(如聚酸亞胺),可形成該第-樹脂部分 5卜52及53。 如第4E圖所示’藉由以第二樹脂部分60連同部分之 引線架160而覆蓋’該半導體晶片1Q,從而將其固定。例 如藉由轉移模塑方法形成該第二樹脂部分6〇。該第二樹 脂部/刀60可包含模塑樹脂,並可包含適用於高擊穿電壓的 材料。該第二樹脂部分6〇的屬性可與該第一樹脂部分5卜 52及53的屬性不同。該第一樹脂部分51、52及53的材 料可與該第一樹脂部分6〇的材料不同。 如第4F圖所示,切割及移除連接該汲極引線23至該 閘極引線21的接合部分mi。切割及移除連接該汲極引線 23至該源極引線22的接合部分162。如此,製造出半導體 裝置。s亥閘極引線21及該源極引線22可不與該引線架主 體20連接,並可藉由包含在該第二樹脂部分6〇的模塑樹 脂固定。 第二樹脂部分60可包含模塑樹脂,並可包含其他材 323810 11 201236113 料等。 第5圖係顯示一種例示性的半導體裝置。該半導體裝 置可包含形成有經離散封裝之HEMT電晶體於其上的半導 體晶片。於半導體晶片可為第1圖所示的半導體晶片10。 第5圖係顯示移除第二樹脂部分60之部分表面的狀態。 以晶元貼附劑30(如銲料)將半導體晶片10固定在引 線架主體20上。該半導體晶片10可為包含GaN基材料的 HEMT。 以第一樹脂部分211覆蓋介於閘極電極墊11及銲線 41之間的連接部分。以第一樹脂部分221覆蓋介於閘極引 線21及該銲線41之間的連接部分。以第一樹脂部分212 覆蓋介於源極電極墊12及銲線42之間的連接部分。以第 一樹脂部分222覆蓋介於源極引線22及該銲線42之間的 連接部分。以第一樹脂部分213覆蓋介於汲極電極墊13 及銲線43之間的連接部分。以第一樹脂部分223覆蓋介於 汲極引線23及該銲線43之間的連接部分。該第一樹脂部 分211、212、213、221、222及223包含如聚醯亞胺的樹 脂材料,且例如藉由喷霧樹脂材料形成第一樹脂部分 21 卜 212、213、22卜 222 及 223。 以該第二樹脂部分60覆蓋及密封整個半導體晶片 10、第一部分樹脂 211、212、213、221、222 及 223、銲 線41、42及43、以及引線架主體20。該第二樹脂部分60 可包模塑樹脂或類似者,並藉由轉移模塑方法進行樹脂密 封。 323810 12 201236113 第一樹脂部分211、212、213、221、222及223係以 無銲線41、42及43變形或斷裂的狀態形成。藉由形成該 第一樹脂部分211、212、213、221、222及223固定該輝 線41、42及43的連接部分。藉由轉移模塑方法或類似者 形成該第二樹脂部分60,而無銲線41、42、43從所對應 之電極钱引線分離的情形’並進行樹脂密封。可以高生 產率提供一種高度可靠的半導體裝置。 第6A圖至第6F圖係顯示一種例示性的半導體裝置之 製造方法。 & 如第6A圖所示,藉由處理金屬板或類似者製備引線 架160。該引線架16Q可包含諸如銅或類⑼者的導電金屬 材料。 如第6B圖所示’以晶元貼附劑30(如銲料)將該半導 體晶片10固定在該引線架主體20。 如第6C圖所示,藉由鍀線接合進行連接。藉 41將間極電㈣11連接至該閘極引線2卜藉由銲線42 將源極電極墊12連接至該源極引線22。藉由銲線Μ將沒 極電極墊13連接至該汲極引線23。 如第⑽圖所示,藉由以第一樹脂部分21卜212、213、 =二覆蓋該銲線41、42及43的連接部分而將 = 以該第一樹脂部分211覆蓋介於該 閘極電極塾11及該銲線41之間的連接 脂部分221覆蓋介於該閘極引線21 Μ弟一樹 接部分。㈣ 323810 13 201236113 及該銲線42之間的連接部分。以該第一技 ^ 樹脂部分222覆蓋 介於該源極引線22及該銲線42之間的連接部八 £ = 一樹脂部分213覆蓋介於該没極電極/ 5 贷13及該銲線41之 間的連接部分。以該第一樹脂部分223覆蓋介於該 線23及該鏵線43之間的連接部分。&含在該第;:樹脂部 分21卜212、213、221、222及223 _的材料可為樹 料’如聚醯亞胺。例如,藉由喷霧樹脂材料(如聚醯亞胺θ), 並使用在欲形成該第一樹脂部分211、212、213、221、222 及2 2 3的區域中具有開口的蔭遮罩來形成該第一樹脂部分 21卜212、213、22卜222及223。或者是,可藉由使用分 配器或類似者來提供樹脂材料(如聚酿亞胺),而形成該第 一樹脂部分 211、212、213、221、222 及 223。 如第6E圖所示,藉由以第二樹脂部分6〇連同部分之 引線架160而覆蓋該半導體晶片1〇,從而將其固定。例如, 藉由轉移模塑方法形成該第二樹脂部分60,藉此固定該半 導體晶片10及該部分之引線架16〇。第二樹脂部分可 包含模塑樹脂’並可包含適用於高擊穿電壓的材料。該第 二樹脂部分60的屬性可與該第一樹脂部分211、212、213、 22卜222及223的屬性不同。該第一樹脂部分211、212、 213、221、222及223的材料可與該第二樹脂部分60的材 料不同。 如第6F圖所示,切割及移除連接該汲極引線23至該 閘極引線21的接合部分161。切割及移除連接該汲極引線 23至該源極引線22的接合部分162。如此,製造出半導體 323810 14 201236113 裝置。該閘極引線21及該源極引線可不連接該引線架主體 20,並可藉由該第二樹脂部分60的模塑樹脂固定。 第6A圖至第6F圖係顯示一種半導體裝置之製造方 法。製造該半導體晶片10的方法可實質上相同或相似於第 3A圖至第3F圖所示的方法。 第7圖係顯示一種例示性的電源電路。第8圖係顯示 一種例示性的高頻放大器。第7圖所示的電源電路及第8 圖所示的高頻放大器可包含第1圖或第5圖所示的半導體 裝置。 第7圖所示的電源電路460包含高電壓一次侧電路46卜 低電壓二次側電路462及介於一次側電路461及二次側電 路462之間的變壓器463。該一次侧電路461包含交流電源 464、橋式整流電路465及複數個(例如4個)開關元件466、 開關元件467等。該二次侧電路462包含複數個(例如3個) 開關元件468。在第7圖中,例如,第1圖所示的半導體 裝置可作為該一次側電路461的開關元件466及467。該一 次侧電路461的各開關元件466及467可為常閉的半導體 裝置。使用在該二次側電路462中的各開關元件468可為 包含矽的金屬-絕緣體-半導體場效電晶體(meta卜 insulator-semiconductor field-effect transistor ; MISFET)。 第8圖的高頻放大器470可用於手機基地台的功率放 大器。該高頻放大器470包含數位預失真電路471、混波 器472、功率放大器473及定向耦合器474。該數位預失真 323810 15 201236113 電路471補償輸入信號的非線性失真。該混波器472之一 者混合以交流電流信號補償非線性失真的輸入信號。該功 率放大器473放大與交流電流信號混合的輸入信號。在第 8圖中,該功率放大器473可包含第1圖所示之半導體裝 置。該定向耦合器474例如進行輸入信號及輸出信號的監 測。例如’基於開關的切換’其他的混波器472可將交流 電流信號與輸出信號混合,以及傳輸該混合信號至該數位 預失真電路471。 現在,根據上述優點,已描述本發明的實例實施例。 可理解,這些實例僅為本發明的說明。任何熟習此項技藝 之人士均可對上述實施例進行修飾與改變。 【圖式簡單說明】 第1圖係顯示一種例示性的半導體裝置; 第2圖係顯示半導體晶片的例示性之上表面; 第3A圖至第3E圖係顯示一種例示性的半導體晶片之 製造方法; 第4A圖至第4F圖係顯不·一種例示性的半導體裝置之 製造方法; 第5圖係顯示一種例示性的半導體褒置; 第6A圖至第6F圖係顯不一種例示性的半導體裝置之 製造方法; 第7圖係顯示一種例示性的電源電路;以及 第8圖係顯示一種例示性的高頻放大器。 【主要元件符號說明】 323810 201236113 10 半導體晶片 11 閘極電極墊 12 源極電極塾 13 汲極電極墊 20 引線架主體 21 閘極引線 22 源極引線 23 汲極引線 30 晶元貼附劑 41、 42、43 銲線 51 ' 52 > 53、211、212、 213、221、222、223 第一樹脂部分 60 第二樹脂部分 110 基板 121 電子傳遞層 122 間隔層 123 電子供應層 124 覆蓋層 131 閘極電極 132 源極電極 133 >及極電極 140 絕緣薄膜 160 引線架 161 、162 接合部分 460 電源供應電路 461 高電壓一次側電路 462 低電壓二次侧電路 463 變壓器 464 交流電源供應 465 橋式整流電路 466 、467、468 開關元件 470 1¾頻放大 471 數位預失真電路 472 混波器 473 功率放大器 474 定向搞合器 323810 17

Claims (1)

  1. 201236113 七、申請專利範圍: 1. 一種半導體裝置,係包括: 具有電極的半導體晶片.; 對應於該電極的引線; 將該電極連接至該引線的金屬線; 第一樹脂部分,係覆蓋該金屬線及該電極之間的連 接部分及該金屬線及該引線之間的連接部分;以及 第二樹脂部分,係覆蓋該金屬線、該第一樹脂部分 及該半導體晶片。 2. 如申請專利範圍第1項所述的半導體裝置,其中,以第 一樹脂部分覆蓋該金屬線。 3. 如申請專利範圍第1項所述的半導體裝置,其中,該金 屬線為銲線(bonding wire)或金屬帶(bonding ribbon)。 4. 如申請專利範圍第3項所述的半導體裝置,其中,該金 屬線包含選自由铭、金及銅所構成之群組的至少一種材 料。 5. 如申請專利範圍第1項所述的半導體裝置,其中,將半 導體晶片中所包含的電子裝置之電極連接該電極。 6. 如申請專利範圍第1項所述的半導體裝置,其中,該半 導體晶片包含電子裝置,該電子裝置具有包含氮化物半 導體之半導體層。 7. 如申請專利範圍第6所述的半導體裝置,其中,該氮化 物半導體包含第一組及第二組之至少其中一者,該第一 組包含GaN及AlGaN,而該第二組包含InAIN及InGaAIN。 323810 1 201236113 8. 如申請專利範圍第6所述的半導體裝置,其中,該電子 裝置為高電子遷移率電晶體(HEMT)。 9. 如申請專利範圍第1項所述的半導體裝置,其中,該電 極對應於複數個電極,且該引線對應於複數個引線,藉 由該金屬線,該複數個電極之各電極連接該複數個引線 中之對應的引線。 10. 如申請專利範圍第1項所述的半導體裝置,其中,包含 在該第一樹脂部分的樹脂材料實質上與包含在該第二 樹脂部分的樹脂材料不同。 11. 如申請專利範圍第1項所述的半導體裝置,其中,該第 一樹脂部分包含聚醯亞胺。 12. 如申請專利範圍第1項所述的半導體裝置,其中,該第 二樹脂部分包含模塑樹脂。 13. —種半導體裝置的製造方法,係包括: 在引線架上配置半導體晶片; 經由金屬線,將包含在該半導體晶片中的電極連接 至包含在該引線架中的引線; 以第一樹脂部分覆蓋該金屬線及該電極之間的連 接部分及該金屬線及該引線之間的連接部分;以及 以第二樹脂部分覆蓋該金屬線、該第一樹脂部分、 該半導體晶片及部分之該引線。 14. 如申請專利範圍第13項所述的製造方法,其中,以該 第一樹脂部分覆蓋該金屬線。 15. 如申請專利範圍第13項所述的製造方法,其中,該金 323810 2 201236113 屬線為焊線或金屬帶。 • 16.如申請專利範圍第13項所述的製造方法,復包括: * 以喷霧或分配器提供包含在第一樹脂部分中的材料。 17. 如申請專利範圍第13項所述的製造方法,復包括: 配置在欲形成該第一樹脂部分的區域具有開口的 遮罩; 在該遮罩上喷霧包含在該第一樹脂部分中的材 料,以在該開口區域形成第一樹脂部分。 18. 如申請專利範圍第13項所述的製造方法,其中,該第 一樹脂部分包含聚醢亞胺。 19. 一種電子電路,係包括: 一種半導體裝置,包含: 具有電極的半導體晶片, 對應於該電極的引線; 將該電極連接至該引線的金屬線; 第一樹脂部分,係至少覆蓋該金屬線及該電極之間 的連接部分以及該金屬線及該引線之間的連接部分;以 及 第二樹脂部分,覆蓋該金屬線、該第一樹脂部分及 該半導體晶片。 20. 如申請專利範圍第19項所述的電子電路,其中,該電 子電路為電源電路及高頻放大器之一者。 323810 3
TW101101191A 2011-02-23 2012-01-12 半導體裝置、半導體裝置的製造方法及電子電路 TWI456705B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011037533A JP2012174996A (ja) 2011-02-23 2011-02-23 半導体装置及び半導体装置の製造方法

Publications (2)

Publication Number Publication Date
TW201236113A true TW201236113A (en) 2012-09-01
TWI456705B TWI456705B (zh) 2014-10-11

Family

ID=46652018

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101101191A TWI456705B (zh) 2011-02-23 2012-01-12 半導體裝置、半導體裝置的製造方法及電子電路

Country Status (4)

Country Link
US (1) US20120211762A1 (zh)
JP (1) JP2012174996A (zh)
CN (1) CN102651351A (zh)
TW (1) TWI456705B (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014072225A (ja) * 2012-09-27 2014-04-21 Fujitsu Ltd 化合物半導体装置及びその製造方法
JP6211867B2 (ja) * 2013-09-24 2017-10-11 ルネサスエレクトロニクス株式会社 半導体装置
JP6520197B2 (ja) * 2015-02-20 2019-05-29 富士通株式会社 化合物半導体装置及びその製造方法
US10366905B2 (en) * 2015-12-11 2019-07-30 Rohm Co., Ltd. Semiconductor device
US10892319B2 (en) 2016-08-19 2021-01-12 Rohm Co., Ltd. Semiconductor device
CN109545697A (zh) * 2018-12-26 2019-03-29 桂林电子科技大学 半导体封装方法及半导体封装结构
JP6930680B2 (ja) 2019-03-25 2021-09-01 三菱電機株式会社 高周波半導体増幅器

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1982003727A1 (en) * 1981-04-21 1982-10-28 Seiichiro Aigoo Method of making a semiconductor device having a projecting,plated electrode
JPS59201447A (ja) * 1983-04-28 1984-11-15 Toshiba Corp 半導体装置
JP2741204B2 (ja) * 1988-02-17 1998-04-15 ローム 株式会社 半導体装置
US5173766A (en) * 1990-06-25 1992-12-22 Lsi Logic Corporation Semiconductor device package and method of making such a package
JPH05166871A (ja) * 1991-12-16 1993-07-02 Hitachi Ltd 半導体装置
KR100202668B1 (ko) * 1996-07-30 1999-07-01 구본준 크랙 방지를 위한 반도체 패키지와 그 제조방법 및 제조장치
JP3825197B2 (ja) * 1999-03-30 2006-09-20 ローム株式会社 半導体装置
US6700210B1 (en) * 1999-12-06 2004-03-02 Micron Technology, Inc. Electronic assemblies containing bow resistant semiconductor packages
JP2001358168A (ja) * 2000-06-12 2001-12-26 Nippon Steel Corp 半導体装置およびその製造方法
JP2004273788A (ja) * 2003-03-10 2004-09-30 Denso Corp 電子装置の製造方法
JP4319591B2 (ja) * 2004-07-15 2009-08-26 株式会社日立製作所 半導体パワーモジュール
DE102005025465B4 (de) * 2005-05-31 2008-02-21 Infineon Technologies Ag Halbleiterbauteil mit Korrosionsschutzschicht und Verfahren zur Herstellung desselben
KR101185479B1 (ko) * 2005-08-24 2012-10-02 후지쯔 세미컨덕터 가부시키가이샤 반도체 장치 및 그 제조 방법
DE102005047856B4 (de) * 2005-10-05 2007-09-06 Infineon Technologies Ag Halbleiterbauteil mit in Kunststoffgehäusemasse eingebetteten Halbleiterbauteilkomponenten, Systemträger zur Aufnahme der Halbleiterbauteilkomponenten und Verfahren zur Herstellung des Systemträgers und von Halbleiterbauteilen
DE102005061248B4 (de) * 2005-12-20 2007-09-20 Infineon Technologies Ag Systemträger mit in Kunststoffmasse einzubettenden Oberflächen, Verfahren zur Herstellung eines Systemträgers und Verwendung einer Schicht als Haftvermittlerschicht
US8354688B2 (en) * 2008-03-25 2013-01-15 Bridge Semiconductor Corporation Semiconductor chip assembly with bump/base/ledge heat spreader, dual adhesives and cavity in bump
JP2010027734A (ja) * 2008-07-16 2010-02-04 Rohm Co Ltd 窒化物半導体装置
US20100164083A1 (en) * 2008-12-29 2010-07-01 Numonyx B.V. Protective thin film coating in chip packaging

Also Published As

Publication number Publication date
US20120211762A1 (en) 2012-08-23
TWI456705B (zh) 2014-10-11
CN102651351A (zh) 2012-08-29
JP2012174996A (ja) 2012-09-10

Similar Documents

Publication Publication Date Title
JP6179266B2 (ja) 半導体装置及び半導体装置の製造方法
JP5784440B2 (ja) 半導体装置の製造方法及び半導体装置
TWI542008B (zh) 半導體裝置
US9054170B2 (en) Semiconductor device, method for manufacturing the same, power supply, and high-frequency amplifier
US8633494B2 (en) Semiconductor device and method for manufacturing semiconductor device
KR101358489B1 (ko) 반도체 장치 및 반도체 장치의 제조 방법
US9231095B2 (en) Method for manufacturing semiconductor device
CN103367420B (zh) 化合物半导体器件及其制造方法
TW201236113A (en) Semiconductor device, method of manufacturing semiconductor device and electronic circuit
JP6575304B2 (ja) 半導体装置、電源装置、増幅器及び半導体装置の製造方法
KR20130033956A (ko) 반도체 장치 및 반도체 장치의 제조 방법
JP6877896B2 (ja) 半導体装置及び半導体装置の製造方法
US10964805B2 (en) Compound semiconductor device
TWI550857B (zh) 化合物半導體裝置及其製造方法
JP6252122B2 (ja) 半導体装置及び半導体装置の製造方法
JP2020113625A (ja) 半導体装置、半導体装置の製造方法及び増幅器
JP2014146646A (ja) 半導体装置
JP2020088104A (ja) 半導体装置、半導体装置の製造方法、電源装置及び増幅器
JP7103145B2 (ja) 半導体装置、半導体装置の製造方法、電源装置及び増幅器
JP7102796B2 (ja) 半導体装置及び半導体装置の製造方法
JP6187167B2 (ja) 化合物半導体装置及びその製造方法
JP6561559B2 (ja) 半導体装置及び半導体装置の製造方法
JP2021027151A (ja) 半導体装置、半導体装置の製造方法及び増幅器

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees