CN102651351A - 半导体器件、半导体器件的制造方法和电子电路 - Google Patents
半导体器件、半导体器件的制造方法和电子电路 Download PDFInfo
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- CN102651351A CN102651351A CN2012100164290A CN201210016429A CN102651351A CN 102651351 A CN102651351 A CN 102651351A CN 2012100164290 A CN2012100164290 A CN 2012100164290A CN 201210016429 A CN201210016429 A CN 201210016429A CN 102651351 A CN102651351 A CN 102651351A
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Abstract
本发明提供一种半导体器件,其包括:具有电极的半导体芯片;与所述电极对应的引线;将所述电极耦接到所述引线的金属线;覆盖所述金属线与所述电极之间的耦接部分以及所述金属线与所述引线之间的耦接部分的第一树脂部分;和覆盖所述金属线、所述第一树脂部分和所述半导体芯片的第二树脂部分。本发明还提供一种制造半导体器件的方法。
Description
对相关申请的交叉引用
本申请要求2011年2月23日提交的日本专利申请号2011-37533的优先权权益,所述申请的全文内容通过引用并入本文。
技术领域
本文讨论的实施方案涉及半导体器件以及半导体器件的制造方法。
发明背景
氮化物半导体中包含的GaN、AlN和InN,以及包含这些氮化物半导体的混合晶体的材料具有宽的带隙,并且用于高输出电子器件、短波长发光器件等。场效应晶体管(FETs)如高电子迁移率晶体管(HEMTs)用于高输出电子器件中。包含氮化物半导体的HEMTs用于高输出和高效放大器、大功率开关器件等当中。在包含用作电子供给层的AlGaN和用作电子传输层的GaN的HEMT中,因AlGaN与GaN之间的晶格常数差引起的失真在AlGaN中导致压电极化。相应地,生成高浓度二维电子气,并由此可改善HEMT的特性。
用于包含氮化物半导体的HEMT的GaN的带隙可以为3.4eV,其大于Si的带隙(即1.1eV)以及GaAs的带隙(即1.4eV)。因此,HEMT可在高电压操作。形成在这样的HEMT的半导体衬底表面上的栅电极、源电极和漏电极经由线接合连接到引线框等。
例如,日本特许公开专利公报No.2010-21347公开了相关技术。
将高压施加到例如在高电压操作的高击穿电压功率器件的电极。因此,高压电流流过接合线,用于施加电压到电极。当相邻接合线之间的距离减小时,漏电流可因接合线之间的电势差增加而增加。
当以用于高冲击电压的成型树脂(具有高粘度的成型树脂)进行密封时,接合线被施加到成型树脂的力挤压,并且接合线的形状可以改变。因此,相邻接合线之间的距离可减小。另外,接合线被施加到成型树脂的力挤压,并且可从诸如电极的耦接部分脱落。
随着低阻接合线的实现,接合线的材料可包含铜。当接合线的材料包含铜时,铜与其它材料可能因利用成型树脂材料的密封不提供足够的防湿性而被氧化。
发明内容
根据实施方案的一个方面,半导体器件包含:具有电极的半导体芯片;与所述电极对应的引线;将所述电极耦接到所述引线的金属线;覆盖所述金属线与所述电极之间的耦接部分以及在所述金属线与所述引线之间的耦接部分的第一树脂部分;和覆盖所述金属线、所述第一树脂部分和所述半导体芯片的第二树脂部分。
根据所述半导体器件,所述耦接部分通过形成所述第一树脂部分来固定,并且形成所述第二树脂部分用于树脂密封。可以以高收率提供高度可靠的半导体器件。
本发明的额外优点和新颖特征的一部分将在随后的具体实施方式部分阐述,并且一部分将在查阅下文之后或通过实践本发明的学习之后而对于本领域技术人员变得更明显。
附图说明
图1示出一种示例性半导体器件;
图2示出半导体芯片的一个示例性顶表面;
图3A到3E示出一种用于制造半导体芯片的示例性方法;
图4A到4F示出一种用于制造半导体芯片的示例性方法;
图5示出一种示例性半导体器件;
图6A到6F示出一种制造半导体器件的示例性方法;
图7示出一种示例性供电电路;和
图8示出一种示例性高频放大器。
具体实施方式
基本上相同的部件、相似的部件等指定为相同的附图标记,并且那些部件的描述可以省略或缩减。
图1示出一种示例性半导体器件。该半导体器件可包括半导体芯片,其上形成有分立封装的HEMT晶体管。
在图1中,半导体芯片10用诸如焊料的芯片附接剂30固定在引线框主体20上。半导体芯片10可为包含基于GaN的材料的HEMT。图2示出半导体芯片的一个示例性顶表面。图2中示出的半导体芯片可为图1中示出的半导体芯片。在图2中,包含诸如Al、Au或Cu的金属材料的栅电极极板11、源电极极板12和漏电极极板13形成在半导体芯片10的表面上。
栅电极极板11用接合线41耦接到栅极引线21。源电极极板12用接合线42耦接到源极引线22。漏电极极板13用接合线43耦接到漏极引线23。接合线41、42和43可为金属线,并且可包含诸如Al、Au或Cu的金属材料。
接合线41在从栅电极极板11与接合线41之间的耦接部分延伸到栅极引线21与接合线41之间的耦接部分的区域中用第一树脂部分51覆盖。接合线42在从源电极极板12与接合线42之间的耦接部分延伸到源极引线22与接合线42之间的耦接部分的区域中用第一树脂部分52覆盖。接合线43在从漏电极极板13与接合线43之间的耦接部分延伸到漏极引线23与接合线43之间的耦接部分的区域中用第一树脂部分53覆盖。第一树脂部分51、52和53包含诸如聚酰亚胺的树脂材料。第一树脂部分51、52和53通过例如喷涂树脂材料来形成。因此,接合线41、42和43的变形等可以减少。包含诸如聚酰亚胺的树脂材料的第一树脂部分51、52和53的防湿性高于成型树脂的防湿性。
半导体芯片10,分别覆盖有第一树脂部分51、52和53的接合线41、42和43,引线框主体20,栅极引线21的一部分,源极引线22的一部分,以及漏极引线23的一部分均覆盖有第二树脂部分60。第二树脂部分60包含成型树脂等。树脂密封可通过转移成型法来进行。
在半导体器件中,在接合线41、42和43等分别用第一树脂部分51、52和53覆盖之后,第一树脂部分用第二树脂部分60覆盖。当通过转移成型法等进行树脂密封时,接合线41、42和43的变形、断开等可因为接合线41、42和43分别用第一树脂部分51、52和53覆盖而得以减少。
诸如成型树脂的树脂材料可能不具有足够的防湿性。形成包含具有高防湿性的树脂材料如聚酰亚胺的第一树脂部分51、52和53,由此减少来自外部的湿气入侵。包含在接合线41、42和43中的Cu等的氧化或腐蚀可得以减少。
作为金属线,可使用为金属丝的接合线41、42和43。或者,可使用金属带等代替金属丝。
图3A到3E示出制造半导体芯片的示例性方法。图3A到3E中示出的半导体芯片可为图1或2中示出的半导体芯片。
如图3A所示,包含例如电子传输层121、间隔层122、电子供给层123和帽层124的半导体层通过诸如金属有机气相外延(MOVPE)的外延生长形成在衬底110上。衬底110可包含Si、SiC、蓝宝石(Al2O3)等。用于外延生长电子传输层121及其它层的缓冲层(未示出)形成在衬底110上。缓冲层可为例如具有0.1μm厚度的未掺杂i-AlN层。电子传输层121可为具有3μm厚度的未掺杂i-GaN层。间隔层122可为具有5nm厚度的未掺杂i-AlGaN层。电子供给层123可为具有30nm厚度并以5×1018cm-3的浓度掺杂有作为杂质元素的Si的n-Al0.25Ga0.75N层。帽层124可为具有10nm厚度并以5×1018cm-3的浓度掺杂有作为杂质元素的Si的n-GaN层。
如图3B中所示,移除待形成源电极132和漏电极133的区域中的帽层124,以使电子供给层123在该区域暴露。例如,将光刻胶施加到帽层124的表面上。光刻胶通过曝光装置曝光,并随后显影以在待形成源电极132和漏电极133的区域中形成具有开口的光刻胶图案(未示出)。光刻胶图案(未示出)开口中的帽层124利用基于氯的气体通过诸如反应离子蚀刻(RIE)的干蚀刻移除。光刻胶图案(未示出)通过有机溶剂等移除。由此,在待形成源电极132和漏电极133的区域中移除帽层124,并且在该区域中暴露电子供给层123。
如图3C中所示,源电极132和漏电极133形成在通过移除帽层124所暴露的电子供给层123的区域中。例如,将光刻胶施加到其上形成帽层124的表面上。光刻胶通过曝光装置曝光,并随后显影,以在待形成源电极132和漏电极133的区域中形成具有开口的光刻胶图案(未示出)。金属膜,例如具有约20nm厚度的Ta膜以及具有约200nm厚度的Al膜通过真空沉积等形成在整个表面上。沉积在光刻胶图案上的金属膜随后通过利用有机溶剂通过剥离移除。源电极132和漏电极133利用金属膜形成在未形成光刻胶图案的区域中。由于沉积的金属膜例如Ta膜与电子供给层123接触,所以通过在氮气氛中于400℃至700℃范围的温度如550℃进行热处理而在源电极132和漏电极133之间建立欧姆接触。当在没有热处理的情况下建立欧姆接触时,可不进行热处理。
如图3D中所示,与栅极绝缘膜对应的绝缘膜140形成在帽层124上。例如,绝缘膜140可包含氧化铝(Al2O3)。例如,具有约10nm厚度的绝缘膜140在300℃的衬底温度下使用三甲基铝(TMA)和纯水(H2O)通过原子层沉积(ALD)来沉积。
如图3E中所示,栅电极131形成在绝缘膜140上的某个区域中。例如,将光刻胶施加到其上形成绝缘膜140的表面上。光刻胶通过曝光装置曝光,并随后显影以在待形成栅电极131的区域中形成具有开口的光刻胶图案(未示出)。金属膜例如具有约40nm厚度的Ni膜和具有约400nm厚度的Au膜通过真空沉积形成在整个表面上。沉积在光刻胶图案上的金属膜随后利用有机溶剂通过剥离移除。栅电极131利用金属膜形成在未形成光刻胶图案的区域中。作为金属膜的Ni膜形成在绝缘膜140上,并且根据需要随后可进行热处理等。
形成保护膜等。如图2中所示,形成耦接到栅电极131的栅电极极板11,耦接到源电极132的源电极极板12,以及耦接到漏电极133的漏电极极板13。栅电极131可包括栅电极极板11,源电极132可包括源电极极板12,并且漏电极133可包括漏电极极板13。由此形成半导体芯片10。
可形成具有包含GaN或AlGaN的半导体层的半导体芯片10。或者,可形成具有包含InAlN或InGaAlN的半导体层的半导体芯片。在包含在高压下操作的晶体管以及其他组件的电子器件中,半导体层可包含Si、GaAs、SiC、C等。
图4A到4F示出制造半导体器件的一个示例性方法。
如图4A中所示,引线框160通过加工金属片材等来制备。引线框160可包含包括铜等的导电性金属材料。引线框160包括引线框主体20(其上固定有半导体芯片10)、栅极引线21、源极引线22和漏极引线23。漏极引线23耦接到引线框主体20。栅极引线21用它与漏极引线23之间的接合部分161而耦接到漏极引线23的一侧。源极引线22用它与漏极引线23之间的接合部分162而耦接到漏极引线23的另一侧。
如图4B中所示,半导体芯片10用诸如焊料的芯片附接剂30固定到引线框主体20。
如图4C中所示,通过线接合来进行连接。栅电极极板11用接合线41耦接到栅极引线21。源电极极板12用接合线42耦接到源极引线22。漏电极极板13用接合线43耦接到漏极引线23。接合线41、42和43中包含的材料可与栅电极极板11、源电极极板12或漏电极极板13中包含的材料基本上相同或相似。
如图4D中所示,接合线41、42和43通过分别用第一树脂部分51、52和53覆盖来固定。例如,接合线41在从栅电极极板11与接合线31之间的耦接部分延伸到栅极引线21与接合线41之间的耦接部分的区域中用第一树脂部分51覆盖。接合线42在从源电极极板12与接合线42之间的耦接部分延伸到源极引线22与接合线42之间的耦接部分的区域中用第一树脂部分52覆盖。接合线43在从漏电极极板13与接合线43之间的耦接部分延伸到漏极引线23与接合线43之间的耦接部分的区域中用第一树脂部分53覆盖。第一树脂部分51、52和53中包含的材料可为聚酰亚胺等等。第一树脂部分51、52和53通过利用在待形成第一树脂部分51、52和53的区域中具有开口的阴影掩模喷涂诸如聚酰亚胺的树脂材料来形成。或者,第一树脂部分51、52和53可通过使用分配器等供给诸如聚酰亚胺的树脂材料来形成。
如图4E中所示,半导体芯片10以及引线框160的一部分通过用第二树脂部分60覆盖来固定。例如,第二树脂部分60通过转移成型法来形成。第二树脂部分60可包含成型树脂,并且可包含适用于高击穿电压的材料。第二树脂部分60的性质可与第一树脂部分51、52和53的性质不同。第一树脂部分51、52和53的材料可与第二树脂部分60的材料不同。
如图4F中所示,切割并移除将漏极引线23耦接到栅极引线21的接合部分161。切割并移除将漏极引线23耦接到源极引线22的接合部分162。由此,制得半导体器件。栅极引线21和源极引线22可不被耦接到引线框主体20,并且可通过第二树脂部分60中包含的成型树脂固定。
第二树脂部分60可包含成型树脂,并且可包含其它材料等。
图5示出一种示例性半导体器件。半导体器件可包括其上形成分立封装的HEMT晶体管的半导体芯片。半导体芯片可为图1中示出的半导体芯片10。图5示出其中第二树脂部分60的表面的一部分被移除的状态。
半导体芯片10用诸如焊料的芯片附接剂30固定在引线框主体20上。半导体芯片10可为包含基于GaN的材料的HEMT。
栅电极极板11与接合线41之间的耦接部分用第一树脂部分211覆盖。栅极引线21与接合线41之间的耦接部分用第一树脂部分221覆盖。源电极极板12与接合线42之间的耦接部分用第一树脂部分212覆盖。源极引线22与接合线42之间的耦接部分用第一树脂部分222覆盖。漏电极极板13与接合线43之间的耦接部分用第一树脂部分213覆盖。漏极引线23与接合线43之间的耦接部分用第一树脂部分223覆盖。第一树脂部分211、212、213、221、222和223包含诸如聚酰亚胺的树脂材料,并且通过例如喷涂树脂材料来形成。
整个半导体芯片10,第一树脂部分211、212、213、221、222和223,接合线41、42和43,以及引线框主体20用第二树脂部分60覆盖并密封。第二树脂部分60可包含成型树脂等,并且树脂密封可通过转移成型方法来进行。
形成第一树脂部分211、212、213、221、222和223而没有接合线41、42和43的变形或断开。接合线41、42和43的耦接部分通过形成第一树脂部分211、212、213、221、222和223来固定。第二树脂部分60通过转移成型法等形成,而没有接合线41、42或43从相应的电极极板或引线脱离,并且进行树脂密封。可以高产率提供高度可靠的半导体器件。
图6A到6F示出一种制造半导体器件的示例性方法。
如图6A中所示,引线框160通过加工金属片材等来制备。引线框160可包含包括铜等的导电性金属材料。
如图6B中所示,半导体芯片10用诸如焊料的芯片附接剂30固定到引线框主体20。
如图6C中所示,耦接通过线接合来进行。栅电极极板11用接合线41耦接到栅极引线21。源电极极板12用接合线42耦接到源极引线22。漏电极极板13用接合线43耦接到漏极引线23。
如图6D中所示,接合线41、42和43的耦接部分通过用第一树脂部分211、212、213、221、222和223覆盖来固定。例如,栅电极极板11与接合线41之间的耦接部分用第一树脂部分211覆盖。栅极引线21与接合线41之间的耦接部分用第一树脂部分221覆盖。源电极极板12与接合线42之间的耦接部分用第一树脂部分212覆盖。源极引线22与接合线42之间的耦接部分用第一树脂部分222覆盖。漏电极极板13与接合线43之间的耦接部分用第一树脂部分213覆盖。漏极引线23与接合线43之间的耦接部分用第一树脂部分223覆盖。第一树脂部分211、212、213、221、222和223中包含的材料可为诸如聚酰亚胺的树脂材料。例如,第一树脂部分通过利用在其中待形成第一树脂部分211、212、213、221、222和223的区域中具有开口的阴影掩模喷涂诸如聚酰亚胺的树脂材料来形成。或者,第一树脂部分211、212、213、221、222和223可通过使用分配器等供给诸如聚酰亚胺的树脂材料来形成。
如图6E中所示,固定在引线框160上的半导体芯片10以及引线框160的一部分通过用第二树脂部分60覆盖来固定。例如,半导体芯片10和引线框160的一部分通过由转移成型方法形成的第二树脂部分60固定。第二树脂部分60可包含成型树脂,并且可包含适用于高击穿电压的材料。第二树脂部分60的性质可与第一树脂部分211、212、213、221、222和223的性质不同。第一树脂部分211、212、213、221、222和223的材料可与第二树脂部分60的材料不同。
如图6F中所示,切割并移除将漏极引线23耦接到栅极引线21的接合部分161。切割并移除将漏极引线23耦接到源极引线22的接合部分162。由此,制得半导体器件。栅极引线21和源极引线22可不耦接到引线框主体20,并且可通过作为第二树脂部分60的成型树脂来固定。
半导体器件通过图6A到6F中示出的方法来构造。用于构造半导体芯片10的方法可与图3A到3E中示出的方法基本上相同或相似。
图7示出一种示例性供电电路。图8示出一种示例性高频放大器。图7中示出的供电电路和图8中示出的高频放大器可包括图1或5中示出的半导体器件。
图7中示出的供电电路460包括高压初级侧电路461、低压次级侧电路462和在初级侧电路461与次级侧电路462之间提供的变压器463。初级侧电路461包括AC电源464、桥式整流电路465,以及多个,例如四个开关元件466、开关元件467等。次级侧电路462包含多个,例如三个开关元件468。在图7中,例如,在图1中示出的半导体器件可用作初级侧电路461的开关元件466和467。初级侧电路461的开关元件466和467每个可为常闭型半导体器件。次级侧电路462中使用的开关元件468每个可为包含硅的金属绝缘体-半导体场效应晶体管(MISFET)。
图8中示出的高频放大器470可用在用于移动电话基站的功率放大器中。高频放大器470包括数字预失真电路471、混频器472、功率放大器473和定向耦合器474。数字预失真电路471补偿输入信号中的非线性失真。混频器472的一个将其中待补偿非线性失真输入信号与交流信号混合。功率放大器473将与交流信号混频的输入信号放大。在图8中,功率放大器473可包括图1中示出的半导体器件。定向耦合器474执行例如输入信号和输出信号的监测。例如,基于开关的切换,另一混频器472可将输出信号与交流信号混频,并将混频信号传输到数字预失真电路471。
上文已经根据上述优点描述了本发明的示例实施方案。将认识到,这些实施例仅是对本发明的举例说明。许多变化与修改对于本领域技术人员是明显的。
Claims (20)
1.一种半导体器件,包括:
具有电极的半导体芯片;
与所述电极对应的引线;
将所述电极耦接到所述引线的金属线;
覆盖所述金属线与所述电极之间的耦接部分以及所述金属线与所述引线之间的耦接部分的第一树脂部分;和
覆盖所述金属线、所述第一树脂部分和所述半导体芯片的第二树脂部分。
2.根据权利要求1所述的半导体器件,其中所述金属线用所述第一树脂部分来覆盖。
3.根据权利要求1所述的半导体器件,其中所述金属线是接合线或金属带。
4.根据权利要求3所述的半导体器件,其中所述金属线包含选自Al、Au和Cu中的至少一种材料。
5.根据权利要求1所述的半导体器件,其中所述电极耦接到包含在所述半导体芯片中的电子器件的电极。
6.根据权利要求1所述的半导体器件,其中所述半导体芯片包括电子器件,所述电子器件具有包含氮化物半导体的半导体层。
7.根据权利要求6所述的半导体器件,其中所述氮化物半导体包含第一组和第二组中的至少其一,所述第一组包括GaN和AlGaN,并且所述第二组包括InAlN和InGaAlN。
8.根据权利要求6所述的半导体器件,其中所述电子器件是高电子迁移率晶体管(HEMT)。
9.根据权利要求1所述的半导体器件,
其中所述电极与多个所述电极对应,并且所述引线与多个所述引线对应,并且
所述多个电极的每一个均通过所述金属线耦接到包含在所述多个引线中的对应引线。
10.根据权利要求1所述的半导体器件,其中在所述第一树脂部分中包含的树脂材料与在所述第二树脂部分中包含的树脂材料基本上不同。
11.根据权利要求1所述的半导体器件,其中所述第一树脂部分包含聚酰亚胺。
12.根据权利要求1所述的半导体器件,其中所述第二树脂部分包含成型树脂。
13.一种制造半导体器件的方法,所述方法包括:
将半导体芯片布置在引线框上;
将在所述半导体芯片中包含的电极经由金属线耦接到在所述引线框中包含的引线;
用第一树脂部分来覆盖所述金属线与所述电极之间的耦接部分以及所述金属线与所述引线之间的耦接部分;和
用第二树脂部分来覆盖所述金属线、所述第一树脂部分、所述半导体芯片、以及所述引线的一部分。
14.根据权利要求13所述的方法,其中所述金属线用所述第一树脂部分来覆盖。
15.根据权利要求13所述的方法,其中所述金属线是接合线或金属带。
16.根据权利要求13所述的方法,还包括:
用喷雾器或分配器供给所述第一树脂部分中包含的材料。
17.根据权利要求13所述的方法,还包括:
将具有开口的掩模布置在其中待形成所述第一树脂部分的区域中;和
将所述第一树脂部分中包含的材料喷涂在所述掩模上,以在所述开口的所述区域中形成所述第一树脂部分。
18.根据权利要求13所述的方法,其中所述第一树脂部分包含聚酰亚胺。
19.一种电子电路,包括:
半导体器件,所述半导体器件包括:
具有电极的半导体芯片;
与所述电极对应的引线;
将所述电极耦接到所述引线的金属线;
至少覆盖在所述金属线与所述电极之间的耦接部分以及在所述金属线与所述引线之间的耦接部分的第一树脂部分;和
覆盖所述金属线、所述第一树脂部分和所述半导体芯片的第二树脂部分。
20.根据权利要求19所述的电子电路,其中所述电子电路是供电电路和高频放大器中的一种。
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JP2011037533A JP2012174996A (ja) | 2011-02-23 | 2011-02-23 | 半導体装置及び半導体装置の製造方法 |
JP2011-037533 | 2011-02-23 |
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Publication number | Priority date | Publication date | Assignee | Title |
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CN109545697A (zh) * | 2018-12-26 | 2019-03-29 | 桂林电子科技大学 | 半导体封装方法及半导体封装结构 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014072225A (ja) * | 2012-09-27 | 2014-04-21 | Fujitsu Ltd | 化合物半導体装置及びその製造方法 |
JP6211867B2 (ja) * | 2013-09-24 | 2017-10-11 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6520197B2 (ja) * | 2015-02-20 | 2019-05-29 | 富士通株式会社 | 化合物半導体装置及びその製造方法 |
US10366905B2 (en) * | 2015-12-11 | 2019-07-30 | Rohm Co., Ltd. | Semiconductor device |
CN109643728B (zh) | 2016-08-19 | 2022-04-29 | 罗姆股份有限公司 | 半导体装置 |
US11979117B2 (en) | 2019-03-25 | 2024-05-07 | Mitsubishi Electric Corporation | High frequency semiconductor amplifier |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59201447A (ja) * | 1983-04-28 | 1984-11-15 | Toshiba Corp | 半導体装置 |
US6700210B1 (en) * | 1999-12-06 | 2004-03-02 | Micron Technology, Inc. | Electronic assemblies containing bow resistant semiconductor packages |
CN101248526A (zh) * | 2005-08-24 | 2008-08-20 | 富士通株式会社 | 半导体器件及其制造方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1982003727A1 (en) * | 1981-04-21 | 1982-10-28 | Seiichiro Aigoo | Method of making a semiconductor device having a projecting,plated electrode |
JP2741204B2 (ja) * | 1988-02-17 | 1998-04-15 | ローム 株式会社 | 半導体装置 |
US5173766A (en) * | 1990-06-25 | 1992-12-22 | Lsi Logic Corporation | Semiconductor device package and method of making such a package |
JPH05166871A (ja) * | 1991-12-16 | 1993-07-02 | Hitachi Ltd | 半導体装置 |
KR100202668B1 (ko) * | 1996-07-30 | 1999-07-01 | 구본준 | 크랙 방지를 위한 반도체 패키지와 그 제조방법 및 제조장치 |
JP3825197B2 (ja) * | 1999-03-30 | 2006-09-20 | ローム株式会社 | 半導体装置 |
JP2001358168A (ja) * | 2000-06-12 | 2001-12-26 | Nippon Steel Corp | 半導体装置およびその製造方法 |
JP2004273788A (ja) * | 2003-03-10 | 2004-09-30 | Denso Corp | 電子装置の製造方法 |
JP4319591B2 (ja) * | 2004-07-15 | 2009-08-26 | 株式会社日立製作所 | 半導体パワーモジュール |
DE102005025465B4 (de) * | 2005-05-31 | 2008-02-21 | Infineon Technologies Ag | Halbleiterbauteil mit Korrosionsschutzschicht und Verfahren zur Herstellung desselben |
DE102005047856B4 (de) * | 2005-10-05 | 2007-09-06 | Infineon Technologies Ag | Halbleiterbauteil mit in Kunststoffgehäusemasse eingebetteten Halbleiterbauteilkomponenten, Systemträger zur Aufnahme der Halbleiterbauteilkomponenten und Verfahren zur Herstellung des Systemträgers und von Halbleiterbauteilen |
DE102005061248B4 (de) * | 2005-12-20 | 2007-09-20 | Infineon Technologies Ag | Systemträger mit in Kunststoffmasse einzubettenden Oberflächen, Verfahren zur Herstellung eines Systemträgers und Verwendung einer Schicht als Haftvermittlerschicht |
US8354688B2 (en) * | 2008-03-25 | 2013-01-15 | Bridge Semiconductor Corporation | Semiconductor chip assembly with bump/base/ledge heat spreader, dual adhesives and cavity in bump |
JP2010027734A (ja) * | 2008-07-16 | 2010-02-04 | Rohm Co Ltd | 窒化物半導体装置 |
US20100164083A1 (en) * | 2008-12-29 | 2010-07-01 | Numonyx B.V. | Protective thin film coating in chip packaging |
-
2011
- 2011-02-23 JP JP2011037533A patent/JP2012174996A/ja active Pending
- 2011-12-22 US US13/334,766 patent/US20120211762A1/en not_active Abandoned
-
2012
- 2012-01-12 TW TW101101191A patent/TWI456705B/zh not_active IP Right Cessation
- 2012-01-18 CN CN2012100164290A patent/CN102651351A/zh active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59201447A (ja) * | 1983-04-28 | 1984-11-15 | Toshiba Corp | 半導体装置 |
US6700210B1 (en) * | 1999-12-06 | 2004-03-02 | Micron Technology, Inc. | Electronic assemblies containing bow resistant semiconductor packages |
CN101248526A (zh) * | 2005-08-24 | 2008-08-20 | 富士通株式会社 | 半导体器件及其制造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109545697A (zh) * | 2018-12-26 | 2019-03-29 | 桂林电子科技大学 | 半导体封装方法及半导体封装结构 |
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US20120211762A1 (en) | 2012-08-23 |
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