TW201101695A - Digital phase-locked loop with two-point modulation and adaptive delay matching - Google Patents

Digital phase-locked loop with two-point modulation and adaptive delay matching Download PDF

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Publication number
TW201101695A
TW201101695A TW098142189A TW98142189A TW201101695A TW 201101695 A TW201101695 A TW 201101695A TW 098142189 A TW098142189 A TW 098142189A TW 98142189 A TW98142189 A TW 98142189A TW 201101695 A TW201101695 A TW 201101695A
Authority
TW
Taiwan
Prior art keywords
modulation
delay
path
modulation path
dpll
Prior art date
Application number
TW098142189A
Other languages
English (en)
Chinese (zh)
Inventor
Ji-Feng Geng
Gary John Ballantyne
Daniel F Filipovic
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of TW201101695A publication Critical patent/TW201101695A/zh

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0916Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
    • H03C3/0925Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop applying frequency modulation at the divider in the feedback loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0916Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
    • H03C3/0933Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop using fractional frequency division in the feedback loop of the phase locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0941Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation at more than one point in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/095Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation to the loop in front of the voltage controlled oscillator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0966Modifications of modulator for regulating the mean frequency using a phase locked loop modulating the reference clock
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
TW098142189A 2008-12-09 2009-12-09 Digital phase-locked loop with two-point modulation and adaptive delay matching TW201101695A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/330,885 US7868672B2 (en) 2008-12-09 2008-12-09 Digital phase-locked loop with two-point modulation and adaptive delay matching

Publications (1)

Publication Number Publication Date
TW201101695A true TW201101695A (en) 2011-01-01

Family

ID=42230378

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098142189A TW201101695A (en) 2008-12-09 2009-12-09 Digital phase-locked loop with two-point modulation and adaptive delay matching

Country Status (7)

Country Link
US (1) US7868672B2 (ja)
EP (1) EP2374209B1 (ja)
JP (1) JP5571098B2 (ja)
KR (1) KR101304367B1 (ja)
CN (1) CN102273066B (ja)
TW (1) TW201101695A (ja)
WO (1) WO2010068679A2 (ja)

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US9484859B2 (en) * 2014-11-05 2016-11-01 Mediatek Inc. Modulation circuit and operating method thereof
KR102210324B1 (ko) 2014-12-03 2021-02-01 삼성전자주식회사 디지털 위상 고정 루프 및 그 동작방법
US9209815B1 (en) * 2014-12-22 2015-12-08 Opel Solar, Inc. Thyristor-based optical charge pump for an optical phase lock loop
CN107342738A (zh) * 2015-08-26 2017-11-10 深圳清华大学研究院 支持高数据率的两点调制器
US9819479B2 (en) * 2015-09-29 2017-11-14 Intel IP Corporation Digitally controlled two-points edge interpolator
US9832011B1 (en) * 2016-06-30 2017-11-28 Intel IP Corporation Performance indicator for phase locked loops
CN107968687B (zh) * 2016-10-20 2021-08-24 国民技术股份有限公司 一种两点调制发射机校准电路及校准方法
US10056912B1 (en) * 2017-02-23 2018-08-21 Avago Technologies General Ip (Singapore) Pte. Ltd. Simultaneous cancellation of multiple spurs from different sources
CN108134754B (zh) * 2018-01-09 2019-02-01 西安科技大学 一种吉比特连续可变速率的中频差分解调器
CN110474639B (zh) * 2019-08-07 2022-10-11 上海东软载波微电子有限公司 两点调制器及其控制方法、dac增益校准方法及装置
KR20220032365A (ko) 2020-09-07 2022-03-15 삼성전자주식회사 위상 고정 루프 및 이를 포함하는 전자 장치
KR102470031B1 (ko) * 2020-11-26 2022-11-23 한국전자기술연구원 고속 광대역 fmcw 주파수 변조기 및 그 비선형성 보상 방법

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EP0718963A1 (en) * 1994-12-22 1996-06-26 AT&T Corp. Method and apparatus for broadband frequency modulation of a phase-locked frequency synthesizer
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Also Published As

Publication number Publication date
WO2010068679A2 (en) 2010-06-17
JP5571098B2 (ja) 2014-08-13
CN102273066A (zh) 2011-12-07
EP2374209B1 (en) 2016-08-17
WO2010068679A3 (en) 2011-02-17
JP2012511881A (ja) 2012-05-24
CN102273066B (zh) 2014-12-10
US20100141313A1 (en) 2010-06-10
KR101304367B1 (ko) 2013-09-11
EP2374209A2 (en) 2011-10-12
KR20110094220A (ko) 2011-08-22
US7868672B2 (en) 2011-01-11

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