TW200948749A - Metallization processing method of ceramic substrate - Google Patents

Metallization processing method of ceramic substrate Download PDF

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Publication number
TW200948749A
TW200948749A TW098108995A TW98108995A TW200948749A TW 200948749 A TW200948749 A TW 200948749A TW 098108995 A TW098108995 A TW 098108995A TW 98108995 A TW98108995 A TW 98108995A TW 200948749 A TW200948749 A TW 200948749A
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Taiwan
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ceramic substrate
metal layer
metal
substrate
ceramic
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TW098108995A
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English (en)
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Wen-Hsin Lin
Chi-Jen Liu
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Holy Stone Entpr Co Ltd
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Priority to TW098108995A priority Critical patent/TW200948749A/zh
Priority to US12/461,279 priority patent/US20100237037A1/en
Publication of TW200948749A publication Critical patent/TW200948749A/zh
Priority to DE102010011021A priority patent/DE102010011021A1/de
Priority to KR1020100021781A priority patent/KR20100105400A/ko
Priority to JP2010058854A priority patent/JP2010226104A/ja

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    • CCHEMISTRY; METALLURGY
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    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/80After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone of only ceramics
    • C04B41/81Coating or impregnation
    • C04B41/89Coating or impregnation for obtaining at least two superposed coatings having different compositions
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    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/009After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone characterised by the material treated
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/45Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements
    • C04B41/52Multiple coating or impregnating multiple coating or impregnating with the same composition or with compositions only differing in the concentration of the constituents, is classified as single coating or impregnation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867Applying pastes or inks, e.g. screen printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15Ceramic or glass substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2111/00Mortars, concrete or artificial stone or mixtures to prepare them, characterised by specific function, property or use
    • C04B2111/00474Uses not provided for elsewhere in C04B2111/00
    • C04B2111/00844Uses not provided for elsewhere in C04B2111/00 for electronic applications
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/09Treatments involving charged particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H05K3/146By vapour deposition
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H05K3/16Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation by cathodic sputtering
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Description

200948749 六、發明說明: 【發明所屬之技術領域】 本發明提供一種陶瓷基板之金屬化製程方法,尤指利用 奈米介面活性劑塗佈於經粗化處理之陶瓷基板表面,使不具 有電極性之陶瓷基板表面可產生正負電極效應,如此,可透 過電鍍薄財式於具有奈米介面活__絲板上沈積有 較薄厚度之第-金屬層,來達到符合市場需求性之功效。 Ο 【先前技術】 按’隨著科技發展的突飛猛進及人類對更高生活品質的 追求,所以對於許多產品的應用特性趨向極為嚴格的要求, 造成新開發材料的使用成為必要的手段,而現今之積體電路 封裝製程,党追求傳輸效率更佳以及體積小型化之影響(如 行動電話、迷你筆_電腦之電子元件),因此業界對這方 面投入了相當可觀之研究經#,而經過多年的研紐,發明 〇 -陶紐質絲板崎紅陶餘板,_竟基板 具有優良之絕緣性、化學安定性、f磁特性、高硬度、财磨 耗及耐高溫,所_竟基板所可達叙功效遠比制基板更 好,因此喊練於目前錄使狀鮮上也就越來越高, 然而習用於陶絲板上之線路層,係利用缝合方式將金屬 材質層緊密附著於喊基板上,但必須使用鄉之金屬材質 層才可附著於_基板上,且接合面絲錢化銅(c u 〇 )’造成熱阻升高·如果使用太薄金屬材質層,會在顏合 3 200948749 過財,造成金屬材質層龜裂,導致產品品f降低,並彦生 製造成本提升之問題。 —是以’如何解決f_絲板之_與缺失,即為從事 此行業之相關廠商亟欲研究改善之方向所在者。 【發明内容】 故’發明人有鑑於上述之_所與缺失,乃搜集相關資 料’經由多方評估及考量,並卿從事於此健之多年研發 ❹ 經驗’經由不斷試作與修改,始設計出此_錄板之金屬 化製程方法之誕生者。 本發明之主要目的乃在於尤指陶隸板(如:Α ι N/ A120 3/LTTC等)為無機物不帶任何正負電性,非 常不容易與金屬接合,故利用鑛膜製程方式,先將陶究基板 進行潔淨清洗’並使驗侧方式將喊基絲面進行粗化 處理,再利用奈米級含S i的介面活性劑塗佈於陶究基板表 B 面’使不具有電極性之陶究基板表面可產生貞電極效應,如 此,可透過鍍膜方式於奈米介面活性劑上沈積有厚度較薄且 易與陶瓷接合的帶正電之第一金屬層(如s i/N i/(: r 或Fe/Co, Fe/Co/Ni等金屬或金屬合金), 達到利用正負電極吸引之電鍍薄膜方式,可於陶瓷基板上結 合較薄厚度之第一金屬層,有效降低製造成本及提升生產效 益之功效,以符合市場之需求。 本發明之次要目的乃在於陶瓷基板已鍍膜之第一金屬層 200948749 上择可再透賴财式再結合有至少—層以上之第二金屬層 曰加陶絲板上金屬材質之厚度,使喊基板於第一金屬 之合有不同厚度之金屬材質,所以可達到符合使用者 =選擇使用,以及符合市場需求咖 Ζ制’具有較多金屬材質選擇性,此外,上賴膜方式 電性值ί鑛膜、化學級、濺鍍或化學電鍍,制導熱佳、 ❹ ❹ =傳導佳、可靠度及結合力強的嶋板,有效降低製造 成本之效果。 【實施方式】 為達成上述目的及猶’本翻職狀技術手段及其 L效’ 就本侧之難魏觸加_齡驟與功能 如下,俾利完全瞭解。 請同時參閱第-、二、三、四囷所示,係為本發明之架 流程圖、步驟_、製程_㈠、抛步驟圖( ’由圖中可清楚看出’本發明之陶究基板之金屬化製程 去,係可藉由以下步驟來進行製造,其步驟為: (1 ◦ 〇 )將陶竟基板1進行潔淨清洗,再使用微_方式 將陶究基板1表面進行粗化處理。 (1 0 1) 奈米介面活_2塗佈於基板丄表面, 進行陶瓷基板i表面改質。 10 2)透過鍍膜方式於奈米介面活性劑2上結合有第一 金屬層3,完成於陶竟基板1上結合有第-金屬 5 200948749 層3。 (103) Γ第—麵層3上透補财柄結合有至少一 曰以上之第二金屬層4。 (104) 於第二金屬層4上_有乾臈5。 )利用m方式將線路部料之乾膜5、第—金屬 層3及第二金屬層4去除。 C1 0 6 )將線路部份之證__
之第-金屬層4上依序鍍上鎳及金/ 銀’完成-完整之電路基板製程。
本發明之主要目㈣絲板1為無麟*帶任何正負電 性’故上賴造_巾,係先_錄板1職水進行沖洗 ’其純水可為_水等經過滤之純水,並使用偏刻方式將 陶莞基板1表面進行粗化處理,以增加陶絲板工表面與金 屬材質之結合效益,再_含3 i的奈米介性劑2塗佈 於陶莞基板1表面,而進行陶絲板丨表面改f,使陶究基 板1表面形成分子膜,降低表面張力及減少毛細管吸附力, 同時穿透並m陶竟基板1’避免後續加玉過程巾陶曼基板 1表面產生氣泡,經由含s i的奈米介面活性劑2將陶瓷基 板1進行有機化改質並透過無機陽離子活化,使s i 0 2表 面由負電荷轉變為正電荷’然後再吸附陰離子界面劑製得改 質陶瓷基板1,其有機化改質之較佳實施例如下: S i〇H+2Ca2+—S iOCa++2H + 200948749 (有機化改質反應) 劑 =此,成形於喊基板1上㈣負離子之奈料面活性 正電㈣—金屬層3’以形成正負電極吸引 夕’達到奈米介面活性劑2做為陶究基板丄與第一 ❹ ❹ 細馳她㈣基板1 、、層3,而上述鑛臈方式可利用真空鑛膜、化學基 鍍、濺鍍或化學電辨#遍且便宜之鍍臈使屬 層3可不_糊刪細纖 而當使職财辆,第—金顧3會錢舰的陶究 土板1形成直流或高頻電場使惰性氣體發生電離,而產生放 電電浆體,使電離產生的離子和電子高速撞擊,讓金屬分子 鍍膜出來’或_細理將第—編3鍍膜在嶋板 係可於嶋板1表面沉積可形成有較薄厚度 之第一金屬層3,而第-金屬層3之較佳厚度可為〇〇ι —1㈣,且該第—金屬層3可為魏鉻合金(S i /N i /C r )、鐵始合金cp'e/f'n、上、 /C 〇)或鐵鈷鎳合金(F e C o/N i)等合金之金屬。 上述陶錄板1上之奈料_蝴2可_電,吸 引帶正電之第-金屬層3 ’亦可奈米介面活性㈣為帶正電 ,吸引帶貞電之金着質,使絲介祕_2與第一金屬 7 200948749 ^產生正負電效應,且奈米介面活性劑2作為_基板1 ”金屬層3之介質即可’ _此即侷限本發明之專利範 圍’如利_祕#鱗效轉,均朗料含於本發 明之專利範圍内,合予陳明。
刀,虽陶縣板1已結合有較薄厚度第-金屬層3後, 亦可於第-金屬層3上透過錢臈方式,再結合有第二金屬層 4 (如銅、其它單純的金屬或金屬合金),增加陶餘板1 上金屬材質之厚度,使金屬材肢為緊密結實,如此,陶究 基板1上可結合不同厚度之金屬材#,來_符合使用者之 需求選擇朗’以及符合市場需求性之功效,且金屬材質不 受限制,可鱗_金屬或金屬合金,具有較綺質選擇性 ,此外’上述賴方式可為真空鍍膜、化學細、繼或化 學電鏟,不需使用特殊昂貴的鍍膜方式,達到製程簡易、快 速、有效降低製造成本之效果。 上述第二金屬層4上可進-步_有乾膜5,其乾膜5 為光聚合性樹脂㈣’再將預設線路製成正板的 定位及平貼於乾則上,再_光機進行真空、壓板及紫外 線照射流程’其中料線的難,將絲難絲聚合作用 ’但由於光罩雜擋’使紫外線無法透射至線路部份,因此 ’線路部份無法產絲合侧,所以可细顯影液侧未產 生聚合的概5、第-金屬層3及第二金朗4部分,透過 物理及化學剝除方式將預設線路顯現,此外,由於第二金屬 8 200948749 層4之材f為銅,具有較麵傳導雜及散熱效果’且去除 第一金屬層4上殘留之乾膜5後,再於第二金屬層4上依序 鍍上有鎳及金,上述之金亦可為銳或銀,藉由金/銀可符合 高頻之要求,此外,鎳可防止第二金屬層4之銅遷移至金^ 述本么明之陶竞基板之金屬化製程方法於實際使用時 ’為具有下列各項優點,如: (1)利用奈米介面活性劑2_於_基板i表面,而可 彡猶财扭奈米介祕賴2上沈射較薄厚度 之第-金屬層3 ’來達到符合市場需求性之功效 (2 )利用奈米介面活性劑2塗佈於陶究基板丄表面,使不 限制特疋金屬之第-金屬層3可透過鍍膜方式結合於 陶瓷基板1上,達到可使用普遍且較便宜之真空鍍 膜、化學蒸鑛、濺鍍或化學電鍍方式,具有多種方式 選擇’有效降低製造成本。 (3)陶板丄上透過賴方式結合有第—金屬層3,可 進一步於第一金屬層3上鍍臈有至少一層以上之第二 金屬層4,金屬層3及第二金勒4可為單純 的金屬或金屬合金’所以不限制金屬材質的使用,進 而具有較多金屬材質選擇性。 故,本發明為主要針對使用利用奈米介面活性劑2塗佈 於陶曼基板1表面’使不具有電極性之陶究基板工表面可產 生正負電極效應’如此,可透過鑛膜方式於奈米介面活性劑 9 200948749 2上沈積有較薄厚度之第,金屬層3 ’來達到符合市場需求 性之功效’惟’以上所賴為本發明讀佳實_而已,自 不能以此而侷限本發明之專利範圍’因此運用本發明說明書 圖式内各之所為之簡易修飾及等效結構變化,仍應同理包 含於本發明所涵蓋之專利範圍内,合予陳明。 綜上所述,本發明上述之陶瓷基板之金屬化製程方法, 為確實錢到其功效及目的,故本發明誠為—實用性優異之 發明’實符合發日辑利之申請要件,爰依法提出中請,盼 審委早_准本案,以保障發明人之辛苦發明,俯若鈞局 有任何稽疑’睛不吝來函指示發明人定當竭力配合,實感德 200948749 【圖式簡單說明】 第一圖係為本發明之架構流程圖。 第二圖係為本發明之步驟流程圖。 第三圖係為本發明之製程步驟圖(一)。 第四圖係為本發明之製程步驟圖(二)。 【主要元件符號說明】
1、 陶瓷基板 2、 奈米介面活性劑 3、 第一金屬層 4、 第二金屬層
5、 乾膜 11

Claims (1)

  1. 200948749 七、申請專利範圍: 較化製程方法,尤指可在鳴板增 軍乂料度之金雜質,其㈣係包括: (A)將陶隸板進行沖洗,再使用侧方式將喊基板表 面進行粗化處理; (B)利用帶負電之奈米介面活性劑塗佈在粗化處理後之陶
    瓷基板表面’使奈米介面活性劑為陶变基板與第一金 屬層之介質; C)透過鍍财式於帶貞電之奈料面潍紅連結有帶 正電之第一金屬層,完成陶竟基板上結合有第-金屬 2、 如申請專利範圍第1項所述之_基板之金屬化製程方法, 其中該第-金屬層上可進-步鍍有至少—層以上之第二金屬 層,而第二金屬覆蓋有乾膜,並钮刻成預設線路,再於 第二金屬層上鍍有至少一層或一層以上之金屬材質。 3、 如申請專利範圍第1項所述之陶瓷基板之金屬化製程方法, 其中該蝕刻方式係可以微蝕刻方式將陶瓷基板表面進行粗化 處理。 4、 如申請專利範圍第1項所述之陶竟基板之金屬化製程方法, 其中該陶瓷基板係可以純水進行沖洗,而純水係可為蒸館 水0 5、 如申請專利範圍第1項所述之陶瓷基板之金屬化製程方法, 12 200948749 其中該奈米介面活性劑係可為含s i的奈米介面活性劑。 6、如申請專利範圍第w所述之陶餘板之金屬化製程方法, 其中該第金屬層之較佳厚度可為Q . Q卜^請。 7 I如申請專利顧^ i項所述之_基板之金屬化製程方法, 其中該第-金屬層可切鎳鉻合金(s i /N i八r)、 鐵銘合金(F e/c 0)或鐵_合金(F e/c Q/N i)等合金之金屬。 〇 8 —種陶变基板之金屬化製程方法,尤指可在陶竟基板上鑛有 較薄厚度之金屬材質,其步驟係包括: (Α)將_基板騎沖洗’再使舰刻方式將陶絲板表 面進行粗化處理; (Β )利时正電之奈米介面活性敝佈在粗化處理後之陶 瓷基板表面,使奈米介面活性劑為陶瓷基板與第一金 屬層之介質; φ (C)透過鍍臈方式於帶正電之奈米介面活性劑上連結有帶 負電之第一金屬層,完成陶瓷基板上結合有第一金屬 層。 9、如申請專利範圍第8項所述之陶瓷基板之金屬化製程方法, 其中該第一金屬層上可進一步鍍有至少一層以上之第二金屬 層,而第二金屬層上覆蓋有乾臈,並蝕刻成預設線路,再於 第二金屬層上鍍有至少一層或一層以上之金屬材質。 10、如申請專利範圍第8項所述之陶瓷基板之金屬化製程方 13 200948749 法’其中該麵料係Μ紐财式將喊基板 行粗化處理。 逆 U、如申請__8項所述之喊基板之金屬化製程方法 ,其中該陶£基板係可以純水進行沖洗,_水係 餾水。 、 1 2、如申請專利範圍第δ項所述之陶竟基板之金屬傾程方法 ’其中該奈米介抑性_可騎s i的奈米介面活性劑 I 1 3、如申請專利範圍第8項所述之陶絲板之金屬化製程方法 ,其中該第一金屬層之較佳厚度可為〇 · 〇 i 。 14、如申請專利範圍第8項所述之陶瓷基板之金屬化製程方法 ,其中該第一金屬層可為矽鎳鉻合金(S i/n i/c r )、鐵鈷合金(F e/C 〇)或鐵鈷鎳合金(ρ e/c ο /N i)等合金之金屬。 14
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