TW200943727A - Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals - Google Patents

Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals

Info

Publication number
TW200943727A
TW200943727A TW097149942A TW97149942A TW200943727A TW 200943727 A TW200943727 A TW 200943727A TW 097149942 A TW097149942 A TW 097149942A TW 97149942 A TW97149942 A TW 97149942A TW 200943727 A TW200943727 A TW 200943727A
Authority
TW
Taiwan
Prior art keywords
clock signal
cycle
generating
utilizing
clock signals
Prior art date
Application number
TW097149942A
Other languages
English (en)
Inventor
Christos Komninakis
Ming-Chieh Kuo
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of TW200943727A publication Critical patent/TW200943727A/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation

Landscapes

  • Synchronisation In Digital Transmission Systems (AREA)
  • Manipulation Of Pulses (AREA)
  • Measuring Frequencies, Analyzing Spectra (AREA)
  • Circuits Of Receivers In General (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
TW097149942A 2007-12-20 2008-12-19 Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals TW200943727A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US1526707P 2007-12-20 2007-12-20
US12/053,433 US8132041B2 (en) 2007-12-20 2008-03-21 Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals

Publications (1)

Publication Number Publication Date
TW200943727A true TW200943727A (en) 2009-10-16

Family

ID=40790100

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097149942A TW200943727A (en) 2007-12-20 2008-12-19 Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals

Country Status (7)

Country Link
US (1) US8132041B2 (zh)
EP (1) EP2238688B1 (zh)
JP (2) JP5372953B2 (zh)
KR (1) KR101228397B1 (zh)
CN (1) CN101897120B (zh)
TW (1) TW200943727A (zh)
WO (1) WO2009086060A1 (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101180144B1 (ko) * 2009-02-24 2012-09-05 광운대학교 산학협력단 위상고정루프 기반 주파수 합성기를 위한 자동주파수보정 장치 및 방법
JP5818485B2 (ja) * 2011-04-05 2015-11-18 アズビル株式会社 計数装置および計数方法
US9088328B2 (en) 2011-05-16 2015-07-21 Intel Mobile Communications GmbH Receiver of a mobile communication device
US8826062B2 (en) 2011-05-23 2014-09-02 Intel Mobile Communications GmbH Apparatus for synchronizing a data handover between a first clock domain and a second clock domain through phase synchronization
US9229506B1 (en) * 2012-03-21 2016-01-05 Marvell Israel (M.I.S.L) Ltd. Dynamic power regulation
DE102013020954A1 (de) 2013-12-12 2015-06-18 Northrop Grumman Litef Gmbh Verfahren und Vorrichtung zum Übertragen von Daten an asynchronen Übergängen zwischen Domänen mit unterschiedlichen Taktfrequenzen
US9582027B2 (en) * 2014-06-09 2017-02-28 Qualcomm Incorporated Clock swallowing device for reducing voltage noise
US9778676B2 (en) 2015-08-03 2017-10-03 Qualcomm Incorporated Power distribution network (PDN) droop/overshoot mitigation in dynamic frequency scaling
US9490826B1 (en) * 2015-08-19 2016-11-08 Qualcomm Incorporated Methods and apparatus for synchronizing frequency dividers using a pulse swallowing technique
US10571953B2 (en) * 2017-07-05 2020-02-25 Intel Corporation Method and apparatus to utilize a digital-time-conversion (DTC) based clocking in computing systems
CN113489658B (zh) * 2017-10-31 2022-10-28 华为技术有限公司 一种处理灵活以太网的数据的方法及相关设备

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3928813A (en) * 1974-09-26 1975-12-23 Hewlett Packard Co Device for synthesizing frequencies which are rational multiples of a fundamental frequency
US3976945A (en) * 1975-09-05 1976-08-24 Hewlett-Packard Company Frequency synthesizer
US4214823A (en) * 1979-05-22 1980-07-29 Pritchard Eric K Animation stand control system
US4521916A (en) * 1983-11-29 1985-06-04 Rca Corporation Frequency synthesis tuning control system for a double-conversion tuner
US4586005A (en) * 1985-07-16 1986-04-29 Hughes Aircraft Company Enhanced analog phase interpolation for Fractional-N frequency synthesis
US4868513A (en) * 1987-09-11 1989-09-19 Amdahl Corporation Phase-locked loop with redundant reference input
US5075880A (en) * 1988-11-08 1991-12-24 Wadia Digital Corporation Method and apparatus for time domain interpolation of digital audio signals
JP3425976B2 (ja) * 1991-10-17 2003-07-14 真作 森 周波数変換回路
JP3181396B2 (ja) * 1992-09-29 2001-07-03 沖電気工業株式会社 クロック発生回路
US5517521A (en) * 1993-06-25 1996-05-14 Digital Wireless Corporation Method and apparatus for synchronization between real-time sampled audio applications operating full-duplex over a half-duplex radio link
GB9610801D0 (en) * 1996-05-23 1996-07-31 Philips Electronics Nv Frequency generating circuit
US6016113A (en) * 1997-06-26 2000-01-18 Binder; Yehuda System for enhancing the accuracy of analog-digital-analog conversions
US5907295A (en) * 1997-08-04 1999-05-25 Neomagic Corp. Audio sample-rate conversion using a linear-interpolation stage with a multi-tap low-pass filter requiring reduced coefficient storage
FR2793570A1 (fr) * 1999-05-11 2000-11-17 Koninkl Philips Electronics Nv Processeur ayant une frequence de fonctionnement adaptable
US6289067B1 (en) * 1999-05-28 2001-09-11 Dot Wireless, Inc. Device and method for generating clock signals from a single reference frequency signal and for synchronizing data signals with a generated clock
DE19930168C2 (de) * 1999-06-30 2001-07-19 Infineon Technologies Ag Schaltungsanordnung für einen Frequenzteiler
US6424688B1 (en) * 1999-10-27 2002-07-23 Advanced Micro Devices, Inc. Method to transfer data in a system with multiple clock domains using clock skipping techniques
US6748039B1 (en) * 2000-08-11 2004-06-08 Advanced Micro Devices, Inc. System and method for synchronizing a skip pattern and initializing a clock forwarding interface in a multiple-clock system
DE10106403B4 (de) * 2001-02-12 2007-01-18 Rohde & Schwarz Gmbh & Co. Kg Vorrichtung und Verfahren zur Abtastratenumsetzung
KR100723152B1 (ko) * 2005-05-27 2007-05-30 삼성전기주식회사 주파수 분주기 및 이를 이용한 위상 동기 루프 장치
US7913103B2 (en) * 2007-08-31 2011-03-22 Globalfoundries Inc. Method and apparatus for clock cycle stealing
US7882385B2 (en) * 2007-12-05 2011-02-01 International Business Machines Corporation Reducing inefficiencies of multi-clock-domain interfaces using a modified latch bank

Also Published As

Publication number Publication date
US8132041B2 (en) 2012-03-06
WO2009086060A1 (en) 2009-07-09
US20090164827A1 (en) 2009-06-25
KR20100115349A (ko) 2010-10-27
EP2238688B1 (en) 2015-05-13
KR101228397B1 (ko) 2013-01-31
JP2013243689A (ja) 2013-12-05
CN101897120B (zh) 2013-08-21
JP5372953B2 (ja) 2013-12-18
JP2011509568A (ja) 2011-03-24
WO2009086060A8 (en) 2010-09-23
EP2238688A1 (en) 2010-10-13
CN101897120A (zh) 2010-11-24

Similar Documents

Publication Publication Date Title
TW200943727A (en) Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals
WO2007149212A3 (en) Rfid device with first clock for data acquisition and/or calibration of second clock
EP2161630A3 (en) Electronic device and method providing improved indication that an alarm clock is in an on condition
WO2014164895A8 (en) Systems and methods for verification of security tag detachment
TR201911203T4 (tr) Yüksek performanslı bellek cihazları için saat ve kontrol sinyali üretimi.
BR112012030352A2 (pt) conjunto de circuitos para cabo ativo
TW200710376A (en) Semiconductor device
MX2013001121A (es) Imagenes de alta resolucion de la profundidad del pozo.
DE602007013697D1 (zh)
TW200711276A (en) Reference clock signal generation circuit, power supply circuit, driver circuit, and electro-optical device
WO2010028303A3 (en) System and method for providing power to portable electronic devices
TW200625234A (en) Apparatus and method for converting frame rate without external memory in display system
TW200702980A (en) Error-correcting apparatus including multiple error-correcting modules functioning in parallel and related method
WO2010025205A3 (en) Method and apparatus to combine power and control signals in a mobile computing device
TW200733052A (en) Display driving integrated circuit and method of generating system clock signal using oscillator clock signal
GB2462239A (en) Techniques for integrated circuit clock management
WO2009120456A3 (en) Bit-width minimization scheme for wireless communication
MX2008013589A (es) Medios de generacion de voz para uso con detectores de señal.
TW200737732A (en) Method and apparatus for generating output signal
TWI266489B (en) Apparatus and method for increasing signal estimation accuraccy
GB201107543D0 (en) Method and system for generating output image data
MY191312A (en) Electronic contactless horn and sound device
TW200710804A (en) Electro-optical device, driving circuit thereof, and electronic apparatus
TW200801949A (en) Graphic card
TW200727590A (en) Test apparatus of clock signal