TW200744133A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device

Info

Publication number
TW200744133A
TW200744133A TW095148037A TW95148037A TW200744133A TW 200744133 A TW200744133 A TW 200744133A TW 095148037 A TW095148037 A TW 095148037A TW 95148037 A TW95148037 A TW 95148037A TW 200744133 A TW200744133 A TW 200744133A
Authority
TW
Taiwan
Prior art keywords
forming
groove
channel stopper
semiconductor device
manufacturing semiconductor
Prior art date
Application number
TW095148037A
Other languages
English (en)
Other versions
TWI331367B (en
Inventor
Kazuhiko Itoh
Kyosuge Entoh
Hideyuki Tsukamoto
Original Assignee
Shindengen Electric Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Mfg filed Critical Shindengen Electric Mfg
Publication of TW200744133A publication Critical patent/TW200744133A/zh
Application granted granted Critical
Publication of TWI331367B publication Critical patent/TWI331367B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3178Coating or filling in grooves made in the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Dicing (AREA)
  • Semiconductor Lasers (AREA)
  • Formation Of Insulating Films (AREA)
  • Thyristors (AREA)
TW095148037A 2006-05-19 2006-12-20 Method of manufacturing semiconductor device TWI331367B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006140626A JP4901300B2 (ja) 2006-05-19 2006-05-19 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
TW200744133A true TW200744133A (en) 2007-12-01
TWI331367B TWI331367B (en) 2010-10-01

Family

ID=38844219

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095148037A TWI331367B (en) 2006-05-19 2006-12-20 Method of manufacturing semiconductor device

Country Status (4)

Country Link
JP (1) JP4901300B2 (zh)
KR (1) KR100962832B1 (zh)
CN (1) CN101075560B (zh)
TW (1) TWI331367B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI650818B (zh) * 2016-11-25 2019-02-11 日商新電元工業股份有限公司 半導體裝置的製造方法及半導體裝置

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009302222A (ja) 2008-06-12 2009-12-24 Sanyo Electric Co Ltd メサ型半導体装置及びその製造方法
JP2010021532A (ja) 2008-06-12 2010-01-28 Sanyo Electric Co Ltd メサ型半導体装置及びその製造方法
JP5350757B2 (ja) * 2008-11-14 2013-11-27 新電元工業株式会社 メサ型ツェナーダイオード及びその製造方法
JP5818972B2 (ja) * 2012-03-30 2015-11-18 帝人株式会社 半導体積層体及びその製造方法、半導体デバイスの製造方法、半導体デバイス、ドーパント組成物、ドーパント注入層、並びにドープ層の形成方法
JP6215099B2 (ja) * 2014-03-19 2017-10-18 新電元工業株式会社 メサ型半導体装置の製造方法及びメサ型半導体装置
US10707302B2 (en) 2016-11-25 2020-07-07 Shindengen Electric Manufacturing Co., Ltd. Semiconductor device manufacturing method and semiconductor device
CN112133743A (zh) * 2020-11-25 2020-12-25 浙江里阳半导体有限公司 可控硅结构及其制造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5119313B1 (zh) * 1970-04-27 1976-06-16
JPS57128944A (en) * 1981-02-03 1982-08-10 Nec Corp Maufacture of semiconductor device
JPS61224433A (ja) 1985-03-29 1986-10-06 Sony Corp 不純物領域の形成方法
JPS6243167A (ja) * 1985-08-21 1987-02-25 Toshiba Corp メサ型半導体装置
JPS62128180A (ja) * 1985-11-29 1987-06-10 Toshiba Corp メサ型半導体装置の製造方法
JPS63313859A (ja) * 1987-06-16 1988-12-21 Toshiba Corp メサ型半導体装置及びその製造方法
US4904609A (en) * 1988-05-06 1990-02-27 General Electric Company Method of making symmetrical blocking high voltage breakdown semiconductor device
JPH0689936A (ja) * 1992-09-09 1994-03-29 Fuji Electric Co Ltd 半導体装置の製造方法
TW299897U (en) * 1993-11-05 1997-03-01 Semiconductor Energy Lab A semiconductor integrated circuit
JP3917202B2 (ja) * 1995-06-26 2007-05-23 ローム株式会社 半導体装置の製法
JP2006306030A (ja) * 2005-03-28 2006-11-09 Sumitomo Chemical Co Ltd 成形体

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI650818B (zh) * 2016-11-25 2019-02-11 日商新電元工業股份有限公司 半導體裝置的製造方法及半導體裝置

Also Published As

Publication number Publication date
CN101075560B (zh) 2011-05-11
JP2007311655A (ja) 2007-11-29
KR20070111950A (ko) 2007-11-22
CN101075560A (zh) 2007-11-21
KR100962832B1 (ko) 2010-06-09
JP4901300B2 (ja) 2012-03-21
TWI331367B (en) 2010-10-01

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