TW200735316A - Leadframe based flash memory cards - Google Patents

Leadframe based flash memory cards

Info

Publication number
TW200735316A
TW200735316A TW095149569A TW95149569A TW200735316A TW 200735316 A TW200735316 A TW 200735316A TW 095149569 A TW095149569 A TW 095149569A TW 95149569 A TW95149569 A TW 95149569A TW 200735316 A TW200735316 A TW 200735316A
Authority
TW
Taiwan
Prior art keywords
leadframe
singulated
curvilinear
flash memory
memory cards
Prior art date
Application number
TW095149569A
Other languages
English (en)
Other versions
TWI335656B (en
Inventor
Hem Takiar
Shrikar Bhagath
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandisk Corp filed Critical Sandisk Corp
Publication of TW200735316A publication Critical patent/TW200735316A/zh
Application granted granted Critical
Publication of TWI335656B publication Critical patent/TWI335656B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772—Physical layout of the record carrier
    • G06K19/07732—Physical layout of the record carrier the record carrier having a housing or construction similar to well-known portable memory devices, such as SD cards, USB or memory sticks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1433—Application-specific integrated circuit [ASIC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Lead Frames For Integrated Circuits (AREA)
TW095149569A 2005-12-29 2006-12-28 Leadframe based flash memory cards TWI335656B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/321,350 US7488620B2 (en) 2005-12-29 2005-12-29 Method of fabricating leadframe based flash memory cards including singulation by straight line cuts

Publications (2)

Publication Number Publication Date
TW200735316A true TW200735316A (en) 2007-09-16
TWI335656B TWI335656B (en) 2011-01-01

Family

ID=38171274

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095149569A TWI335656B (en) 2005-12-29 2006-12-28 Leadframe based flash memory cards

Country Status (6)

Country Link
US (2) US7488620B2 (zh)
EP (1) EP1969628A2 (zh)
KR (1) KR101015268B1 (zh)
CN (3) CN103035606B (zh)
TW (1) TWI335656B (zh)
WO (1) WO2007079125A2 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI421904B (zh) * 2010-06-29 2014-01-01 Toshiba Kk Semiconductor memory device and manufacturing method thereof
TWI508268B (zh) * 2011-07-13 2015-11-11 Powertech Technology Inc 無基板之快閃記憶卡之製造方法

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US20080185694A1 (en) * 1999-08-04 2008-08-07 Super Talent Electronics, Inc. Processes of Manufacturing Portable Electronic Storage Devices Utilizing Lead Frame Connectors
US7488620B2 (en) * 2005-12-29 2009-02-10 Sandisk Corporation Method of fabricating leadframe based flash memory cards including singulation by straight line cuts
US20070152071A1 (en) * 2006-01-05 2007-07-05 En-Min Jow Package method for flash memory card and structure thereof
US20070164120A1 (en) * 2006-01-19 2007-07-19 En-Min Jow Forming method of Micro SD card
JP4945682B2 (ja) * 2010-02-15 2012-06-06 株式会社東芝 半導体記憶装置およびその製造方法
US8446728B1 (en) * 2011-01-03 2013-05-21 Wade S. McDonald Flash memory card carrier
US8575739B2 (en) * 2011-05-06 2013-11-05 Sandisk Technologies Inc. Col-based semiconductor package including electrical connections through a single layer leadframe
DE102011106104B4 (de) 2011-06-09 2014-04-10 Otto Bock Healthcare Products Gmbh Verfahren zum Herstellen bestückter Leiterplatten
JP2013025540A (ja) * 2011-07-20 2013-02-04 Toshiba Corp 半導体記憶装置
US20130069223A1 (en) * 2011-09-16 2013-03-21 Hui-Chang Chen Flash memory card without a substrate and its fabrication method
US8368192B1 (en) * 2011-09-16 2013-02-05 Powertech Technology, Inc. Multi-chip memory package with a small substrate
JP5740372B2 (ja) * 2012-09-12 2015-06-24 株式会社東芝 半導体メモリカード
USD730907S1 (en) * 2014-05-02 2015-06-02 Samsung Electronics Co., Ltd. Memory card
USD730910S1 (en) * 2014-05-02 2015-06-02 Samsung Electronics Co., Ltd. Memory card
USD730908S1 (en) * 2014-05-02 2015-06-02 Samsung Electronics Co., Ltd. Memory card
USD730909S1 (en) * 2014-06-27 2015-06-02 Samsung Electronics Co., Ltd. Memory card
USD727912S1 (en) * 2014-06-27 2015-04-28 Samsung Electronics Co., Ltd. Memory card
USD727911S1 (en) * 2014-06-27 2015-04-28 Samsung Electronics Co., Ltd. Memory card
USD729251S1 (en) * 2014-06-27 2015-05-12 Samsung Electronics Co., Ltd. Memory card
USD727913S1 (en) * 2014-06-27 2015-04-28 Samsung Electronics Co., Ltd. Memory card
USD736215S1 (en) * 2014-07-01 2015-08-11 Samsung Electronics Co., Ltd. Memory card
USD736214S1 (en) * 2014-07-01 2015-08-11 Samsung Electronics Co., Ltd. Memory card
USD736212S1 (en) * 2014-07-01 2015-08-11 Samsung Electronics Co., Ltd. Memory card
KR102284655B1 (ko) * 2014-07-02 2021-08-03 삼성전자 주식회사 메모리 카드
USD727910S1 (en) * 2014-07-02 2015-04-28 Samsung Electronics Co., Ltd. Memory card
US10157678B2 (en) 2014-08-12 2018-12-18 Samsung Electronics Co., Ltd. Memory card
KR102420587B1 (ko) 2014-08-12 2022-07-14 삼성전자주식회사 메모리 카드
USD798868S1 (en) * 2015-08-20 2017-10-03 Isaac S. Daniel Combined subscriber identification module and storage card
USD773466S1 (en) * 2015-08-20 2016-12-06 Isaac S. Daniel Combined secure digital memory and subscriber identity module
USD783622S1 (en) * 2015-08-25 2017-04-11 Samsung Electronics Co., Ltd. Memory card
USD783621S1 (en) * 2015-08-25 2017-04-11 Samsung Electronics Co., Ltd. Memory card
USD772232S1 (en) * 2015-11-12 2016-11-22 Samsung Electronics Co., Ltd. Memory card
USD773467S1 (en) * 2015-11-12 2016-12-06 Samsung Electronics Co., Ltd. Memory card
US20180088628A1 (en) * 2016-09-28 2018-03-29 Intel Corporation Leadframe for surface mounted contact fingers
US10366946B2 (en) 2017-10-30 2019-07-30 Infineon Technologies Ag Connection member with bulk body and electrically and thermally conductive coating
WO2019138260A1 (en) * 2018-01-12 2019-07-18 Linxens Holding Method for manufacturing a sim card and sim card
USD934868S1 (en) * 2018-02-28 2021-11-02 Sony Corporation Memory card

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KR100309161B1 (ko) * 1999-10-11 2001-11-02 윤종용 메모리 카드 및 그 제조방법
IT1320025B1 (it) 2000-04-10 2003-11-12 Viasystems S R L Supporto del tipo a circuito stampato per circuiti elettroniciintegrati, procedimento per la sua fabbricazione, e componente
KR20020007877A (ko) 2000-07-19 2002-01-29 마이클 디. 오브라이언 반도체 패키지 제조용 부재
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JP2003124421A (ja) * 2001-10-15 2003-04-25 Shinko Electric Ind Co Ltd リードフレーム及びその製造方法並びに該リードフレームを用いた半導体装置の製造方法
US7094633B2 (en) 2003-06-23 2006-08-22 Sandisk Corporation Method for efficiently producing removable peripheral cards
US6858470B1 (en) 2003-10-08 2005-02-22 St Assembly Test Services Ltd. Method for fabricating semiconductor packages, and leadframe assemblies for the fabrication thereof
US6933592B2 (en) 2003-12-19 2005-08-23 Global Advanced Packaging Technology H.K. Limited Substrate structure capable of reducing package singular stress
US7485501B2 (en) * 2005-11-02 2009-02-03 Sandisk Corporation Method of manufacturing flash memory cards
US7488620B2 (en) 2005-12-29 2009-02-10 Sandisk Corporation Method of fabricating leadframe based flash memory cards including singulation by straight line cuts

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI421904B (zh) * 2010-06-29 2014-01-01 Toshiba Kk Semiconductor memory device and manufacturing method thereof
TWI508268B (zh) * 2011-07-13 2015-11-11 Powertech Technology Inc 無基板之快閃記憶卡之製造方法

Also Published As

Publication number Publication date
US7795715B2 (en) 2010-09-14
WO2007079125A3 (en) 2007-10-04
US7488620B2 (en) 2009-02-10
US20090134502A1 (en) 2009-05-28
KR20080085902A (ko) 2008-09-24
CN103035606B (zh) 2016-01-06
CN101847584B (zh) 2012-10-03
WO2007079125A2 (en) 2007-07-12
TWI335656B (en) 2011-01-01
US20070155046A1 (en) 2007-07-05
EP1969628A2 (en) 2008-09-17
KR101015268B1 (ko) 2011-02-18
CN101351883A (zh) 2009-01-21
CN101847584A (zh) 2010-09-29
CN103035606A (zh) 2013-04-10

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