TW200725716A - Wafer level packaging process - Google Patents
Wafer level packaging processInfo
- Publication number
- TW200725716A TW200725716A TW094146077A TW94146077A TW200725716A TW 200725716 A TW200725716 A TW 200725716A TW 094146077 A TW094146077 A TW 094146077A TW 94146077 A TW94146077 A TW 94146077A TW 200725716 A TW200725716 A TW 200725716A
- Authority
- TW
- Taiwan
- Prior art keywords
- wafer
- covering plate
- transparent covering
- packaging process
- level packaging
- Prior art date
Links
Landscapes
- Dicing (AREA)
Abstract
A wafer level packaging process including the following steps is provided. First, a wafer is provided, and a transparent covering plate is disposed onto the wafer, wherein the wafer and the transparent covering plate are in misarrangement so that a part of the edge of the transparent covering plate protrudes outside the wafer. Then, the transparent covering plate is sawed to form a plurality of cut lines on the transparent covering plate. Thereafter, the transparent covering plate and the wafer are flipped. Then, the wafer is sawed by taking the cut lines on the transparent covering plate protruding the wafer as reference. Next, a singularizing process is performed to the wafer and the transparent covering plate to form a plurality of chip packages. The wafer level packaging process has superior sawing precision.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW94146077A TWI283023B (en) | 2005-12-23 | 2005-12-23 | Wafer level packaging process |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW94146077A TWI283023B (en) | 2005-12-23 | 2005-12-23 | Wafer level packaging process |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI283023B TWI283023B (en) | 2007-06-21 |
TW200725716A true TW200725716A (en) | 2007-07-01 |
Family
ID=38828976
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW94146077A TWI283023B (en) | 2005-12-23 | 2005-12-23 | Wafer level packaging process |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI283023B (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5495511B2 (en) * | 2008-05-27 | 2014-05-21 | 株式会社ディスコ | Wafer division method |
JP7139037B2 (en) * | 2018-05-11 | 2022-09-20 | 株式会社ディスコ | Chip manufacturing method |
JP7102065B2 (en) * | 2018-06-20 | 2022-07-19 | 株式会社ディスコ | Chip manufacturing method |
-
2005
- 2005-12-23 TW TW94146077A patent/TWI283023B/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TWI283023B (en) | 2007-06-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |