CN101847584A - 基于引线框架的快闪存储器卡 - Google Patents

基于引线框架的快闪存储器卡 Download PDF

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CN101847584A
CN101847584A CN201010000644A CN201010000644A CN101847584A CN 101847584 A CN101847584 A CN 101847584A CN 201010000644 A CN201010000644 A CN 201010000644A CN 201010000644 A CN201010000644 A CN 201010000644A CN 101847584 A CN101847584 A CN 101847584A
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CN101847584B (zh
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赫姆·塔基阿尔
什里卡尔·巴加特
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Delphi International Operations Luxembourg SARL
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Abstract

本发明涉及基于引线框架的快闪存储器卡。本发明揭示一种引线框架设计和用于形成具有曲线形状的基于引线框架的半导体封装的方法。所述引线框架可各自包括对应于已完成和单一化的半导体封装中的曲线边缘的一个或一个以上曲线槽。在囊封之后，可通过从引线框架面板将集成电路切割为多个个别集成电路封装而单一化所述面板上的所述集成电路封装。所述引线框架中的所述槽有利地允许使用仅进行直线切割的锯条来单一化每一引线框架。

Description

基于引线框架的快闪存储器卡
分案申请的相关信息
本申请为发明名称为“基于引线框架的快闪存储器卡”的原中国发明专利申请的分案申请。原申请的申请号为200680049955.X；原申请的申请日为2006年12月27日；原发明专利申请案的优先权日为2005年12月29日。
技术领域
本发明的实施例涉及一种包括集成电路封装的快闪存储器卡，所述集成电路封装包括具有非直线或曲线轮廓的引线框架。
背景技术
由于电子装置的尺寸持续减小，所以操作其的相关联半导体封装经设计为具有较小形状因数、较低功率要求和较高的功能性。当前，半导体制造的亚微米特征对封装技术提出较高需求，其包括较高的引线数、减小的引线间距、最小的占据面积和显著的总体积减小。
半导体封装的一个分支包括引线框架的使用，所述引线框架为薄金属层，在所述薄金属层上安装和支撑一个或一个以上半导体电路小片。引线框架包括用于将来自所述一个或一个以上半导体的电信号传送到印刷电路板或其它外部电子装置的电引线。图1展示在附接半导体电路小片22之前的引线框架20。典型引线框架20可包括许多引线24，其具有用于附接到半导体电路小片22的第一末端24a，和用于贴附到印刷电路板或其它电子组件的第二末端(未图示)。引线框架20可进一步包括用于将半导体电路小片22结构性地支撑在引线框架20上的电路小片附接垫26。虽然电路小片附接垫26可提供到接地的路径，但其常规上并不载运来自半导体电路小片22的信号或将信号载运到半导体电路小片22。在某些引线框架配置中，在所谓的引线上芯片(COL)配置中，已知省略电路小片附接垫26且替代地将半导体电路小片直接附接到引线框架引线。
如图2所示，可使用电路小片附接化合物将半导体引线24安装到电路小片附接垫26。以常规方式形成半导体电路小片22，其中在半导体电路小片的顶侧上的至少第一和第二相对边缘上具有多个电路小片结合垫28。一旦半导体电路小片安装到引线框架，便执行线结合过程，借此使用专用线30将结合垫28电耦合到各自的电引线24。结合垫28到特定电引线24的指派是由工业标准规范界定的。为清晰起见，图2展示少于全部接线到引线24的结合垫28，但在常规设计中，每一结合垫可接线到其各自电引线。如图2所示，也已知少于全部的结合垫接线到一电引线。
通常，引线框架20最初由包括多个此类引线框架的面板形成。半导体电路小片22安装并电连接到面板中的每一引线框架，且借此形成的集成电路囊封在模制化合物中。此后，从所述面板切割个别囊封集成电路或将其单一化为多个半导体封装。
一些常规基于衬底的封装和卡具有曲线形占据面积。作为一实例，分别在图3和图4中以俯视图和仰视图展示由加利福尼亚(California)，桑尼维尔(Sunnyvale)的三迪斯科公司(SanDisk Corporation)引进的工业标准Transflash快闪存储器卡。如此处所见，Transflash卡30包括具有由圆角接合的侧边32到38的大体矩形形状。所述卡的侧边32包括凹口40和在侧边32的上部部分中界定的成角度的凹陷区42，使得卡30的顶部边缘34窄于卡的底部边缘38。其它存储器卡(例如，安全数字(“SD”)卡和微型SD卡)类似地包括具有圆边缘、凹口和/或斜面的曲线形状。
已知用于从囊封集成电路的面板切割具有曲线形边缘的半导体封装的若干方法。已知的切割方法包括(例如)喷水切割、激光切割、水导向型激光切割、干燥媒体切割和金刚石涂层丝切割。所述切割方法能够实现个别化集成电路封装的复杂的直线和/或曲线形状。在题为“用于有效地生产可移除外围卡的方法(Method for Efficiently ProducingRemovable Peripheral Cards)”的第2004/0259291号经公开美国专利申请案中揭示了用于从面板切割囊封集成电路的方法和借此可实现的形状的更详细描述，所述申请案转让给本发明的所有者且其全文以引用的方式并入本文中。
虽然已知的切割方法在实现个别化的半导体封装中的曲线形状时是有效的，但这些方法要求精确的切割且增加了半导体制造过程的复杂性和成本。
发明内容
粗略描述的本发明涉及一种引线框架设计和用于形成具有曲线形状的基于引线框架的半导体封装的方法。可以例如化学蚀刻的已知制造过程或以使用连续冲模的机械冲压过程在面板上成批地处理多个引线框架。所述引线框架可各自包括对应于已完成和单一化的半导体封装中的曲线边缘的一个或一个以上曲线边缘。
在封装制造过程期间，将一个或一个以上半导体电路小片安装和电连接到引线框架以形成集成电路。此后，将所述集成电路囊封在模制化合物中。在囊封之后，可通过将集成电路从引线框架面板切割为多个个别的集成电路封装而单一化所述集成电路。引线框架中的槽有利地允许使用仅进行直线切割的锯条来单一化每一引线框架。锯切通常比例如常用以实现曲线切割形状的喷水切割、激光切割的其它切割方法花费少、耗时短且要求较少设备。
即使仅沿直切割线进行切割，曲线形槽仍允许单一化的封装具有曲线形边缘。可以多种配置提供所述槽以允许已完成的封装在需要时具有任何曲线形状。可使用具有至少两个点的槽来实现任何曲线形状，所述至少两个点与直切割线中的一者或一者以上相交。
在另一实施例中，可从引线框架面板冲压引线框架而非锯切。在此类实施例中，单一槽可大体上围绕引线框架的整个周边和经囊封半导体封装而延伸。在此类实施例中，引线框架可由围绕引线框架封装的周边隔开定位的一系列系杆而连接到面板。
在通过切割或冲压分离引线框架封装之后，所述封装的边缘可为粗糙的和/或来自引线框架的金属片段可仍附接在其上。因此，在通过分离所述封装之后，在单一化引线框架之后留下的任何粗糙边缘和/或金属片段平滑。
附图说明
图1为常规引线框架和半导体电路小片的分解透视图。
图2为线结合到常规引线框架的常规半导体电路小片的透视图。
图3为常规Transflash存储器卡的俯视图。
图4为常规Transflash存储器卡的仰视图。
图5为根据本发明的一实施例的包括多个引线框架的面板。
图6为来自图5所示的面板的根据本发明的一实施例的单一引线框架的俯视图。
图7为根据本发明的一实施例的引线框架的俯视图，所述引线框架包括安装在其上的半导体电路小片。
图8为根据本发明的一实施例的引线框架的俯视图，所述引线框架包括安装在其上且囊封在模制化合物中的半导体电路小片。
图9为通过沿着图8中的线9-9的平面截取的横截面图。
图10为根据本发明的一实施例的引线框架面板的一部分的俯视图，其展示直边缘切割线，其中将切割已完成的集成电路以从集成电路的面板单一化集成电路。
图11为来自图10的面板的单一引线框架，其展示直边缘切割线，其中将切割已完成的集成电路以从集成电路的面板单一化集成电路。
图12为单一化半导体封装和待遗弃的引线框架的切除部分。
图13为根据本发明的一替代实施例的引线框架的俯视图。
图14为图13的引线框架的俯视图，其展示用以单一化图13的集成电路的直边缘切割线。
图15为根据本发明的另一替代实施例的引线框架的俯视图。
具体实施方式
现将参看图5到图15描述本发明的实施例，其通常涉及引线框架设计和形成具有曲线形边缘的单一化半导体电路小片封装的方法。如本文中所使用，曲线形状包括弯曲边缘、曲线形边缘、不直的边缘和不连续边缘(即，两个边缘以斜角会合)。应了解，可以许多不同形式实施本发明且不应将其解释为限于本文中所陈述的实施例。相反，提供这些实施例以使得本揭示内容将是详尽和完整的，且将向所属领域的技术人员完全地传达本发明的实施例。实际上，期望本发明涵盖包括在由所附权利要求书界定的本发明的范围和精神内的这些实施例的替代方案、修改和均等物。此外，在本发明的实施例的以下详细描述中，陈述许多特定细节以提供对本发明的彻底理解。然而，所属领域的技术人员应清楚了解，可实践本发明使其不具有所述特定细节。
一般来说，可从引线框架的面板(例如图5中所示的面板90)成批地处理根据本发明的引线框架。在图5所示的实施例中，面板90包括引线框架100的2×6阵列。应了解，在替代实施例中，可以具有变化的列和行的多种阵列形成面板90。如下文所阐述，集成电路形成在面板90中的所述多个引线框架100上，所述集成电路被囊封在保护性模制化合物中，且接着从所述面板切割经囊封集成电路或将其单一化，以形成多个半导体封装。
现参看图6，其展示来自面板90的单一引线框架100。引线框架100包括用于支撑一个或一个以上半导体电路小片的电路小片踏板102。引线框架100进一步包括用于将电信号传送到一个或一个以上半导体电路小片和从一个或一个以上半导体电路小片传送电信号的电引线104，和用于在所述一个或一个以上半导体电路小片与外部电子装置之间传送电信号的接触垫106。如下文更详细阐述，引线框架100也可包括多个曲线形槽110。
引线框架100可由金属的平坦或大体上平坦的零件形成，所述金属例如为铜或铜合金、镀铜或镀铜合金、合金42(42Fe/58Ni)或镀铜钢。引线框架100可由已知用于引线框架中的其它金属或材料形成。在实施例中，引线框架100也可镀有银、金、镍、钯或铜。
可通过已知制造工艺(例如化学蚀刻)形成包括槽110的引线框架100。在化学蚀刻中，可将光致抗蚀剂膜涂覆到引线框架。接着可将含有电路小片踏板102、电引线104、接触垫106和槽110的轮廓的图案光掩模放置在所述光致抗蚀剂膜上。接着可暴露所述光致抗蚀剂膜并进行显影以将光致抗蚀剂从待蚀刻的导电层上的区域移除。接着使用例如氯化铁或类似物的蚀刻剂蚀刻掉所述曝露区域，以界定引线框架100中的图案。接着可移除光致抗蚀剂。其它已知的化学蚀刻工艺是已知的。
可替代地以使用连续模的机械冲压工艺形成引线框架100。如已知，机械冲压使用多组模以连续步骤从金属条机械地移除金属。
现参看图7，在引线框架形成之后，可将一个或一个以上半导体电路小片120安装到引线框架100的电路小片踏板102以形成集成电路。在将引线框架100用于Transflash快闪存储器卡中的实施例中，半导体电路小片120可包括快闪存储器芯片(NOR/NAND)和例如ASIC等控制器芯片。然而，应了解，引线框架100可用于具有曲线形边缘的多种半导体封装中，且在由引线框架100和半导体电路小片120形成的半导体封装内可包括多种不同半导体芯片和组件。可使用介电电路小片附接化合物、膜或带以已知方式将所述一个或一个以上半导体电路小片120安装到引线框架100。在包括多个电路小片的实施例中，可使用已知的线结合技术使电路小片彼此线结合。一旦半导体电路小片120固定到引线框架100，便可在已知线结合过程中使用线122(图7和图9)将所述电路小片线结合到引线框架引线104。
一旦已在面板90上形成多个集成电路，便使用模制化合物124囊封所述集成电路中的每一者，如图8和图9所示。模制化合物124可为环氧树脂，例如可从总部均位于日本的Sumitomo Corp.和Nitto Denko Corp.购得的环氧树脂。也涵盖来自其它制造商的其它模制化合物。可根据各种工艺(包括通过转移模制或注射模制技术)涂覆模制化合物以在包括所有集成电路的面板90上形成囊封。
在所述工艺中，可将面板90置于具有上模和下模或模帽的模具中。如图8中所示，环绕曲线形槽110的引线框架的部分126可不含模制化合物。可通过在上部模帽中形成镜像图案而实现此模制化合物图案。即，形成具有在囊封工艺期间在部分126处接触面板90的区域的图案的上部模帽以防止模制化合物沉积在部分126上。
在模制步骤之后，可将一标记施加到模制化合物124。所述标记可(例如)为印刷在模制化合物表面上的用于每一集成电路的标志或其它信息。所述标记可(例如)指示装置的制造商和/或型号。所述标记步骤对于本发明并非关键且在替代实施例可将其省略。
如在图9的横截面图中所见，引线框架100可形成在两个平面内。包括接触垫106的引线框架100的第一部分可位于囊封封装的底部处的平面中。接触垫106可暴露于环绕囊封封装的外部环境中，以允许所述封装与外部电子装置之间的电连接。支撑一个或一个以上半导体装置120的引线框架的第二部分可与囊封封装的底部隔开以在半导体装置120的下方提供模制化合物作为装置120的支撑物。应了解，在替代实施例中，引线框架可位于接近囊封封装的底部的单一平面中。
在囊封和标记之后，接着可通过将面板90中的集成电路切割为多个个别集成电路封装而单一化面板90中的囊封集成电路的每一者。如本文中所使用，术语切割用于指用以将集成电路分离为个别集成电路封装的切割、锯切、冲压或其它方法。槽110有利地允许使用仅进行直线切割的锯条来单一化每一引线框架100。锯切通常比例如常用以实现曲线切割形状的喷水切割、激光切割的其它切割方法花费少、耗时短且要求较少设备。
然而，应了解，在替代实施例中，可通过多种切割方法来单一化引线框架100，所述切割方法例如为喷水切割、激光切割、水导向型激光切割、干燥媒体切割和金刚石涂层丝切割。也可将水与激光切割一起使用以帮助补充或集中其效果。题为“用于有效地生产可移除外围卡的方法(Method for Efficiently Producing Removable Peripheral Cards)”的第2004/0259291号经公开美国申请案中揭示对从面板切割集成电路和借此可实现的形状的另一描述，所述案转让给本发明的所有者且其全文以引用的方式并入本文中。应了解，在替代实施例中，可通过不同于上述过程的其它过程形成单一化的集成电路。
根据本发明，可通过沿图10和图11中所示的直基准线或切割线140而进行的切割来单一化每一集成电路。图12为在沿直切割线140切割之后的经单一化集成电路封装142连同与所述封装142和引线框架面板90分离的引线框架片段144的俯视图。如图12中所见，即使仅沿直切割线140进行切割，曲线形槽110也允许已完成的封装142具有曲线形边缘。可以多种配置提供槽110以允许已完成的封装在需要时具有任何曲线形状。具体来说，可使用具有至少两个点的槽110来实现任何曲线形状，所述至少两个点与直切割线140中的一者或一者以上相交。
在图10到图12的实施例中，半导体封装142可为Transflash快闪存储器卡。如本发明的背景技术中所论述，Transflash存储器卡包括圆角、凹口(40，现有技术图3和图4)和凹陷区(42)。根据本发明的方面，已完成的半导体封装142中的所有曲线形边缘可由槽110在引线框架100和封装142中界定。因此，举例来说，已完成的封装142中的凹口150(图12)可由槽110a(图11；槽110a、110b和110c是槽110的所有特定实例)界定。成角度的凹陷区152和右上部圆角154由槽110b在引线框架100和封装142上界定。且剩余圆角156由槽110c在引线框架和封装中界定。由槽110界定的引线框架100的边缘形成引线框架100的外边缘的部分。
槽110可具有可通过蚀刻或压印方法形成的任何宽度，例如50μm或更大。槽110可在不位于直切割线140上的区域中围绕引线框架100的周边而延伸。然而，在实施例中，所述槽中的一者或一者以上可位于沿着切割线140的一部分处。此外，在上述实施例中，切割线140具有矩形占据面积，且封装142中的所有曲线形边缘是由槽110形成。然而，在替代实施例中，应了解，封装142中的曲线形边缘中的一些可由槽110形成，且可例如通过喷水切割、激光切割、水导向型激光切割、干燥媒体切割或进行曲线形切割的其它方法切割穿过引线框架100而形成封装142中的曲线形边缘中的其它边缘。
已将槽110中的每一者描述为由两个大体平行的边缘(内边缘和外边缘)界定。所述内边缘形成已完成的封装142的外边缘的一部分。所述外边缘则并不形成已完成的封装142的外边缘的一部分。应了解，在替代实施例中，槽110的内边缘和外边缘不需要彼此平行。举例来说，图13和图14展示其中槽110仅为切除区146的实施例。切除区146的内边缘与上述实施例的内边缘相同(即，仅为封装的在曲线形部分处的外部周边)。因此，当沿着如图14所示和上述的切割线140切割时，经单一化的半导体封装142的已完成形状如上所述。
图15中展示本发明的另一实施例。如图15中所见，槽110大体上围绕引线框架100的整个周边和经囊封半导体封装142延伸。在图15的实施例中，引线框架100通过围绕封装的周边隔开定位的多个系杆160而连接到面板90。图15中所示的引线框架100完全适合于其中通过从面板90冲压引线框架而单一化引线框架100的实施例。即，可通过冲压系杆160而单一化封装142。然而，在其它实施例中，可通过上述任何切割方法从面板90单一化图15的引线框架。
在通过切割或冲压分离封装142之后，所述封装的边缘可为粗糙的和/或来自引线框架的金属片段可仍附接在其上。举例来说，在冲压图15的引线框架之后，可留下系杆160的片段。因此，在通过切割或冲压分离封装142之后，可执行去毛刺过程以使在切割或冲压引线框架之后留下的任何粗糙边缘和/或金属片段平滑。可通过用于使已完成封装142的边缘平滑的激光、喷水或其它已知装置来执行所述去毛刺过程。
虽然已相对于Transflash存储器卡描述了本发明的实施例，但应了解，本发明可用于具有一个或一个以上曲线边缘的多种其它半导体装置，包括(例如)SD卡和微型SD卡。还涵盖其它装置。
出于说明和描述的目的，已呈现了本发明的先前详细描述。不期望其是详尽的或将本发明限于所揭示的精确形式。依照上文的教示，可进行许多修改和变化。所阐述的实施例经选择以最佳地阐释本发明的原理和其实际应用，借此使所属领域的技术人员在各种实施例中且以适合于所涵盖的特殊用途的各种修改最佳地利用本发明。希望本发明的范围是由本文所附权利要求书界定。

Claims (7)

1.一种制造经囊封半导体封装的方法，其包含以下步骤：
(a)形成具有以所述半导体封装的外边缘的形状围绕所述引线框架的一部分延伸的槽的引线框架，所述部分在离散点处附接到环绕所述部分的所述引线框架；
(b)将半导体电路小片附接到所述引线框架的由所述槽界定的所述部分；
(c)将所述引线框架的由所述槽界定的所述部分囊封在模塑料中；
(d)断开所述离散点以从所述引线框架单一化所述半导体封装。
2.根据权利要求1所述的制造经囊封半导体封装的方法，所述断开所述离散点以从所述引线框架单一化所述半导体封装的步骤(d)包含从所述引线框架冲压所述半导体封装的步骤。
3.根据权利要求1所述的制造经囊封半导体封装的方法，所述形成具有围绕所述引线框架的一部分延伸的槽的引线框架的步骤(a)包含在所述引线框架中蚀刻所述槽的步骤。
4.根据权利要求1所述的制造经囊封半导体封装的方法，所述形成具有围绕所述引线框架的一部分延伸的槽的引线框架的步骤(a)包含在所述引线框架中压印所述槽的步骤。
5.根据权利要求1所述的制造经囊封半导体封装的方法，所述形成具有围绕所述引线框架的一部分延伸的槽的引线框架的步骤(a)包含以Transflash快闪存储器装置的外边缘的形状形成所述槽的步骤。
6.根据权利要求1所述的制造经囊封半导体封装的方法，所述形成具有围绕所述引线框架的一部分延伸的槽的引线框架的步骤(a)包含以安全数字快闪存储器装置的外边缘的形状形成所述槽的步骤。
7.根据权利要求1所述的制造经囊封半导体封装的方法，其进一步包含在从所述引线框架单一化所述半导体封装之后给所述半导体封装去毛刺的步骤。
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CN101351883A (zh) 2009-01-21
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US20090134502A1 (en) 2009-05-28
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