TW200713512A - Semiconductor memory device and method of production - Google Patents
Semiconductor memory device and method of productionInfo
- Publication number
- TW200713512A TW200713512A TW095130175A TW95130175A TW200713512A TW 200713512 A TW200713512 A TW 200713512A TW 095130175 A TW095130175 A TW 095130175A TW 95130175 A TW95130175 A TW 95130175A TW 200713512 A TW200713512 A TW 200713512A
- Authority
- TW
- Taiwan
- Prior art keywords
- bit lines
- areas
- memory cell
- cell array
- hard mask
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
Landscapes
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/241,878 US7642158B2 (en) | 2005-09-30 | 2005-09-30 | Semiconductor memory device and method of production |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200713512A true TW200713512A (en) | 2007-04-01 |
Family
ID=37901089
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095130175A TW200713512A (en) | 2005-09-30 | 2006-08-16 | Semiconductor memory device and method of production |
Country Status (5)
Country | Link |
---|---|
US (1) | US7642158B2 (zh) |
JP (1) | JP2007103920A (zh) |
CN (1) | CN100508180C (zh) |
DE (1) | DE102005048197B3 (zh) |
TW (1) | TW200713512A (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070264760A1 (en) * | 2006-05-15 | 2007-11-15 | Martin Roessiger | Method of forming a memory cell array |
DE102009002905A1 (de) | 2009-05-07 | 2010-11-11 | Robert Bosch Gmbh | Verfahren und Schaltung mit optischer Datenübertragung |
US8293625B2 (en) | 2011-01-19 | 2012-10-23 | International Business Machines Corporation | Structure and method for hard mask removal on an SOI substrate without using CMP process |
US8916432B1 (en) | 2014-01-21 | 2014-12-23 | Cypress Semiconductor Corporation | Methods to integrate SONOS into CMOS flow |
JP2019102520A (ja) * | 2017-11-29 | 2019-06-24 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
CN113841239A (zh) * | 2021-08-26 | 2021-12-24 | 长江存储科技有限责任公司 | 三维nand存储器及其制造方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4051175B2 (ja) * | 2000-11-17 | 2008-02-20 | スパンション エルエルシー | 不揮発性半導体メモリ装置および製造方法 |
DE10110150A1 (de) | 2001-03-02 | 2002-09-19 | Infineon Technologies Ag | Verfahren zum Herstellen von metallischen Bitleitungen für Speicherzellenarrays, Verfahren zum Herstellen von Speicherzellenarrays und Speicherzellenarray |
KR100487523B1 (ko) * | 2002-04-15 | 2005-05-03 | 삼성전자주식회사 | 부유트랩형 비휘발성 메모리 소자 및 그 제조방법 |
DE10226964A1 (de) * | 2002-06-17 | 2004-01-08 | Infineon Technologies Ag | Verfahren zur Herstellung einer NROM-Speicherzellenanordnung |
US6624460B1 (en) | 2002-08-15 | 2003-09-23 | Macronix International Co., Ltd. | Memory device with low resistance buried bit lines |
JP2004193178A (ja) * | 2002-12-06 | 2004-07-08 | Fasl Japan 株式会社 | 半導体記憶装置及びその製造方法 |
JP2004193226A (ja) | 2002-12-09 | 2004-07-08 | Nec Electronics Corp | 不揮発性半導体記憶装置およびその製造方法 |
TW578273B (en) | 2003-01-23 | 2004-03-01 | Macronix Int Co Ltd | Memory device that comprises self-aligned contact and fabrication method thereof |
DE10314274B3 (de) * | 2003-03-29 | 2004-09-16 | Infineon Technologies Ag | Verfahren zum Herstellen einer Kontaktlochebene in einem Speicherbaustein |
JP2005158853A (ja) * | 2003-11-21 | 2005-06-16 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
WO2006090477A1 (ja) * | 2005-02-25 | 2006-08-31 | Spansion Llc | 半導体装置及びその製造方法 |
-
2005
- 2005-09-30 US US11/241,878 patent/US7642158B2/en not_active Expired - Fee Related
- 2005-10-07 DE DE102005048197A patent/DE102005048197B3/de not_active Expired - Fee Related
-
2006
- 2006-08-16 TW TW095130175A patent/TW200713512A/zh unknown
- 2006-08-30 JP JP2006232929A patent/JP2007103920A/ja active Pending
- 2006-09-30 CN CNB2006101420299A patent/CN100508180C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2007103920A (ja) | 2007-04-19 |
CN100508180C (zh) | 2009-07-01 |
US20070075381A1 (en) | 2007-04-05 |
DE102005048197B3 (de) | 2007-04-26 |
US7642158B2 (en) | 2010-01-05 |
CN1941356A (zh) | 2007-04-04 |
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