TW200709587A - Circuit for measuring an eye size of data, and method of measuring the eye size of data - Google Patents
Circuit for measuring an eye size of data, and method of measuring the eye size of dataInfo
- Publication number
- TW200709587A TW200709587A TW095130599A TW95130599A TW200709587A TW 200709587 A TW200709587 A TW 200709587A TW 095130599 A TW095130599 A TW 095130599A TW 95130599 A TW95130599 A TW 95130599A TW 200709587 A TW200709587 A TW 200709587A
- Authority
- TW
- Taiwan
- Prior art keywords
- data
- eye size
- measuring
- clock signals
- circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03878—Line equalisers; line build-out devices
- H04L25/03885—Line equalisers; line build-out devices adaptive
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/24—Testing correct operation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/0335—Arrangements for removing intersymbol interference characterised by the type of transmission
- H04L2025/03356—Baseband transmission
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
- H04L7/002—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
- H04L7/0025—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of clock signal
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Theoretical Computer Science (AREA)
- Dc Digital Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050077834A KR100795724B1 (ko) | 2005-08-24 | 2005-08-24 | 아이 사이즈 측정 회로, 데이터 통신 시스템의 수신기 및아이 사이즈 측정 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200709587A true TW200709587A (en) | 2007-03-01 |
Family
ID=37500899
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095130599A TW200709587A (en) | 2005-08-24 | 2006-08-21 | Circuit for measuring an eye size of data, and method of measuring the eye size of data |
Country Status (6)
Country | Link |
---|---|
US (1) | US7697649B2 (zh) |
EP (1) | EP1758287A3 (zh) |
JP (1) | JP2007060655A (zh) |
KR (1) | KR100795724B1 (zh) |
CN (1) | CN1984105A (zh) |
TW (1) | TW200709587A (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI596922B (zh) * | 2016-05-12 | 2017-08-21 | Cerebrex Inc | Data receiving device |
TWI674776B (zh) * | 2014-06-09 | 2019-10-11 | 美商柯斯美光電有限公司 | 眼圖品質監控系統與方法 |
Families Citing this family (43)
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US8243869B2 (en) * | 2006-11-28 | 2012-08-14 | Broadlight Ltd. | Burst mode clock and data recovery circuit and method |
US7925156B2 (en) * | 2007-01-16 | 2011-04-12 | Broadlight, Ltd. | Apparatus and method for measuring the quality of burst signals and performing optical line diagnostics |
KR101300659B1 (ko) * | 2007-01-19 | 2013-08-30 | 삼성전자주식회사 | 등화기를 갖는 수신기 및 그것의 등화방법 |
KR101021205B1 (ko) * | 2007-03-27 | 2011-03-11 | 후지쯔 가부시끼가이샤 | 이퀄라이저 특성 최적화 방법, 전송 시스템, 통신 장치, 및 프로그램을 기록한 컴퓨터 판독 가능한 기록 매체 |
US7916780B2 (en) * | 2007-04-09 | 2011-03-29 | Synerchip Co. Ltd | Adaptive equalizer for use with clock and data recovery circuit of serial communication link |
WO2009003129A2 (en) * | 2007-06-27 | 2008-12-31 | Rambus Inc. | Methods and circuits for adaptive equalization and channel characterization using live data |
US8705603B2 (en) * | 2008-02-05 | 2014-04-22 | Vitesse Semiconductor Corporation | Adaptive data recovery system with input signal equalization |
JP5174493B2 (ja) | 2008-03-06 | 2013-04-03 | 株式会社日立製作所 | 半導体集積回路装置及びアイ開口マージン評価方法 |
KR101083674B1 (ko) * | 2008-11-11 | 2011-11-16 | 주식회사 하이닉스반도체 | 다중 위상 클럭 생성 회로 |
US8471960B2 (en) | 2008-11-24 | 2013-06-25 | Mediatek Inc. | Method capable of avoiding data error from incorrect sampling points |
JP2010278720A (ja) * | 2009-05-28 | 2010-12-09 | Renesas Electronics Corp | 信号処理装置、信号処理方法、及び信号処理プログラム |
US8249139B2 (en) * | 2009-06-24 | 2012-08-21 | Himax Technologies Limited | Apparatus for data receiving and method for adjusting the same in real time |
US8284888B2 (en) | 2010-01-14 | 2012-10-09 | Ian Kyles | Frequency and phase acquisition of a clock and data recovery circuit without an external reference clock |
US8416902B2 (en) * | 2010-01-14 | 2013-04-09 | Ian Kyles | Clock and data recovery for burst-mode serial signals |
US8526551B2 (en) * | 2010-06-01 | 2013-09-03 | Synopsys, Inc. | Multiple-input, on-chip oscilloscope |
US8553754B2 (en) * | 2010-12-20 | 2013-10-08 | Advanced Micro Devices, Inc. | Method and apparatus for using DFE in a system with non-continuous data |
US8917803B1 (en) | 2011-05-03 | 2014-12-23 | Xilinx, Inc. | Circuits and methods for characterizing a receiver of a communication signal |
EP2530864A1 (en) * | 2011-06-03 | 2012-12-05 | TELEFONAKTIEBOLAGET LM ERICSSON (publ) | Apparatus and Method for Power Saving |
US9071243B2 (en) | 2011-06-30 | 2015-06-30 | Silicon Image, Inc. | Single ended configurable multi-mode driver |
US8760188B2 (en) * | 2011-06-30 | 2014-06-24 | Silicon Image, Inc. | Configurable multi-dimensional driver and receiver |
US8798126B2 (en) * | 2011-10-31 | 2014-08-05 | Hewlett-Packard Development Company, L.P. | Receiver calibration using offset-data error rates |
US8687752B2 (en) * | 2011-11-01 | 2014-04-01 | Qualcomm Incorporated | Method and apparatus for receiver adaptive phase clocked low power serial link |
KR101405242B1 (ko) * | 2012-07-27 | 2014-06-10 | 고려대학교 산학협력단 | 데이터 통신용 수신기 |
GB2504989B (en) * | 2012-08-17 | 2019-11-06 | Image Proc Techniques Ltd | Eye pattern generating apparatus |
US8995514B1 (en) * | 2012-09-28 | 2015-03-31 | Xilinx, Inc. | Methods of and circuits for analyzing a phase of a clock signal for receiving data |
JP5991181B2 (ja) | 2012-12-12 | 2016-09-14 | 富士通株式会社 | 受信回路 |
US9001943B2 (en) | 2013-03-14 | 2015-04-07 | Altera Corporation | Digital equalizer adaptation using on-die instrument |
JP6241129B2 (ja) * | 2013-08-19 | 2017-12-06 | 富士ゼロックス株式会社 | 伝送装置、画像形成装置、及び制御プログラム |
KR102163877B1 (ko) | 2014-10-13 | 2020-10-12 | 삼성전자 주식회사 | Serdes 회로 구동 방법 |
US9356775B1 (en) * | 2015-07-09 | 2016-05-31 | Xilinx, Inc. | Clock data recovery (CDR) phase walk scheme in a phase-interpolater-based transceiver system |
TWI580215B (zh) * | 2015-07-31 | 2017-04-21 | 群聯電子股份有限公司 | 訊號調變方法、可適性等化器及記憶體儲存裝置 |
KR102450325B1 (ko) | 2015-12-28 | 2022-10-04 | 에스케이하이닉스 주식회사 | 반도체 장치 |
CN107864104B (zh) | 2016-09-21 | 2020-07-10 | 联发科技股份有限公司 | 数字信号的处理方法及电子设备 |
US9800438B1 (en) * | 2016-10-25 | 2017-10-24 | Xilinx, Inc. | Built-in eye scan for ADC-based receiver |
US10110266B2 (en) * | 2016-12-26 | 2018-10-23 | SK Hynix Inc. | Symbol interference cancellation circuit and system including the same |
KR102478782B1 (ko) | 2018-05-18 | 2022-12-20 | 삼성전자주식회사 | 시그마 레벨들간의 차이를 계산하는 아이 오프닝 측정 회로, 그것을 포함하는 수신기, 그리고 아이 오프닝을 측정하기 위한 방법 |
TWI679860B (zh) * | 2018-07-06 | 2019-12-11 | 創意電子股份有限公司 | 眼圖量測裝置與眼圖量測方法 |
KR20200032807A (ko) * | 2018-09-18 | 2020-03-27 | 삼성디스플레이 주식회사 | 수신기 및 이를 포함하는 송수신기 |
KR20200140019A (ko) * | 2019-06-05 | 2020-12-15 | 삼성전자주식회사 | 반도체 장치, 반도체 시스템 및 반도체 장치의 동작 방법 |
WO2020256165A1 (ko) * | 2019-06-18 | 2020-12-24 | 엘지전자 주식회사 | 신호 수신 방법 및 신호 수신 멀티미디어 디바이스 |
JP2021047967A (ja) * | 2019-09-20 | 2021-03-25 | キオクシア株式会社 | 半導体デバイス |
KR20210142336A (ko) * | 2020-05-18 | 2021-11-25 | 삼성전자주식회사 | 클럭 및 데이터 복구 회로 및 이를 구비하는 수신 장치 |
KR20220022398A (ko) * | 2020-08-18 | 2022-02-25 | 삼성전자주식회사 | 적응적 등화를 수행하는 수신 회로 및 이를 포함하는 시스템 |
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KR950008397B1 (ko) * | 1992-04-21 | 1995-07-28 | 이병기 | 분산 표본 스크램블링 시스템 |
US6266799B1 (en) * | 1997-10-02 | 2001-07-24 | Xaqti, Corporation | Multi-phase data/clock recovery circuitry and methods for implementing same |
US20020085656A1 (en) * | 2000-08-30 | 2002-07-04 | Lee Sang-Hyun | Data recovery using data eye tracking |
JP3668117B2 (ja) | 2000-09-22 | 2005-07-06 | 株式会社東芝 | サンプリング処理装置及びサンプリング処理方法及びサンプリングクロックジッタ制御プログラム |
US6757327B1 (en) | 2000-10-02 | 2004-06-29 | Lsi Logic Corporation | Serial data communication receiver having adaptive termination resistors |
US6731683B1 (en) | 2000-10-02 | 2004-05-04 | Lsi Logic Corporation | Serial data communication receiver having adaptive equalization |
US6738922B1 (en) * | 2000-10-06 | 2004-05-18 | Vitesse Semiconductor Corporation | Clock recovery unit which uses a detected frequency difference signal to help establish phase lock between a transmitted data signal and a recovered clock signal |
DE10052279A1 (de) | 2000-10-20 | 2002-04-25 | Alcatel Sa | Schneller Augenmonitor und Empfänger mit schnellem Augenmonitor |
US7224911B2 (en) * | 2001-06-07 | 2007-05-29 | Jds Uniphase Corporation | Adaptive distortion compensation in optical fiber communication networks |
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US7336749B2 (en) * | 2004-05-18 | 2008-02-26 | Rambus Inc. | Statistical margin test methods and circuits |
US7408981B2 (en) * | 2003-05-20 | 2008-08-05 | Rambus Inc. | Methods and circuits for performing margining tests in the presence of a decision feedback equalizer |
US7782932B2 (en) * | 2004-04-23 | 2010-08-24 | Texas Instruments Incorporated | Circuit and method for evaluating the performance of an adaptive decision feedback equalizer-based serializer deserializer and serdes incorporating the same |
US7643576B2 (en) * | 2004-05-18 | 2010-01-05 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Data-signal-recovery circuit, data-signal-characterizing circuit, and related integrated circuits, systems, and methods |
US7639736B2 (en) * | 2004-05-21 | 2009-12-29 | Rambus Inc. | Adaptive receive-side equalization |
KR100643605B1 (ko) | 2004-08-16 | 2006-11-10 | 삼성전자주식회사 | 적응형 프리 엠퍼시스 장치, 데이터 통신용 송신기,데이터 통신용 송수신 장치 및 적응형 프리 엠퍼시스 방법 |
US7817767B2 (en) * | 2004-12-23 | 2010-10-19 | Rambus Inc. | Processor-controlled clock-data recovery |
-
2005
- 2005-08-24 KR KR1020050077834A patent/KR100795724B1/ko active IP Right Grant
-
2006
- 2006-08-09 JP JP2006217099A patent/JP2007060655A/ja not_active Withdrawn
- 2006-08-16 US US11/505,054 patent/US7697649B2/en not_active Expired - Fee Related
- 2006-08-19 EP EP06017317A patent/EP1758287A3/en not_active Withdrawn
- 2006-08-21 TW TW095130599A patent/TW200709587A/zh unknown
- 2006-08-24 CN CNA2006101635939A patent/CN1984105A/zh active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI674776B (zh) * | 2014-06-09 | 2019-10-11 | 美商柯斯美光電有限公司 | 眼圖品質監控系統與方法 |
TWI596922B (zh) * | 2016-05-12 | 2017-08-21 | Cerebrex Inc | Data receiving device |
Also Published As
Publication number | Publication date |
---|---|
US7697649B2 (en) | 2010-04-13 |
EP1758287A3 (en) | 2007-10-17 |
US20070047680A1 (en) | 2007-03-01 |
KR100795724B1 (ko) | 2008-01-17 |
CN1984105A (zh) | 2007-06-20 |
JP2007060655A (ja) | 2007-03-08 |
KR20070023341A (ko) | 2007-02-28 |
EP1758287A2 (en) | 2007-02-28 |
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