TW200708888A - Substrate, lithographic multiple exposure method, machine readable medium - Google Patents

Substrate, lithographic multiple exposure method, machine readable medium

Info

Publication number
TW200708888A
TW200708888A TW095124169A TW95124169A TW200708888A TW 200708888 A TW200708888 A TW 200708888A TW 095124169 A TW095124169 A TW 095124169A TW 95124169 A TW95124169 A TW 95124169A TW 200708888 A TW200708888 A TW 200708888A
Authority
TW
Taiwan
Prior art keywords
substrate
lithographic
readable medium
machine readable
target layer
Prior art date
Application number
TW095124169A
Other languages
English (en)
Inventor
Alek Chi-Heng Chen
Original Assignee
Asml Netherlands Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asml Netherlands Bv filed Critical Asml Netherlands Bv
Publication of TW200708888A publication Critical patent/TW200708888A/zh

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70466—Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0035—Multiple processes, e.g. applying a further resist layer on an already in a previously step, processed pattern or textured surface
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Materials For Photolithography (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Drying Of Semiconductors (AREA)
TW095124169A 2005-07-14 2006-07-03 Substrate, lithographic multiple exposure method, machine readable medium TW200708888A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US69894305P 2005-07-14 2005-07-14
US11/214,049 US20070018286A1 (en) 2005-07-14 2005-08-30 Substrate, lithographic multiple exposure method, machine readable medium

Publications (1)

Publication Number Publication Date
TW200708888A true TW200708888A (en) 2007-03-01

Family

ID=37311925

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095124169A TW200708888A (en) 2005-07-14 2006-07-03 Substrate, lithographic multiple exposure method, machine readable medium

Country Status (6)

Country Link
US (1) US20070018286A1 (zh)
EP (1) EP1744211A1 (zh)
JP (1) JP4482543B2 (zh)
KR (1) KR20070009481A (zh)
SG (1) SG129387A1 (zh)
TW (1) TW200708888A (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109841504A (zh) * 2017-11-27 2019-06-04 南亚科技股份有限公司 半导体结构的制造方法
CN113296371A (zh) * 2021-05-20 2021-08-24 京东方科技集团股份有限公司 一种曝光方法、装置及电子设备
TWI743579B (zh) * 2018-12-28 2021-10-21 德商科尼亞克公司 微影設備及控制微影設備的方法

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US7914974B2 (en) * 2006-08-18 2011-03-29 Brewer Science Inc. Anti-reflective imaging layer for multiple patterning process
JP5000250B2 (ja) * 2006-09-29 2012-08-15 東京応化工業株式会社 パターン形成方法
JP4987411B2 (ja) * 2006-09-29 2012-07-25 東京応化工業株式会社 パターン形成方法
JP5220317B2 (ja) * 2007-01-11 2013-06-26 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2008227465A (ja) * 2007-02-14 2008-09-25 Renesas Technology Corp 半導体装置の製造方法
NL1035771A1 (nl) * 2007-08-20 2009-02-23 Asml Netherlands Bv Lithographic Method and Method for Testing a Lithographic Apparatus.
JP4932671B2 (ja) 2007-10-26 2012-05-16 東京エレクトロン株式会社 エッチングマスクの形成方法、制御プログラム及びプログラム記憶媒体
SG153748A1 (en) * 2007-12-17 2009-07-29 Asml Holding Nv Lithographic method and apparatus
EP2245512B1 (en) 2008-01-29 2019-09-11 Brewer Science, Inc. On-track process for patterning hardmask by multiple dark field exposures
JP4550126B2 (ja) * 2008-04-25 2010-09-22 東京エレクトロン株式会社 エッチングマスク形成方法、エッチング方法、および半導体デバイスの製造方法
JP2009265505A (ja) * 2008-04-28 2009-11-12 Jsr Corp パターン形成方法及び微細パターン形成用樹脂組成物
JP5341399B2 (ja) * 2008-06-03 2013-11-13 ルネサスエレクトロニクス株式会社 パターン検証方法、パターン検証装置、プログラム、及び半導体装置の製造方法
US20110104901A1 (en) * 2008-06-13 2011-05-05 Tokyo Electron Limited Semiconductor device manufacturing method
US8293460B2 (en) * 2008-06-16 2012-10-23 Applied Materials, Inc. Double exposure patterning with carbonaceous hardmask
US9640396B2 (en) 2009-01-07 2017-05-02 Brewer Science Inc. Spin-on spacer materials for double- and triple-patterning lithography
US8377795B2 (en) * 2009-02-12 2013-02-19 International Business Machines Corporation Cut first methodology for double exposure double etch integration
SG10201508629SA (en) 2010-10-28 2015-11-27 Univ Singapore Lithography method and apparatus
NL2008311A (en) 2011-04-04 2012-10-08 Asml Netherlands Bv Integration of lithography apparatus and mask optimization process with multiple patterning process.
US8835101B1 (en) * 2011-06-07 2014-09-16 Iii Holdings 1, Llc Method for fabricating a circuit
US10283437B2 (en) * 2012-11-27 2019-05-07 Advanced Micro Devices, Inc. Metal density distribution for double pattern lithography
KR102381930B1 (ko) * 2014-03-13 2022-04-04 내셔널 유니버시티 오브 싱가포르 광학 간섭 장치
US10916427B2 (en) 2018-07-11 2021-02-09 United Microelectronics Corp. Forming contact holes using litho-etch-litho-etch approach

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US4859573A (en) * 1984-08-13 1989-08-22 Ncr Corporation Multiple photoresist layer process using selective hardening
JPS63132446A (ja) * 1986-10-30 1988-06-04 Mitsubishi Electric Corp 半導体製造方法
US5652084A (en) * 1994-12-22 1997-07-29 Cypress Semiconductor Corporation Method for reduced pitch lithography
DE19526011C1 (de) * 1995-07-17 1996-11-28 Siemens Ag Verfahren zur Herstellung von sublithographischen Ätzmasken
KR100223325B1 (ko) * 1995-12-15 1999-10-15 김영환 반도체 장치의 미세패턴 제조방법
US5837428A (en) * 1996-08-22 1998-11-17 Taiwan Semiconductor Manufacturing Compnay Ltd. Etching method for extending i-line photolithography to 0.25 micron linewidth
US5902133A (en) * 1997-08-13 1999-05-11 Vanguard International Semiconductor Corporation Method of forming a narrow polysilicon gate with i-line lithography
FR2791472B1 (fr) * 1999-03-26 2002-07-05 Commissariat Energie Atomique Procede de creation de lignes de connexion et de points de contact sous-jacents dans un substrat dielectrique
US6110837A (en) * 1999-04-28 2000-08-29 Worldwide Semiconductor Manufacturing Corp. Method for forming a hard mask of half critical dimension
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JP2002026122A (ja) * 2000-07-04 2002-01-25 Sony Corp 半導体装置の製造方法
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109841504A (zh) * 2017-11-27 2019-06-04 南亚科技股份有限公司 半导体结构的制造方法
CN109841504B (zh) * 2017-11-27 2023-07-28 南亚科技股份有限公司 半导体结构的制造方法
TWI743579B (zh) * 2018-12-28 2021-10-21 德商科尼亞克公司 微影設備及控制微影設備的方法
US11181830B2 (en) 2018-12-28 2021-11-23 Qoniac Gmbh Lithographic apparatus and method of controlling a lithographic apparatus
CN113296371A (zh) * 2021-05-20 2021-08-24 京东方科技集团股份有限公司 一种曝光方法、装置及电子设备

Also Published As

Publication number Publication date
KR20070009481A (ko) 2007-01-18
EP1744211A1 (en) 2007-01-17
SG129387A1 (en) 2007-02-26
JP4482543B2 (ja) 2010-06-16
US20070018286A1 (en) 2007-01-25
JP2007027742A (ja) 2007-02-01

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