TW200631133A - Method for fabricating capactior of semiconductor memory device using amorphous carbon - Google Patents
Method for fabricating capactior of semiconductor memory device using amorphous carbonInfo
- Publication number
- TW200631133A TW200631133A TW094145814A TW94145814A TW200631133A TW 200631133 A TW200631133 A TW 200631133A TW 094145814 A TW094145814 A TW 094145814A TW 94145814 A TW94145814 A TW 94145814A TW 200631133 A TW200631133 A TW 200631133A
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- forming
- protective barrier
- barrier layer
- fabricating
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 5
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 229910003481 amorphous carbon Inorganic materials 0.000 title 1
- 239000010410 layer Substances 0.000 abstract 12
- 230000004888 barrier function Effects 0.000 abstract 5
- 230000001681 protective effect Effects 0.000 abstract 5
- 238000009413 insulation Methods 0.000 abstract 3
- 239000011229 interlayer Substances 0.000 abstract 3
- 238000005530 etching Methods 0.000 abstract 1
- 230000000149 penetrating effect Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
- H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020040113515A KR100688058B1 (ko) | 2004-12-28 | 2004-12-28 | 비정질카본을 이용한 반도체메모리장치의 캐패시터 제조방법 |
| KR1020040113514A KR100780611B1 (ko) | 2004-12-28 | 2004-12-28 | 비정질카본을 이용한 반도체메모리장치의 캐패시터 제조방법 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200631133A true TW200631133A (en) | 2006-09-01 |
| TWI289903B TWI289903B (en) | 2007-11-11 |
Family
ID=36612264
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW094145814A TWI289903B (en) | 2004-12-28 | 2005-12-22 | Method for fabricating capacitor of semiconductor memory device using amorphous carbon |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7582525B2 (zh) |
| JP (1) | JP4916168B2 (zh) |
| TW (1) | TWI289903B (zh) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100722988B1 (ko) * | 2005-08-25 | 2007-05-30 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조방법 |
| KR20090017120A (ko) * | 2007-08-14 | 2009-02-18 | 삼성전자주식회사 | 감광성 조성물을 이용한 블로킹 패턴의 형성 방법 및반도체 장치의 제조 방법 |
| KR102402761B1 (ko) | 2015-10-30 | 2022-05-26 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
| WO2017111804A1 (en) * | 2015-12-24 | 2017-06-29 | Intel Corporation | Structure for improved shorting margin and time dependent dielectric breakdown in interconnect structures |
| JP7189814B2 (ja) * | 2019-03-18 | 2022-12-14 | キオクシア株式会社 | 半導体記憶装置 |
| US11501812B2 (en) * | 2020-07-31 | 2022-11-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor devices including ferroelectric memory and methods of forming the same |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19980021248A (ko) | 1996-09-14 | 1998-06-25 | 김광호 | 반도체소자 미세패턴 형성방법 |
| JPH11251540A (ja) * | 1998-02-26 | 1999-09-17 | Oki Electric Ind Co Ltd | 半導体装置およびその製造方法 |
| JPH11317504A (ja) * | 1998-05-01 | 1999-11-16 | Nec Corp | 半導体記憶装置の製造方法 |
| TW405258B (en) | 1999-04-30 | 2000-09-11 | Taiwan Semiconductor Mfg | Manufacture method of DRAM capacitor |
| KR100311050B1 (ko) * | 1999-12-14 | 2001-11-05 | 윤종용 | 커패시터의 전극 제조 방법 |
| JP3993972B2 (ja) * | 2000-08-25 | 2007-10-17 | 富士通株式会社 | 半導体装置の製造方法と半導体装置 |
| KR100355239B1 (ko) * | 2000-12-26 | 2002-10-11 | 삼성전자 주식회사 | 실린더형 커패시터를 갖는 반도체 메모리 소자 및 그제조방법 |
| KR100382732B1 (ko) | 2001-01-10 | 2003-05-09 | 삼성전자주식회사 | 반도체 소자의 실린더형 커패시터 제조 방법 |
| KR100393229B1 (ko) | 2001-08-11 | 2003-07-31 | 삼성전자주식회사 | 자기 정렬된 게이트 구조를 포함하는 불휘발성 메모리장치 제조 방법 및 이에 의한 불휘발성 메모리 장치 |
| JP4005805B2 (ja) * | 2001-12-17 | 2007-11-14 | 株式会社東芝 | 半導体装置 |
| JP2003224206A (ja) * | 2002-01-29 | 2003-08-08 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| JP4046588B2 (ja) * | 2002-10-10 | 2008-02-13 | Ｎｅｃエレクトロニクス株式会社 | キャパシタの製造方法 |
| KR100476936B1 (ko) | 2002-10-30 | 2005-03-17 | 삼성전자주식회사 | 엠아이엠 구조의 커패시터를 갖는 반도체소자 및 그형성방법 |
| JP2004247559A (ja) | 2003-02-14 | 2004-09-02 | Elpida Memory Inc | 半導体装置及びその製造方法 |
| KR100532434B1 (ko) | 2003-05-09 | 2005-11-30 | 삼성전자주식회사 | 반도체 메모리 소자의 커패시터 제조 방법 |
| KR100587635B1 (ko) | 2003-06-10 | 2006-06-07 | 주식회사 하이닉스반도체 | 반도체소자의 제조 방법 |
| KR100510558B1 (ko) | 2003-12-13 | 2005-08-26 | 삼성전자주식회사 | 패턴 형성 방법 |
| KR100539268B1 (ko) * | 2004-06-24 | 2005-12-27 | 삼성전자주식회사 | 반도체 메모리 소자의 제조 방법 |
| KR20060038626A (ko) | 2004-10-30 | 2006-05-04 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
-
2005
- 2005-12-16 JP JP2005362813A patent/JP4916168B2/ja not_active Expired - Fee Related
- 2005-12-20 US US11/314,068 patent/US7582525B2/en not_active Expired - Fee Related
- 2005-12-22 TW TW094145814A patent/TWI289903B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| JP4916168B2 (ja) | 2012-04-11 |
| JP2006191025A (ja) | 2006-07-20 |
| US20060141736A1 (en) | 2006-06-29 |
| TWI289903B (en) | 2007-11-11 |
| US7582525B2 (en) | 2009-09-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |