TW200630773A - Spread spectrum clock generating apparatus - Google Patents

Spread spectrum clock generating apparatus

Info

Publication number
TW200630773A
TW200630773A TW094142991A TW94142991A TW200630773A TW 200630773 A TW200630773 A TW 200630773A TW 094142991 A TW094142991 A TW 094142991A TW 94142991 A TW94142991 A TW 94142991A TW 200630773 A TW200630773 A TW 200630773A
Authority
TW
Taiwan
Prior art keywords
signal
frequency
phase
clock
clock signal
Prior art date
Application number
TW094142991A
Other languages
English (en)
Other versions
TWI320880B (en
Inventor
Kazuo Ogasawara
Original Assignee
Nec Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Electronics Corp filed Critical Nec Electronics Corp
Publication of TW200630773A publication Critical patent/TW200630773A/zh
Application granted granted Critical
Publication of TWI320880B publication Critical patent/TWI320880B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H03K3/0315—Ring oscillators
    • H03K3/0322—Ring oscillators with differential cells
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/84—Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B15/00—Suppression or limitation of noise or interference
    • H04B15/02—Reducing interference from electric apparatus by means located at or near the interfering apparatus
    • H04B15/04—Reducing interference from electric apparatus by means located at or near the interfering apparatus the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019—Variable delay
    • H03K2005/00026—Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter
    • H03K2005/00052—Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter by mixing the outputs of fixed delayed signals with each other or with the input signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00234—Layout of the delay element using circuits having two logic levels
    • H03K2005/00247—Layout of the delay element using circuits having two logic levels using counters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B2215/00—Reducing interference at the transmission system level
    • H04B2215/064—Reduction of clock or synthesizer reference frequency harmonics
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B2215/00—Reducing interference at the transmission system level
    • H04B2215/064—Reduction of clock or synthesizer reference frequency harmonics
    • H04B2215/067—Reduction of clock or synthesizer reference frequency harmonics by modulation dispersion

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
TW94142991A 2004-12-08 2005-12-06 Spread spectrum clock generating apparatus TWI320880B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004354862A JP4587798B2 (ja) 2004-12-08 2004-12-08 スペクトラム拡散クロック発生装置

Publications (2)

Publication Number Publication Date
TW200630773A true TW200630773A (en) 2006-09-01
TWI320880B TWI320880B (en) 2010-02-21

Family

ID=36144640

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94142991A TWI320880B (en) 2004-12-08 2005-12-06 Spread spectrum clock generating apparatus

Country Status (3)

Country Link
US (1) US7236039B2 (zh)
JP (1) JP4587798B2 (zh)
TW (1) TWI320880B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI403091B (zh) * 2009-12-30 2013-07-21 Ind Tech Res Inst 洋蔥波形產生器與使用洋蔥波形產生器的展頻時脈產生器

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4510097B2 (ja) * 2006-01-11 2010-07-21 パナソニック株式会社 クロック生成回路
JP4240072B2 (ja) * 2006-07-07 2009-03-18 ヤマハ株式会社 スペクトラム拡散回路
DE102007027070B4 (de) * 2007-06-12 2009-10-15 Texas Instruments Deutschland Gmbh Elektronische Vorrichtung und Verfahren zur chipintegrierten Messung von Jitter
WO2009098603A1 (en) * 2008-02-05 2009-08-13 Arcelik Anonim Sirketi Spread spectrum clock modulator
US8004335B2 (en) * 2008-02-11 2011-08-23 International Business Machines Corporation Phase interpolator system and associated methods
WO2009105095A1 (en) * 2008-02-20 2009-08-27 Hewlett-Packard Development Company, L.P. Redriver with two reference clocks and method of operation thereof
JP4562787B2 (ja) 2008-07-30 2010-10-13 ルネサスエレクトロニクス株式会社 Ｐｌｌ回路
KR20100037427A (ko) * 2008-10-01 2010-04-09 삼성전자주식회사 Ａｃ 커플링 위상 보간기 및 이 장치를 이용하는 지연 고정루프
FR2937198B1 (fr) * 2008-10-13 2010-10-22 St Microelectronics Grenoble Procede et dispositif d'estimation de parametres d'un systeme d'etalement du spectre d'un signal d'horloge.
TWI406120B (zh) * 2010-04-20 2013-08-21 Novatek Microelectronics Corp 展頻電路
JP5772188B2 (ja) * 2011-04-27 2015-09-02 富士通株式会社 位相補間回路および半導体装置
JP2013012917A (ja) * 2011-06-29 2013-01-17 Fujitsu Semiconductor Ltd クロック生成回路、クロック生成方法および半導体集積回路
CN103036537B (zh) * 2011-10-09 2016-02-17 瑞昱半导体股份有限公司 相位内插器、多相位内插装置及内插时钟的产生方法
JP5926125B2 (ja) 2012-06-08 2016-05-25 ルネサスエレクトロニクス株式会社 半導体装置
US9213316B2 (en) * 2014-02-06 2015-12-15 Texas Instruments Incorporated Circuit for detecting and correcting timing errors
JP7376521B2 (ja) * 2021-02-10 2023-11-08 アンリツ株式会社 スペクトラム拡散クロック発生器及びスペクトラム拡散クロック発生方法、パルスパターン発生装置及びパルスパターン発生方法、並びに、誤り率測定装置及び誤り率測定方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5488627A (en) 1993-11-29 1996-01-30 Lexmark International, Inc. Spread spectrum clock generator and associated method
US5631920A (en) * 1993-11-29 1997-05-20 Lexmark International, Inc. Spread spectrum clock generator
US6114914A (en) * 1999-05-19 2000-09-05 Cypress Semiconductor Corp. Fractional synthesis scheme for generating periodic signals
JP2001148690A (ja) 1999-11-19 2001-05-29 Sony Corp クロック発生装置
JP3495311B2 (ja) * 2000-03-24 2004-02-09 Ｎｅｃエレクトロニクス株式会社 クロック制御回路
JP3636657B2 (ja) 2000-12-21 2005-04-06 Ｎｅｃエレクトロニクス株式会社 クロックアンドデータリカバリ回路とそのクロック制御方法
JP2002209109A (ja) * 2001-01-11 2002-07-26 Ricoh Co Ltd タイミング信号生成方法及び装置ならびに画像処理装置
JP4587620B2 (ja) * 2001-09-10 2010-11-24 ルネサスエレクトロニクス株式会社 クロック制御方法と分周回路及びｐｌｌ回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI403091B (zh) * 2009-12-30 2013-07-21 Ind Tech Res Inst 洋蔥波形產生器與使用洋蔥波形產生器的展頻時脈產生器

Also Published As

Publication number Publication date
JP4587798B2 (ja) 2010-11-24
JP2006166049A (ja) 2006-06-22
TWI320880B (en) 2010-02-21
US7236039B2 (en) 2007-06-26
US20060076997A1 (en) 2006-04-13

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees