TW200618252A - A semiconductor device and a manufacturing method of the same - Google Patents

A semiconductor device and a manufacturing method of the same

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Publication number
TW200618252A
TW200618252A TW094115821A TW94115821A TW200618252A TW 200618252 A TW200618252 A TW 200618252A TW 094115821 A TW094115821 A TW 094115821A TW 94115821 A TW94115821 A TW 94115821A TW 200618252 A TW200618252 A TW 200618252A
Authority
TW
Taiwan
Prior art keywords
power mosfet
forming region
low side
side switch
allocated
Prior art date
Application number
TW094115821A
Other languages
Chinese (zh)
Other versions
TWI381514B (en
Inventor
Masaki Shiraishi
Tomoaki Uno
Nobuyoshi Matsuura
Original Assignee
Renesas Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200618252A publication Critical patent/TW200618252A/en
Application granted granted Critical
Publication of TWI381514B publication Critical patent/TWI381514B/en

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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
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    • H01L24/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
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    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/003Constructional details, e.g. physical layout, assembly, wiring or busbar connections

Abstract

The present invention is provided to improve conversion efficiency of power supply voltage of a semiconductor device. In a non-insulating type DC-DC converter wherein a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for low side switch and a Schottky barrier diode D1 connected in parallel with the power MOSFET for low side switch are formed in the same semiconductor chip 5b. The Schottky barrier diode D1 forming region SDR is allocated at the center in the short direction of the semiconductor chip 5b, and the forming region of the power MOSFET of low side is allocated in both sides thereof. Moreover, a plurality of gate fingers 6b are extensively allocated to hold the forming region SDR toward the forming region SDR of the Schottky barrier diode D1 at the center from the gate finger 6a at the area near both longer sides at the main surface of the semiconductor chip 5b.
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US20120306020A1 (en) 2012-12-06
KR20060050185A (en) 2006-05-19
US20140332878A1 (en) 2014-11-13
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TW201230292A (en) 2012-07-16
US20060022298A1 (en) 2006-02-02
US8853846B2 (en) 2014-10-07
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US20140054692A1 (en) 2014-02-27
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US8592904B2 (en) 2013-11-26
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US8519533B2 (en) 2013-08-27
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US9461163B2 (en) 2016-10-04
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