TW200608409A - Testing device and testing method - Google Patents

Testing device and testing method

Info

Publication number
TW200608409A
TW200608409A TW094127995A TW94127995A TW200608409A TW 200608409 A TW200608409 A TW 200608409A TW 094127995 A TW094127995 A TW 094127995A TW 94127995 A TW94127995 A TW 94127995A TW 200608409 A TW200608409 A TW 200608409A
Authority
TW
Taiwan
Prior art keywords
pattern
testing
common
consistent
expected value
Prior art date
Application number
TW094127995A
Other languages
English (en)
Other versions
TWI393144B (zh
Inventor
Masaru Doi
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of TW200608409A publication Critical patent/TW200608409A/zh
Application granted granted Critical
Publication of TWI393144B publication Critical patent/TWI393144B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/36—Data generation devices, e.g. data inverters
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/26—Accessing multiple arrays
    • G11C2029/2602—Concurrent test
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/36—Data generation devices, e.g. data inverters
    • G11C2029/3602—Pattern generator
TW094127995A 2004-08-20 2005-08-17 測試裝置與測試方法 TWI393144B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004241655A JP4542852B2 (ja) 2004-08-20 2004-08-20 試験装置及び試験方法

Publications (2)

Publication Number Publication Date
TW200608409A true TW200608409A (en) 2006-03-01
TWI393144B TWI393144B (zh) 2013-04-11

Family

ID=35907338

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094127995A TWI393144B (zh) 2004-08-20 2005-08-17 測試裝置與測試方法

Country Status (6)

Country Link
US (1) US7765449B2 (zh)
JP (1) JP4542852B2 (zh)
KR (1) KR101162793B1 (zh)
CN (1) CN100587848C (zh)
TW (1) TWI393144B (zh)
WO (1) WO2006018947A1 (zh)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100829402B1 (ko) 2006-11-01 2008-05-15 주식회사 유니테스트 순차적 반도체 테스트 장치
US7788564B2 (en) * 2007-10-12 2010-08-31 Teradyne, Inc. Adjustable test pattern results latency
JP5003953B2 (ja) * 2007-11-12 2012-08-22 横河電機株式会社 半導体試験装置
CN101170791B (zh) * 2007-11-29 2010-06-16 中兴通讯股份有限公司 一种自动上电掉电的测试工装设备
US8826092B2 (en) * 2011-10-25 2014-09-02 International Business Machines Corporation Characterization and validation of processor links
US9020779B2 (en) 2011-10-25 2015-04-28 International Business Machines Corporation Detecting cross-talk on processor links
KR102409926B1 (ko) 2015-08-18 2022-06-16 삼성전자주식회사 테스트 장치 및 이를 포함하는 테스트 시스템
US10591541B2 (en) 2018-08-13 2020-03-17 Micron Technology, Inc. Comparator
JP2022115179A (ja) * 2021-01-28 2022-08-09 キオクシア株式会社 半導体集積回路装置及びその動作方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08248096A (ja) 1995-03-13 1996-09-27 Advantest Corp 回路試験装置
US6167545A (en) * 1998-03-19 2000-12-26 Xilinx, Inc. Self-adaptive test program
JP2001093296A (ja) 1999-09-21 2001-04-06 Advantest Corp 半導体デバイス試験装置
JP2002083499A (ja) * 2000-06-21 2002-03-22 Advantest Corp データ書込装置、データ書込方法、試験装置、及び試験方法
JP4413406B2 (ja) * 2000-10-03 2010-02-10 株式会社東芝 不揮発性半導体メモリ及びそのテスト方法
US6903566B2 (en) * 2001-11-09 2005-06-07 Advantest Corporation Semiconductor device tester
DE10297426T5 (de) * 2001-11-15 2005-01-13 Advantest Corp. Halbleiterprüfgerät
JP2003203495A (ja) * 2002-01-07 2003-07-18 Mitsubishi Electric Corp 半導体記憶装置の試験装置及び試験方法
JP2003242799A (ja) * 2002-02-12 2003-08-29 Hitachi Ltd 半導体集積回路
JP3879618B2 (ja) * 2002-07-30 2007-02-14 横河電機株式会社 半導体集積回路試験装置及び方法
US7010734B2 (en) * 2002-10-21 2006-03-07 Sun Microsystems, Inc. Method for microprocessor test insertion reduction
JP4334285B2 (ja) 2003-06-19 2009-09-30 株式会社アドバンテスト 半導体試験装置及びその制御方法
US7469371B1 (en) * 2006-08-08 2008-12-23 Xilinx, Inc. Methods of testing a user design in a programmable integrated circuit

Also Published As

Publication number Publication date
US7765449B2 (en) 2010-07-27
TWI393144B (zh) 2013-04-11
CN101006521A (zh) 2007-07-25
KR101162793B1 (ko) 2012-07-05
US20070300114A1 (en) 2007-12-27
JP4542852B2 (ja) 2010-09-15
JP2006059477A (ja) 2006-03-02
WO2006018947A1 (ja) 2006-02-23
KR20070056098A (ko) 2007-05-31
CN100587848C (zh) 2010-02-03

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees