TW200607004A - Transistor and formation method thereof - Google Patents

Transistor and formation method thereof

Info

Publication number
TW200607004A
TW200607004A TW094127304A TW94127304A TW200607004A TW 200607004 A TW200607004 A TW 200607004A TW 094127304 A TW094127304 A TW 094127304A TW 94127304 A TW94127304 A TW 94127304A TW 200607004 A TW200607004 A TW 200607004A
Authority
TW
Taiwan
Prior art keywords
region
transistor
isolation portion
doped
recess
Prior art date
Application number
TW094127304A
Other languages
English (en)
Other versions
TWI281196B (en
Inventor
You-Kuo Wu
Edward Chiang
Shun-Liang Hsu
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Publication of TW200607004A publication Critical patent/TW200607004A/zh
Application granted granted Critical
Publication of TWI281196B publication Critical patent/TWI281196B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H01L21/7621—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region the recessed region having a shape other than rectangular, e.g. rounded or oblique shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
TW094127304A 2004-08-11 2005-08-11 Transistor and formation method thereof TWI281196B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/916,133 US7122876B2 (en) 2004-08-11 2004-08-11 Isolation-region configuration for integrated-circuit transistor

Publications (2)

Publication Number Publication Date
TW200607004A true TW200607004A (en) 2006-02-16
TWI281196B TWI281196B (en) 2007-05-11

Family

ID=35799202

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094127304A TWI281196B (en) 2004-08-11 2005-08-11 Transistor and formation method thereof

Country Status (4)

Country Link
US (2) US7122876B2 (zh)
KR (1) KR100711557B1 (zh)
CN (1) CN100411191C (zh)
TW (1) TWI281196B (zh)

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KR100974697B1 (ko) * 2008-07-09 2010-08-06 주식회사 동부하이텍 Ｌｄｍｏｓ 소자 및 ｌｄｍｏｓ 소자의 제조 방법
TWI387012B (zh) * 2009-01-15 2013-02-21 Vanguard Int Semiconduct Corp 橫向擴散金氧半電晶體元件及提高橫向擴散金氧半電晶體元件崩潰電壓之方法
US8445955B2 (en) * 2009-02-27 2013-05-21 Taiwan Semiconductor Manufacturing Company, Ltd. Quasi-vertical structure for high voltage MOS device
US7821082B1 (en) * 2009-04-28 2010-10-26 Vanguard International Semiconductor Corporation Method for increasing breaking down voltage of lateral diffused metal oxide semiconductor transistor
US8138049B2 (en) * 2009-05-29 2012-03-20 Silergy Technology Fabrication of lateral double-diffused metal oxide semiconductor (LDMOS) devices
US8088656B2 (en) * 2009-08-14 2012-01-03 International Business Machines Corporation Fabricating ESD devices using MOSFET and LDMOS
US8299528B2 (en) * 2009-12-31 2012-10-30 Semiconductor Components Industries, Llc Transistor and method thereof
DE102010014370B4 (de) * 2010-04-09 2021-12-02 X-Fab Semiconductor Foundries Ag LDMOS-Transistor und LDMOS - Bauteil
CN101872763A (zh) * 2010-05-28 2010-10-27 上海宏力半导体制造有限公司 一种可减小衬底电流的ldmos器件及其制造方法
CN102315263A (zh) * 2010-07-05 2012-01-11 旺宏电子股份有限公司 一种半导体及其制造方法
CN102569392B (zh) * 2010-12-27 2014-07-02 中芯国际集成电路制造(北京)有限公司 Ldmos晶体管、布局方法和制作方法
TWI456761B (zh) * 2011-04-26 2014-10-11 Richtek Technology Corp 高壓元件及其製造方法
US9343538B2 (en) * 2011-05-13 2016-05-17 Richtek Technology Corporation High voltage device with additional isolation region under gate and manufacturing method thereof
US8969913B2 (en) * 2011-12-23 2015-03-03 Taiwan Semiconductor Maufacturing Company, Ltd. Insulated gate bipolar transistor structure having low substrate leakage
CN103474462B (zh) * 2012-06-07 2016-05-18 立锜科技股份有限公司 横向双扩散金属氧化物半导体元件及其制造方法
CN102891088A (zh) * 2012-09-17 2013-01-23 电子科技大学 垂直双扩散金属氧化物半导体场效应晶体管器件制造方法
US9059278B2 (en) 2013-08-06 2015-06-16 International Business Machines Corporation High voltage lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSFET) having a deep fully depleted drain drift region
US9184282B2 (en) * 2013-08-09 2015-11-10 Taiwan Semiconductor Manufacturing Company, Ltd. Ultra-high voltage laterally-diffused MOS devices and methods of forming the same
CN104377242A (zh) * 2013-08-12 2015-02-25 上海华虹宏力半导体制造有限公司 Ldmos器件及其制造方法
TWI641146B (zh) * 2013-11-15 2018-11-11 立錡科技股份有限公司 橫向雙擴散金屬氧化物半導體元件製造方法
JP6341802B2 (ja) * 2014-08-21 2018-06-13 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
CN104600118A (zh) * 2014-12-26 2015-05-06 电子科技大学 一种减小热载流子效应的横向高压器件
CN104538309A (zh) * 2014-12-31 2015-04-22 上海华虹宏力半导体制造有限公司 低导通电阻ldmos 的结构及制作方法
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Also Published As

Publication number Publication date
US7384836B2 (en) 2008-06-10
KR20060050404A (ko) 2006-05-19
US7122876B2 (en) 2006-10-17
CN100411191C (zh) 2008-08-13
US20060033155A1 (en) 2006-02-16
TWI281196B (en) 2007-05-11
CN1734786A (zh) 2006-02-15
KR100711557B1 (ko) 2007-04-27
US20060286735A1 (en) 2006-12-21

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