TW200529370A - Efficient use of wafer area with device under the pad approach - Google Patents

Efficient use of wafer area with device under the pad approach Download PDF

Info

Publication number
TW200529370A
TW200529370A TW094100806A TW94100806A TW200529370A TW 200529370 A TW200529370 A TW 200529370A TW 094100806 A TW094100806 A TW 094100806A TW 94100806 A TW94100806 A TW 94100806A TW 200529370 A TW200529370 A TW 200529370A
Authority
TW
Taiwan
Prior art keywords
metal layer
semiconductor structure
pad
substrate
active device
Prior art date
Application number
TW094100806A
Other languages
English (en)
Chinese (zh)
Inventor
Nian Yang
Hiroyuki Ogawa
Yi-Der Wu
Kuo-Tung Chang
Yu Sun
Darlene Hamilton
Original Assignee
Spansion Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Spansion Llc filed Critical Spansion Llc
Publication of TW200529370A publication Critical patent/TW200529370A/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/923Bond pads having multiple stacked layers
    • H10W72/9232Bond pads having multiple stacked layers with additional elements interposed between layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/934Cross-sectional shape, i.e. in side view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • H10W72/952Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/981Auxiliary members, e.g. spacers
    • H10W72/983Reinforcing structures, e.g. collars

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Wire Bonding (AREA)
TW094100806A 2004-01-14 2005-01-12 Efficient use of wafer area with device under the pad approach TW200529370A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/758,148 US20050151265A1 (en) 2004-01-14 2004-01-14 Efficient use of wafer area with device under the pad approach

Publications (1)

Publication Number Publication Date
TW200529370A true TW200529370A (en) 2005-09-01

Family

ID=34740122

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094100806A TW200529370A (en) 2004-01-14 2005-01-12 Efficient use of wafer area with device under the pad approach

Country Status (7)

Country Link
US (1) US20050151265A1 (https=)
EP (1) EP1709685A1 (https=)
JP (1) JP2007518269A (https=)
KR (1) KR20060130105A (https=)
CN (1) CN1910752A (https=)
TW (1) TW200529370A (https=)
WO (1) WO2005071749A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8115321B2 (en) * 2009-04-30 2012-02-14 Lsi Corporation Separate probe and bond regions of an integrated circuit
CN103390647A (zh) * 2012-05-10 2013-11-13 无锡华润上华半导体有限公司 一种功率mos器件结构
CN110491849B (zh) * 2019-07-18 2024-11-08 珠海零边界集成电路有限公司 芯片、输入输出结构和垫层

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63166273A (ja) * 1986-12-27 1988-07-09 Tdk Corp 縦形半導体装置
JPH06275794A (ja) * 1993-03-18 1994-09-30 Matsushita Electric Ind Co Ltd 半導体記憶装置およびその製造方法
EP0637840A1 (en) 1993-08-05 1995-02-08 AT&T Corp. Integrated circuit with active devices under bond pads
US7067442B1 (en) * 1995-12-26 2006-06-27 Micron Technology, Inc. Method to avoid threshold voltage shift in thicker dielectric films
JP3157715B2 (ja) * 1996-05-30 2001-04-16 山形日本電気株式会社 半導体集積回路
JPH10335627A (ja) * 1997-05-27 1998-12-18 Sony Corp 固体撮像装置
US5986343A (en) * 1998-05-04 1999-11-16 Lucent Technologies Inc. Bond pad design for integrated circuits
TW445616B (en) 1998-12-04 2001-07-11 Koninkl Philips Electronics Nv An integrated circuit device
JP3505433B2 (ja) 1999-05-21 2004-03-08 三洋電機株式会社 半導体装置
US7199039B2 (en) * 2003-05-19 2007-04-03 Intel Corporation Interconnect routing over semiconductor for editing through the back side of an integrated circuit
JP4492926B2 (ja) * 2003-11-28 2010-06-30 ルネサスエレクトロニクス株式会社 半導体装置

Also Published As

Publication number Publication date
US20050151265A1 (en) 2005-07-14
WO2005071749A1 (en) 2005-08-04
EP1709685A1 (en) 2006-10-11
JP2007518269A (ja) 2007-07-05
CN1910752A (zh) 2007-02-07
KR20060130105A (ko) 2006-12-18

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