TR201111229A2 - Aşınma durdurma katmanlı n-tipi kapatma yapısına sahip dikey ışık yayan diyot (vled) kalıp ve bunun üretim yöntemi. - Google Patents

Aşınma durdurma katmanlı n-tipi kapatma yapısına sahip dikey ışık yayan diyot (vled) kalıp ve bunun üretim yöntemi.

Info

Publication number
TR201111229A2
TR201111229A2 TR2011/11229A TR201111229A TR201111229A2 TR 201111229 A2 TR201111229 A2 TR 201111229A2 TR 2011/11229 A TR2011/11229 A TR 2011/11229A TR 201111229 A TR201111229 A TR 201111229A TR 201111229 A2 TR201111229 A2 TR 201111229A2
Authority
TR
Turkey
Prior art keywords
vled
wear
emitting diode
vertical light
closure structure
Prior art date
Application number
TR2011/11229A
Other languages
English (en)
Inventor
Hsieh Hsu Kung
Anh Tran Chuong
Huang Liu Wen
Kuo Wang Yao
Original Assignee
Semileds Optoelectronics Co. Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semileds Optoelectronics Co. Ltd. filed Critical Semileds Optoelectronics Co. Ltd.
Publication of TR201111229A2 publication Critical patent/TR201111229A2/tr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

Mevcut buluş bir dikey ışık yayan diyot (VLED) kalıp olup, bir p-tipi kapatma katmanı, p-tipi kapatma katmanı üzerinde ışık yaymak üzere bir aktif katman ve aktif katmanı korumak üzere yapılandırılmış olan en az bir aşınma durdurma katmanına sahip bir n-tipi kapatma yapısı içerir. Mevcut buluş bir dikey ışık yayan diyot (VLED) kalıp üretme metodu olup: bir taşıyıcı substrat sağlanması; en az bir aşınma durdurma katmanı içeren taşıyıcı substrat üzerinde bir n-tipi kapatma yapısı oluşturulması; n-tipi kapatma yapısı üzerinde bir aktif katman oluşturulması; aktif katman üzerinde bir p-tipi kapatma katmanı oluşturulması; ve taşıyıcı substratın kaldırılması aşamalarını içerir.
TR2011/11229A 2010-11-12 2011-11-14 Aşınma durdurma katmanlı n-tipi kapatma yapısına sahip dikey ışık yayan diyot (vled) kalıp ve bunun üretim yöntemi. TR201111229A2 (tr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/944,823 US20120119184A1 (en) 2010-11-12 2010-11-12 Vertical Light Emitting Diode (VLED) Die Having N-Type Confinement Structure With Etch Stop Layer And Method Of Fabrication

Publications (1)

Publication Number Publication Date
TR201111229A2 true TR201111229A2 (tr) 2012-07-23

Family

ID=46046974

Family Applications (1)

Application Number Title Priority Date Filing Date
TR2011/11229A TR201111229A2 (tr) 2010-11-12 2011-11-14 Aşınma durdurma katmanlı n-tipi kapatma yapısına sahip dikey ışık yayan diyot (vled) kalıp ve bunun üretim yöntemi.

Country Status (6)

Country Link
US (1) US20120119184A1 (tr)
JP (1) JP2012104832A (tr)
KR (1) KR101256755B1 (tr)
CN (1) CN102468388A (tr)
TR (1) TR201111229A2 (tr)
TW (1) TWI466322B (tr)

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JP5792694B2 (ja) * 2012-08-14 2015-10-14 株式会社東芝 半導体発光素子
KR102046534B1 (ko) 2013-01-25 2019-11-19 삼성전자주식회사 기판 가공 방법
CN105518879B (zh) * 2013-09-02 2018-08-31 Lg伊诺特有限公司 发光元件
CN105023979B (zh) * 2015-06-03 2018-08-21 华灿光电(苏州)有限公司 一种GaN基LED外延片及其制备方法
US10304729B2 (en) * 2016-11-29 2019-05-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming interconnect structures
KR102611981B1 (ko) * 2017-10-19 2023-12-11 삼성전자주식회사 발광 장치 및 그 제조 방법
CN108075019B (zh) * 2017-11-15 2019-10-08 华灿光电(浙江)有限公司 一种发光二极管外延片及其制备方法
KR20210041931A (ko) * 2019-10-08 2021-04-16 삼성전자주식회사 반도체 장치, 그 제조 방법 및 이를 포함하는 디스플레이 장치

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JP3889662B2 (ja) * 2002-05-10 2007-03-07 三菱電線工業株式会社 GaN系半導体発光素子の製造方法
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JP4963816B2 (ja) * 2005-04-21 2012-06-27 シャープ株式会社 窒化物系半導体素子の製造方法および発光素子
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Also Published As

Publication number Publication date
CN102468388A (zh) 2012-05-23
TWI466322B (zh) 2014-12-21
KR101256755B1 (ko) 2013-04-24
JP2012104832A (ja) 2012-05-31
KR20120089783A (ko) 2012-08-13
TW201220528A (en) 2012-05-16
US20120119184A1 (en) 2012-05-17

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