SU966918A1 - Frequency conversion device - Google Patents

Description

(5) DEVICE OF FREQUENCY CONVERSION

one

The invention relates to electronics and can be used in the areas of precision instrument making and the production of integrated circuits.

A frequency divider is known, comprising a counter, And elements, a trigger, and a dividing ratio setting bus 1.

A disadvantage of this device is relatively low functionality.

Also known is a frequency conversion device containing three input buses, two control buses, four counters, OR elements, an element. And, the trigger and the element IS-NOT, the first input of which is connected to the first input bus, the second input of the element AND-NOT is connected to the trigger output, the installation input to the unit of which is connected to the second input bus, the third input bus is connected to the counting input of the first account. 2

tick, the outputs of which are connected to the first inputs of the elements OR, VTO; These are the inputs of which are connected to the corresponding outputs of the second counter, the counting input and the installation input of which are connected to zero, respectively. the output of the element and the output of the trigger, the outputs of the elements OR are connected to the inputs of the element AND, the output of which is connected to the counting

10 by the input of the third counter, the overflow output of which is connected to the installation input of the trigger zero, the first and the second control bus are connected respectively to the installation inputs

15 to zero and to the units of the first counter, the overflow output of the second counter is connected to the counting input of the fourth counter. The known device performs the function of the divider 2.

The disadvantage of such a device is the impossibility of performing a number of additional functions (multiplying

frequencies, the formation of delayed pulses, pulses of a given duration, etc.) without connecting complex multi-element external devices, i.e. The device has relatively narrow functionality.

The purpose of the invention is to expand the functionality.

The goal is achieved by the fact that a frequency conversion device containing three input buses, two control buses, two counters, OR elements, an AND element, a trigger and the first NAND element, whose inputs are connected to the first input I1INA and to the direct output of the trigger The installation input to the unit of which is connected to the second input bus,. the third input bus is connected to the net input of the first counter, the outputs of which are connected to the first inputs of the OR elements, the second inputs of KOJO ryh are connected to the corresponding outputs of the second counter, the outputs of the OR elements are connected to the inputs of the installation at zero and in the unit of the first counter, are entered the second, third IS-NOT elements and the fourth input bus which is connected to the first input of the second IS-NOT element, the second input and output of which are connected respectively to the inverse output of the trigger and to the first input of the third AND HE element of the second input q and output of which are respectively connected to the output of first AND-NO element and to the counting input of the second counter, setting to zero the input koto cerned connected to the output of the AND and the input for setting to zero the trigger .. The drawing shows a block diagram of frequency conversion device. The circuit includes counters 1 and 2, elements OR 3.1, 3.2 and 3-3, element AND A, elements AND-NOT 5.1, 5.2 and 5.3, trigger 6, input buses 8-11 and control buses 11 and 12. Tires 10-12 are connected respectively to the counting input, the installation input to zero and the installation input to the units of counter 1, the outputs of which are connected to the first inputs of the OR 3.1-3.3 elements, the second inputs of which are connected to the corresponding outputs of the counter 2, whose counting input

It is connected to the output of the unit INE 5-2, the inputs of which are connected to the outputs of the elements AND-NOT 5.1 and 5-3, the first inputs of which are connected respectively to

input tires. 8 and 9, the second inputs of the elements AND-NOT 5.1 and 5.3 are connected respectively to the inverse (and direct outputs of the flip-flop 6, the input ;: of the zero setting is connected to the input of the zero setting of the counter 2 and with the output of the j j, whose inputs connected to the outputs of the elements OR 3.1-3.3, the input bus .7 is connected to the input of the installation in the unit of the trigger 6.

The proposed device is functional. It digs in two modes: division and multiplication.

In the dividing mode by bus 12, the counter 1 is set to units to the outputs, and by the signal from the output of the element C, the counter 2 is set to the zero state. Then, along the input bus 10, pulses are fed to the counting input of the counter 1, the number M of which is equal to the necessary division factor. Next, the bus 8 is supplied with pulses with the following frequency Fg; while the potential of the logical unit is present at the setup input to the zero state and at the inverse trigger output ..6, and the pulses from bus 8 pass to the counter input of counter 2. At the output of the element And t pulses with frequency, I / O appear. When operating in multiplication mode, the frequencies of the preparation operations of the device are similar. The signal, the frequency of which is to be multiplied, is fed to the bus 7, the signal of the auxiliary (preferably high-frequency) sequence of pulses is fed to the bus 9. At the same time, the signal from the bus is opened. elements AND-NOT 5.3 and 5.2 and the auxiliary signal arrives at the counting input of counter 2. After passing a given number M of pulses, trigger 6 returns to its original state and prohibits the passage of pulses through the IS-NE 5.3 element. With the arrival of the second pulse at the SOC input, the repetition process As a result, a signal with a frequency equal to the frequency of the pulses on the bus 9 multiplied by the M number is generated at the output of the element IS-NE 5.3. Thus, the proposed device performs both a multiplication operation and a length operation.

Claims (1)

1. Gutnikov V.S. Integral electronics in measuring devices. L., Energie, 197, p.86, fig. 3 a. 2, Melnikov, A.A., and others. Processing of frequency and time pulse signals. - Automation Library, vol. SS, M ,, Energie, 1976, p.70, fig. 52 (prototype).