SU911713A1 - Device for registering video pulse center - Google Patents

Description

(54) DEVICE OF FIXATION OF THE MIDDLE OF THE VIDEO IMPULSE

The device fixing the middle of the video pulse relates to the radio measuring technique and can be used in discrete information processing devices.

A device for fixing the center of video pulses is known, comprising a reference frequency generator, triggers, counters, elements of a match, and a control device 1.

However, this device does not allow receiving video pulses of low duty cycle.

It is also known a device for fixing the center of video pulses, a pulse shaper shaper, a constant delay element, delay elements: with taps, coincidence elements, a multi-input element OR 2.

However, the known device does not allow to receive on the output video pulses, the duty cycle of which is 2 less than the input video pulses. In addition, for fixing the middle. the input pulse takes a fairly long time.

The purpose of the invention is the development of fast device speeds and a decrease in the duty cycle of video pulses.

The goal is achieved by the fact that the device fixes the center of the video pulse containing the pulse cutter, the input of which is connected to the input bus, the first shift register whose setup input is connected to the output of the delay element, and the bit outputs to the inputs of the corresponding coincidence elements, the second input . The last of which is connected to the output of the pulse cutter, the reference generator on the second shift register, introduced a frequency divider,

fS connected between the output of the reference generator and the synchronization input of the first shift register, whose information input is connected to the input bus, and the output of the pulse shear generator is connected to the input of the delay element and the second inputs of the other coincidence elements L, the synchronization input of the second shift register is connected to the output the reference generator, and the bit inputs to the outputs of the corresponding matching elements.

The drawing shows a structural electrical circuit of the device 30 for fixing the middle of the video pulses.

The device for fixing the center of the video pulses contains a shaper 1, the output of which is connected to the installation input of the first register 3 of shift through the delay element 2, the information input JKOTOporo is connected to the input of the generator 1, the synchronization input is connected to the output of the generator 4 frequencies through a divider 5 frequencies into two, and the bit inputs of the first 3-shift register are connected to the first inputs of matching elements 6-1, 6-2, ..., 6-N, the second inputs of which are connected to the output of the form ers 1, and the outputs are connected to inputs of the second discharge dnymi shift register 7, the entrance. synchronization of which is connected to the output of the generator 4, and the output is the output of the device.

The device works in the following way.

The generator 4 generates pulses with a follow-up period Tj, which are fed to the synchronization input of the second shift register 7, and the divider 5 from whose output pulses with a period of 2Т0, is sent to the synchronization input of the first shift register 3: Thus, the information shift in shift register 7 It is performed at a speed twice as high as in register 3 shift. The size of the N shift registers 3 and 7 is the same and is determined by the maximum duration of the input signal 1j and the pulse repetition period T of the reference frequency generator 4.

N V2To.

Prior to the appearance of the input signal in registers 3 and 7 of the shift, a shift of logical zeros occurs. When the input signal appears, a certain number of pulses are written to the shift register 3.

 n (t) / 2To TI / 2To, where tJ, t, are, respectively, the moments of the appearance of the front and the cutoff of the output signal. .

At time t, a pulse is formed at the output of the driver 1, which coincides with the cut-off input signal. This pulse is applied to the second inputs of the 6-1-6-N elements, the first inputs of which are connected to the bit outputs of the shift register 3, and allows Overwriting information from the shift register 3 to the shift register 7 at the end of the input signal.

Shift register 7 is constructed in such a way that only the high logical level is rewritten. This is necessary to preserve the information about the center of the video pulses previously recorded in the shift register 7. At the same time, no overlapping occurs due to the fact that the shift of information in shift register 7 occurs twice as fast. After overwriting information with the same pulse from the output of shaper 1, the delayed delay element 2, for the time Woo, the reset is performed.

0 of the shift register 3, and the delay time must lie within the limits of tgarra Ch tjanT the time of rewriting information from register 3, the shift into the shift register 7.

5 After resetting, register. The 3 shift is ready to receive the next signal, and the information rewritten into the shift register 7. The information is continuously shifted with the TO period. Fixation of the middle of the nm0 pulse occurs at the moment of time t on the pulse front at the sequential output of the shift register 7. Thus, the fixation of the middle of the video pulses takes place relative to the pulse front with a shift Tf (t, - ty) + (t, 2 - t). The time interval from the moment of rewriting information tjJDO of the pulse-front exit from register 7 at the moment

I t is equal to

H- 2. (N - n) T TZ / 2 - Ti / 2,

2N

Where

TO signal delay time of the first register 3 shift. As a result, TK / 2 + T and / 2, which means that the fixation of the midpoint of the video pulse occurs with a constant time shift TZ / 2, i.e. smaller by the value of T2 / 2. ,

0 The minimum time interval of the RT between the slice of the previous pulse and the front of the next one in order to obtain a reliable one. information. About the temporary position of the center of the video pulse for the proposed device is l T Td.

The pulse duty cycle Tb / T, 1 + 1 / 2N is minimal.

Claims (1)

1. USSR author's certificate No. 509862, cl. G 04 F 10/04,: 1E7b. 2; USSR author's certificate 505969, cl. G 01 R 29 / 0-2, 1976 (prototype).