SU1718374A1 - Digital time discriminator - Google Patents

Abstract

The invention relates to a pulse technique and can be used in the following gauges of the temporal position of pulse signals in radar and radio navigation systems. The purpose of the invention is to improve the measurement accuracy due to various cases of the absence of pulses and the impulse entering the middle of the strobe - achieved by introducing a pulse counter 2, a register 3, a switch 11 and a driver 12 pulses. The device also contains a generator of 1 clock pulses, output bus 4, shaper 5 half-strobes, elements AND 6, 7, element OR 8, triggers 9, 10, driver 12, reversible counter 13, input bus 14, bus 15 of initial installation. 3 il.

Description

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The invention relates to a pulse technique and can be used in the following gauges of the temporal position of pulse signals in radar and radio navigation systems.

The purpose of the invention is to improve the measurement accuracy by distinguishing the cases of the absence of pulses and the impulse entering the middle of the strobe.

FIG. 1 is a block diagram of a digital time discriminator; in fig. 2 - timing diagrams explaining the operation of the discriminator; in fig. 3 is an example of implementation of a pulse former.

Digital time discriminator (Fig. 1) contains a series-connected clock pulse generator 1, a pulse counter 2 and a register 3, the output of which is connected by the output bus 4, the driver of 5 half-strobes, the first and second elements AND 6, 7, the element OR 8, the first and second triggers 9, 10, switch 11, driver. 12 pulses, a reversible counter 13 pulses, the overflow output of which is connected to the clock input of the register 3, the first input of the element OR 8 and the reset input of the second trigger 10, the output of which is connected to the input of the second element AND 7, is connected to the output of the generator 1, and the second input - to the exit of the second trigger .10.

The output of the counter 2 is connected to the input of the imaging unit 5, the first output of which is connected to the integrated control input of the switch 11 and the installation inputs of the flip-flops 9, 10. The first input of the first element Ib is connected to the output of the first trigger 9, the second input is to the input bus 14, and the output - with the first input of the driver 12, the second input of which is connected to the bus 15 of the initial installation and the reset input of the counter 2, the third input - with the second output of the driver 5, the first output is connected to the combined input of the reversible counter 13 and the second input of the element OR 8, and the second output is connected to the reset input of the reversible counter 13. To the inputs of the parallel record, a number greater than the number of clock pulses passing over the duration of one half-strobe is fed. The output of the second element And 7 is connected to the input of the switch 11, two outputs of which are connected to the inputs of the forward and reverse counts of the reversible counter 13, respectively. The output of the element OR 8 is connected to the reset input of the first trigger 9.

Shaper 12 contains (Fig. 3) the first and second inverters 16, 17, the first, second and third elements AND NOT 18-20. Digital Time Discriminator

works as follows.

At the initial moment of time, the bus 15 is used to reset the counter 2 and, using the driver 12, to reset the reversible counter 13. After this, the counter 12

starts counting clock pulses continuously, and driver 5, which is a decoder, forms two half-strobe.

The operation of the discriminator. Starts with

records 1 to triggers 9 and 10 on the leading edge of the first half-strobe. At the same time, the input signal (Fig. 2b, d, lb) and clock pulses, respectively, are transmitted to the driver 12 and switch 1.1, which during the first half-clock (Fig. 2a) directs the clock to the forward count input of a reversible counter 13. Shaper 12 operates in such a way that any input

the impulse (Fig. 2d), caught in the first half of the strobe, resets the reversible counter 13 to O (in Fig. 2, e, i.m) the state of the reversing counter 13 is shown.

After the end of the first gang

reversible counter 13 operates in subtraction mode. When it overflows, an impulse appears in the inverse output of the overflow (Fig. 2d, g), performing a reset to the O flip-flops 9, 10 and a census of the state

counter 2 into register 3. The voltage at the output of the flip-flops 9, 10 prohibits the passage of input and clock pulses from this moment on. At this cycle, the operation of the discriminator ends.

If, prior to overflow of the reversible counter 13, a pulse arrives at the input of the device in the second half-gate (it will obviously be closest to the center), then with the help of the shaper 12 into the reversing

counter 13 records the number D / 2 + 1, where D is the number of clock pulses passing in two half-strobes (Fig. 2i, m), and flip-flop 9 is reset to O, which prohibits further passage of the input pulses. Then, after the overflow counter 13 overflows (FIG. 2k, n), the trigger 10 is reset, the counter 2 state is written to the register, and the clock is not allowed to pass to the input

reversible counter 13.

Depending on which half of the strobe impulse gets closest to the center, the overflow of the reversing counter 13 occurs either during the second

a half-tail (fig. 2g), or after it (fig. 2k, n). Thus, a one-to-one correspondence is observed between the code value recorded in register 3 and the time position of the pulse nearest to the center of the strobe.

If there is not a single pulse in the strobe, then during the first half-gate the reversible counter 13 works on addition, and during the second, on subtraction and overflow occurs exactly at the moment of the end of the second half-string (Fig. 2a, b, c, d).

Thus, this case differs from the case when a pulse arrives in the middle of the strobe (Fig. 2h, and k).

An additional reason for improving the accuracy of the discriminator is the formation of half-gates from the generator 1 of clock pulses, which ensures the formation of the time scale in the counter 2.

FORUMAWLAH AND ISLANDS

A digital time discriminator containing a clock generator, a half-shaper generator, a reversible pulse counter, first and second triggers, first and second AND elements, an OR element, an initial setup bus, an output bus, and an input bus connected to the first input of the first And element, the second input of which is connected to the output of the first trigger, the reset input of which is connected to the output of the OR element, the first input of which is connected to the overflow output of the reversible pulse counter, characterized in that

improve measurement accuracy by distinguishing cases of no pulses and a pulse in the middle of the strobe; a pulse counter, a register, a switch and a pulse shaper are entered into it, the first input of the pulse shaper connected to the output of the first And element, the second input to the initial setting bus and the input reset the pulse counter, the counting input of which is connected to the output of the clock pulse generator and the first input of the second element I, the output through a register with the output bus, and directly with the input form the half-gate world, the first output of which is connected to the control input of the switch and the installation inputs of the first and second triggers, and the second output connected to the third input of the pulse former, the first output of which is connected to the second input of the OR element and the recording input of the reversible pulse counter, and the second output - with the reset input of the reversible pulse counter, the overflow output of which is connected to the clock input of the register and the reset input of the second trigger, the output of which is connected to the second input of the second element Whose output is connected to the input switch, the first and second outputs are connected to the code number more clock inputs of the forward and inverse reversible pulse counter counting respectively, whose inputs are fed parallel recording extending for the duration of one polustroba.

FIG. 2

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Claims (1)

Claim A digital time discriminator comprising a clock, a half-gate driver, a reversible pulse counter, first and second triggers, first and second elements 14, an OR element, an initial setup bus, an output bus and an input bus connected to the first input of the first AND element, the second input which is connected to the output of the first trigger, the reset input of which is connected to the output of the OR element, the first input of which is connected to the overflow output of the reversible pulse counter, characterized in that. in order to improve the accuracy of measurement by distinguishing between cases of lack of pulses and a pulse falling into the middle of the strobe, a pulse counter, a register, a switch and a pulse shaper are introduced into it, the first input of the pulse shaper connected to the output of the first element And, the second input to the initial setup bus and a reset counter input, the counting input of which is connected to the output of the clock pulse generator and the first input of the second element I. The output is through the register with the output bus, and directly with the input a half-gate shaper, the first output of which is connected to the switch control input and the installation inputs of the first and second triggers, and the second output is connected to the third pulse shaper input, the first output of which is connected to the second input of the OR element and the recording input of the reversible pulse counter, and the second output - with the reset input of the reversible pulse counter, the overflow output of which is connected to the clock input of the register and the reset input of the second trigger, the output of which is connected to the second input of the second element Whose output is connected to the switch input, the first and second outputs are connected to the code number more clock inputs of the direct and inverse reversible pulse counter accounts respectively to the inputs of which is applied parallel recording extending for the duration of one polustroba. Fig.Z