SU892692A1 - Pulse duration discriminator - Google Patents

Description

(54) SELECTOR OF PULSES OF DURATION

The invention relates to a pulsed technique and can be used in automation, heat mechanics and computer technology. A pulse selector is known in terms of duration, the series-connected clock generator, AND element, counter, decoder, threshold trigger and output element 13 are known. The disadvantages of this separator are low noise immunity and accuracy of selection, as well as distortion of the outgoing pulses. The closest in technical essence to the present invention is a pulse selector in duration, containing in series dnffwire ring, trigger, clock generator, pulse counter, decoder, and element, the second input of which is connected to the second output of the differentiating element, and the output of the first input of the element .ORI, the second input of which is connected to the output of the decoder, and the output is connected to the input of the delay element, the output of which is connected to the installation inputs of the trigger to the pulse counter G23. However, the known device has a non-accurate precision and low noise immunity. The purpose of the invention is to improve the accuracy of selection while at the same time turning noise resistance. The goal is achieved by the fact that the pulse selector has a duration that contains an input trigger, a delay element, an element AND and a serially connected clock, a pulse counter and a decoder, and a trigger for the end of the sampling interval, an output trigger for timing, S - the input of which is connected to the direct output of the input trigger, the first R input to the output of the trigger for the end of the selection interval, the second R input to the counting input of the trigger for the end of the separation section, to the output of This is the first Z-input of the output trigger, the third and fourth P-inputs with the inverse output of the input trigger, with the installation input of the trigger for the end of the selection interval and the second S-input of the output trigger, the fifth R-input with the output of the output trigger and through the element delays with an R-input of an output trigger, a direct output with an input of a clock generator, and an inverse output with installation inputs of a pulse counter and a threshold trigger, whose input is connected to the output; the decoder, and EYHOTS - to the first input of the element And, the second input of which is connected to the synchronization input of the decoder and the output of the generator of clock pulses. FIG. 1 shows a block diagram of the proposed device; see 2 time diagrams for his work. The device contains a trigger 1, an input trigger 2 of time reference, a generator of 3 clock pulses controlled, a count of 4 pulses, a decoder 5, a trigger 6 threshold, an element 7, a trigger 8 ending the selection interval, a trigger 9 output, a delay element Yu. The selector works as follows. In the initial position, the pulse counter and the triggers are in the zero state. The input pulses of positive polarity arrive at trigger 1, which repeats, in duration at its output, the amplitude of the input signal above the trigger trigger threshold level, fixing these times are when the input pulses have a certain threshold value 1fig,) The signal from the output of the trigger 1 nocTyina sets the HaS -input of the trigger 2, which switches to state 1 (Fig. 26), at which An oscillator is fed to the generator 3. The generator 3 generates pulses (Fig. 2c), which are fed to counter 4, to the synchronization input and decoder 5, and to the input of element 7. After the (n -1) -th pulse for counting, from the output of counter 4 to the decoder 5 receives the enable signal, which prepares the decoder 5 to trigger at the end of the (n -1) -th clock pulse. At the end (wl th clock pulse at the output of the decoder 5, a signal appears that sinks to trigger 6 and switches its state (Fig. 2d), the selection threshold and -5 being known, the single signal from the trigger output goes to the first input element and prepares it to trigger when a pth clock pulse arrives on it.When the next nth act pulse arrives at the input of the element 7, the element i 7 triggers, the pulse from its output goes to the counting input of trigger 8, to the first S -Input trigger 9, preparing it for the crab At the second input of the input signal of the trailing edge of the input pulse from the inverted output of trigger 1, and to the second R-input of trigger 2 (inverse), the triggering of trigger 2 to return to the initial state in the selection interval before the trigger 9 to trigger reliable fixation of the rear edge of the input pulse by the trigger 9. When the rear edge of the monitored pulse coincides with the specified selection interval, a single signal from the inverse output of trigger 1 is fed to the third R input of trigger 2, however resetting the trigger. Gera 2 at the third R input is prohibited by the signal at its second P input, coming from element 7, on the S input of trigger 9, at this time a single signal from element 7 acts on the other eroS input. Trigger 9 is triggered (Fig 2g) and a single signal from its output goes to the fifth R input of trigger 2, while the trigger 2 returns to its original state, since its fourth R input receives a single signal from the inverse output of trigger 1. The zero signal from the right Mogo output trigger 2 is fed to the generator 3, which stops producing pulses, and e inichny signal from the inverse output of the trigger 2 returns to the initial state of the counter 4 and the trigger 6 (fig.2g). Thus, after the end of the input pulse, the counter 4 and the triggers 1, 2, 6 and 8 are reset, and the output trigger 9 is recorded. A single signal from the trigger 9 arrives at element 10. After the delay time at the output of element 1O, a pulse appears that arrives at the R input of the trigger 9 and returns it to its initial state (Fig. 2g). By choosing the time delay element 10, you can set the specified duration of the output pulse. The formation of the output pulse is combined in time

with the control of the next pulse and does not disturb the operation of the selector,

If the input pulse duration is greater than the specified one (Fig. 2a, second pulse), then at the end of the pulse at the output of the element I 7, which determines the specified interval for selecting the trailing edge of the high pulse that arrives at the counting input of the trigger 8, at the output of the trigger 8 is set the single signal, thereby the trigger 8, fixes the end of the selection interval (fig. 2e), the signal from the output of the trigger 8 goes to the first .P-input of the trigger 2, which returns to its initial state and with its output signals stops counting time and returning clears counter 4 and trigger 6 to its initial state.

At the end of the input pulse, a single signal from the inverse output of the trigger 1 arrives at the R input of the trigger 8 and returns it to the initial state. In this case, the output trigger 9 does not work, since there is no signal from the And 7 element on its S input.

If the duration of the input pulse is less than the specified one (Fig. 2 and the third pulse), then the counter and trigger 6 will be reset to the initial state by the signal from the inverse output of trigger 1, earlier than And 7, according to the n-th cycle

The reset of the counter 4 and the trigger 6 is made immediately upon termination of the input pulse without additional delays, after which the selector is again ready to control the next pulse.

At the selector output, pulses appear only if the duration of the input pulse corresponds to the specified one, and the selection interval corresponds to the n-th pulse of generator 3, and the signal propagation through the digits of the counter and through the decoder does not cause false alarms of the device and It does not affect the accuracy of setting the selection interval with the And 7 element, since the And 7 element is prepared for triggering in advance by a signal from the trigger 6, and the n time passes directly through the And 7 element to the trigger input 9, the amym forming top selection interval and allow a trigger 9, and after n th clock cycle and the trigger 8 is activated. fixes the end of the selection interval.

Time counting and device return to the initial position are controlled without the use of differentiation of the pulse fronts, therefore, the conditions of differentiability of the fronts on the input pulses and interference do not overlap. When the signal of the end of the pulse coincides with a predetermined time interval, the output trigger operates and fixes the correspondence of the input pulse of a predetermined duration. The input pulse may end at an arbitrary time regardless of the conditions coinciding with the boundary of the selection interval, no distortion of the input pulse or its shaping occurs, the duration of the output pulse is provided by selecting the magnitude of delay element 10, and the formation of the output pulse is combined with the next pulse control.

The design features of the proposed technological solution allow improving the accuracy of selection and

reduce the distortion of output impulses.

F

formula of invention

Pulse selector by duration, containing an input trigger, a delay element, an element And a serially connected clock generator, a pulse counter and a decoder, characterized in that, in order to increase the selection accuracy while increasing the noise immunity, the trigger of the end of the selection interval is entered, output trigger, threshold trigger, and time trigger, the S input is connected to the forward output of the trigger input, the first R input is from the trigger output of the end of the selection interval, the second 1 - input - with a counting input of the end of the selection interval, with the output of the element I and the first S - input of the output trigger, the third and fourth R-inputs with the inverse output of the input trigger, with the installation input of the end trigger, the selection interval and the second input of the output trigger, Fifth R input -. with the output of the output trigger and through the delay element with the R-BXO output of the trigger, direct output by the clock generator, and the inverse output with the installation inputs of the pulse counter and the threshold trigger, the input of which is connected to the output of the decoder, and the output to the first 78926928

mu input element, the second input is 1. USSR author's certificate

Go is connected to the synchronization input de 658727, cl. H 03 K 5/20,

encoder and clock generator output 14.02.77. pulses. USSR author's certificate

Sources of information., 696599, cl. H 03 K 5/18.

taken into account during the examination 03.08.77

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Claims (1)

Claim The pulse selector in duration, containing an input trigger, a delay element, an And element, and a series-connected clock pulse generator, a pulse counter and a decoder, characterized in that, in order to increase the accuracy of the selection while increasing the noise immunity, a trigger for the end of the selection interval is introduced into it, the output trigger, threshold trigger, and timing trigger, S-input of which is connected to the direct output of the input trigger, the first R-input - with the output of the trigger of the end of the selection interval, the second R-input - with the counting input of the trigger for the end of the selection interval, with the output of the And element and the first S-input of the output trigger, the third and fourth R-inputs - with the inverse output of the input trigger, with the installation input of the end trigger, the selection interval and the second input of the output trigger, fifth P -input - with the output of the output trigger and through the delay element with the R-output of the output trigger, direct output with the input of the clock generator, and the inverse output with the setting inputs of the pulse counter and the threshold trigger, the input of which is connected to the output in the decoder, and the output to the Gross carrying 7 892692 The input of the element And, the second input of which is connected to the synchronization input of the defrator and the output of the clock generator.