SU746902A1 - Selector of pulses by duration - Google Patents

Description

one ,-

The invention relates to a pulse technique and may find application in yclr-. Automation and remote control equipment for the selection of Nmt1 pulses of a given duration.

Known celistra pulses, sdrdgzaschiy generator ic1pulsov, hynbcoB counter, two triggers, logic elements AND, OR AND.

The disadvantage of the selector switch is that the duration of the input pulses in the direction of increasing is not limited.

The closest technical solution to this invention is a pulse duration selector, the input of which is connected to the element is the same & vi, the second input of which gives the reference signal, and contains a pulse counting circuit; inverter logic elements 2. . A disadvantage of the known selector is the output at the output of only the usa shaft, indicating the acceptance of an emuls that meets the specified conditions.

The aim of the invention is to extract pulses, the duration of which on) is within the specified limits.

The goal is achieved by the fact that in the selector impulses of long duration; containing a pulse shaper and DV9. logical element And, the first input iiiepBoro of which is connected to the input

10 by bus, and the second input, with the output of the clock generator, a pulse counter is entered, the summing input of which is connected to the output of the first logic element AND, additional logic elements AND, delay element P.5 trigger, and the zero outputs of the pulse counter are connected to the inputs of the first additional logic element And, the output of which is connected to the R 20 input, RS -S flip-flop, the e-input of which is connected to the output of the second additional logical element I, the single output with the output bus and the first input three rd doplshteynogo AND gate, the second input of which oShdyien with BbixoflOM generatoryShktbvyh

impulses, and the output with the subtracting input of the 61d loop connected to the inputs is the secondary of the additional logic element I, one of the inputs of which is connected to the output of the pulse former and the input of the delay element whose output is connected to the first input of the second logic element I, the second the input of which is connected to the zero output of the CK-trnger, and the output to the reset input of the counter is pulsed

The drawing shows a structural electrical 1K pulse impulse selector circuit.

The selector switch consists of a roierator of 1 pulses, the output of which is coherent with the input of the first 2 and second 3 logic elements AND, a driver of 4 pulses, corresponding to the back frigue of the input signal, the input of which is connected to the input of the selector and other

.. V ---- r, U .. Moise nepiBts o Logical And I 2, reversible counter 5, the output of the first logical element I 2 is connected to the amounts of Dashu ykodukbtbrogo, and the output of the second logical element IZ of the third logical element 6, the inputs of which are fed the triggers of the reversible counter 5, the fourth logical element and 7, the inputs of which are connected to the zero outputs of the triggers of the reversing counter 5, the delay element 8, whose interface is connected to one of the INPUTS; the third logical element And 6 and with the output of the 4Rstrigger 9, the output of the third logical element 6 is connected to the ifcbtdfjdrb input, the fourth output of the logic element I 7, the first input of which is connected to the R output of the RS-trigger 9 combat dyney from the outputs of the delayed 8, and the second to the zero output. RS trigger 9, the output of the fifth lot-element of element I 10 is connected to the reset input of the reverse of the Counter 5, the single output RS of the trigger 9, which is eisoco ШГГГШ 1ёра , ПЖЖл1б to another input of the logic element 3.

The pulse selector works as follows.

Upon arrival at the input of the emulsion selector, the first logical

746902

element 2 and the summing input of the reversible counter 5 begin to receive pulses from the generator 1, the counter 5 counts their number. At the moment of termination of the input pulse, the first logic element AND 2 is closed, the driver 4 generates a pulse corresponding to the trailing edge of the input pulse. If the number of pulses fixed by the reversible counter 5 corresponds to the selectable pulse duration, then the inputs of the third logic element And 6 will have the enabling signals, and the pulse from 1 to 1 will be sent to the RS input of the flip-flop 9 and will set to one. starts to form an output impulse. This closes the fifth logical element And 10, and the pulse from the output of the delay element 8 does not pass to the output. At the same time, the signal from the single output of the trigger 9 opens the second logic element I 3. And the pulse of the generator 1 begins to enter the subtractive input of the reversible counter 5. At the moment when the counter 5 is recorded zero, the fourth logic element AND 7 will be activated and the signal from the second the output will set the RS-trigger 9 to the zero position. The formation of the output pulse ends. At the same time, the second logical element And 3 will close, the Selector is ready to receive

the next bingal

five . . , . If the number of pulses recorded by the reversible counter 5, at the time of the appearance of a pulse, from the output of the shaper 4 does not correspond to the selectable pulse duration, then at the inputs of the third logic element. And 6 immots prohibit signals, so the pulse from the output of the imaging device 4 will not pass to the output, the RS-trigger 9 will not work, the output of the selector pulse will not. Through the delay time, a pulse is produced at the output of the delay element 8j which, through an open logic element AND 10, passes to the reset input of a revisive counter 5 and resets it to its original position. Pulse selector is ready To receive the next “About pulse.

The delay time of the delay element 8 is set to a longer response time of the AND 6 and R-Trigger 9 logic element, which is necessary for accurate operation of the selector. 57 The introduction of a reversible pulse counter, three logical elements AND, a delay element and an R S trigger favorably distinguishes this selector from the known ones, since it allows the selection of pulses having a given duration while the output pulses do not differ in duration from the input pulses. Claims of the invention Pulse selector by duration, containing a pulse shaper, two logical gates And, the first input of the first of which is connected to the input bus, and the second input - from the output of the generator; Torus of clock pulses, o tl and h a and c tech}, that, in order to isolate pulses, the duration of which is within a predetermined range, a pulse counter is entered into it, the summing input of which is connected to the output of the first logic element AND, additional logic elements AND, delay element and trigger, and zero outputs The pulse counter dyes are connected to the inputs of the new additional logic element AND, whose code is cofr2 6; dinene with R-input R-trigger, S input of which is connected to the output of the second additional logic element And, a single output with output bus and the first input of the third-about additional logic element And, the second input of which is connected to the output of the clock generator, and vylbp - with the subtracting input of the pulse counter, the unit outputs of which are connected to the Bhodhamn of the second complementary logic element I, one of the inputs of which is connected to the output of the pulse former and the input of the delay element whose output connected to the first input of the second AND gate logicheo one, a second input coupled to an output of zero US-flop, and the output pulses from the counter reset input. Sources Enformachga, taken into account in the examination of 1, -The author's certificate of the USSR NO 558394, cl. H 03 K 5/18, 1976. 2. USSR Copyright Certificate No. 356770, cl. H 03 K 5/18, 10/23/72.

Claims (1)

Claim 746902 6 din with R-input R * o whose input is connected to the output of the second additional logic element And, a single output with an output bus and the first input of the third additional logic element And, the second input of which is connected to the output of the clock generator, and the output is subtracting the input of the pulse counter, the single outputs of which are connected to the inputs of the second additional logic element And, one of the inputs of which is connected to the output of the pulse shaper and the input of the delay element, the output of which is connected logicheo first input of the second one of the AND, the second input of which is connected to the output of RS -triggera zero, and the output from the counter reset input • pulses. ι Trigger S 10 The pulse selector in duration, containing the pulse shaper, two logical elements AND, the first input of the first of which is connected to the input bus, and the second input - with the output of the clock pulse generator, which is connected, that, with a circuit 'for separating pulses whose duration is within the specified limits, a pulse counter is introduced into it, which sums up the input of which is connected to the output of the first logical element And, additional logical elements And, the delay element. ki and Rs are a trigger, and the zero outputs of the pulse counter are connected to the inputs of the first additional logic element And, the output of which is IS