SU822333A1 - Pulse discriminator - Google Patents

Description

one

The invention relates to a pulse technique.

A pulse selector is known (a device for controlling the time intervals between pulses) containing a discrete signal delay block consisting of a pulse counter, a control unit (as part of a clock generator, a reset circuit of the counter to the initial state), a strobe signal start block , block of the signal stub end, inverter, trigger, coincidence circuit.

The disadvantage of such a pulse selector is the passage of pulses through it, the time intervals between which exceed the specified time intervals by a time which is a multiple of the time the meter is completely filled.

The closest to the technical essence of the invention is the pulse selector, which contains a clock pulse generator, the input of which is connected to the input bus and the input, a pulse shaper, whose output through the delay element of the switch to the reset input of the counter, and through the first element NOT to the input of the counter

And, the second input of which is connected to the output of the clock тtulse generator, and the output is connected to the input of the pulse counter, the corresponding outputs of which are connected to the inputs of two g nummers, the output of one of which is NOT connected to the third input of the element AND pj

0 lack of stability.

The aim of the invention is to increase the stability of the selection boundaries.

The goal is achieved

5 by the fact that the pulse selector contains a clock pulse generator whose input is connected to the input bus and the input of the first shshulsov generator, the output of which is connected through the delay element to the reset input of the pulse counter and through the first element NOT to the first input of the element I, the second input of which is connected to the output of the clock generator

5 pulses, and the output is connected to the input of a pulse counter, the corresponding outputs of which are connected to the inputs of two decoders, the output of the first of which is NOT through the second element

0: connected to the third input of the element

And / the second pulse shaper is entered, the third element is NOT and two additional elements are And, the first inputs of which are connected through the second pulse shaper to the output of the first pulse former, and the second inputs of the first additional element And directly, and the second through the third element NOT connected to the output the second decoder, one of the inputs of which is connected to the control signal bus.

The structural electrical circuit of the selector described is shown in the drawing.

The selector contains a clock pulse 1, the elements And 2. .. 4 counts 5 pulses, elements NOT 6 ... 8, first and second drivers 9, 10 pulses, delay element 11, decoders 12, 13. The selectable signal is fed to bus 14 ,.a bus 15 is fed a control signal. The output signals are removed from the outputs 16, 17.

The principle of operation of the selector is as follows.

The input pulses from the bus 14 are fed to the synchronization input of the clock pulse generator 1 and to the input of the pulse driver 9. Under the action of one of the fronts (positive or negative) of each pulse, the clock pulse generator 1 is reset. In this case, a clock pulse of duration L p is formed at its output. Under the action of the same front of the output signal to the output of the pulse generator 9, a pulse of duration iy, lying within j- and T, is formed, where T is. pulse period of the clock pulse generator 1.

The pulse from the output of the imaging unit 9 is fed to the input Resetting the pulse counter 5 through the delay element 11 and sets it to its initial state. In this case, the decoder 13 is set in such a state that the permitting potential acts at the second input of the element And 2.

After resetting the pulse counter to the initial state, the selector is ready to analyze the time interval between the corresponding like edges of two adjacent pulses of the input signal.

. The pulse from the output of the imaging unit 9 enters through the element-NOT 7 to the third input of the element I 2 and closes it through this input, and the pulse generated at the output of the clock pulse generator 1 under the action of the front of the input signal will not pass through the element 2 to the input of the pulse counter five.

Upon completion of the pulse formation by the pulse shaper 9, the element And 2 will open at the third input, and all subsequent pulses generated by the clock pulse generator 1 will pass through this element to the input of the pulse counter 5

The bus 15 is supplied with a signal of two levels (single and zero), under the action of which a discrete change in the time intervals of the selection of pulses is made. If there is a selector on bus 15 (control input of decoder 12) of a signal, for example, a single level of decoder 12, under the action of signals received at its other inputs from triggers (not shown) of pulse counter 5 generates a pulse whose leading edge coincides with the leading edge The n-th clock pulse received at the counting input of the pulse counter 5 after resetting it to its initial state, and the pulse duration is equal to the period T of the clock pulses following, generated by the clock pulse generator 1. If the bus 15 Elector enters zero level signal at the output of the decoder 12 is formed of the same pulse duration T / leading edge which corresponds to the rising edge of the m-th clock pulses received on the input of the pulse counter 5, after it is reset to the initial state, and n m. Under the action of the pulse generated by the decoder 12, the element And 3 opens at the second input, and the element 4 at the second input closes. . In the absence of a pulse at the output of the decoder, the element And 3 on the second input is closed, and the element And .4 open.

IF the time interval between the same fronts of successive pulses on the bus 14 of the selector corresponds to the specified, i.e. is in the range between the n-th and (n + 1). th or t-th and (t + 1) -th clock pulses transmitted through the element I 2 to the input of the pulse counter 5 after resetting it to its initial state, and On the selector bus 15, a single (or zero) level signal is set, when the n-th (or t-th) clock pulse arrives at the input, element 3 will open at both inputs under the action of the pulses generated at the outputs of the decoder 12 and the pulse former. 10, and at the output 16 of the selector, according to a Wits, a signal on the correspondence of the pulse following period of the input signal of a given value. The pulse shaper 10 is triggered by the leading edges of the pulses arriving at its input from the pulse shaper output 9.

Claims (1)

Claim A pulse selector comprising a clock pulse generator, the input of which is connected to the input bus and 5th input of the first pulse shaper, the output of which through the delay element is connected to the pulse counter reset input, and through the first element NOT to the first input jQ of element And, the second input of which keys to the output of the clock generator, and the output is connected to the input of the pulse counter, the corresponding outputs of which are connected to the inputs of two decoders, the output '5 of the first of which is NOT connected to the third through the second element m the input of the And element, characterized in that, in order to increase the stability of the selection boundaries, a second pulse shaper, the third element NOT and additional I elements are inserted into it, the first inputs of which are connected through the second pulse shaper to the output of the first 25 pulse shaper, and the second the inputs of the first additional element And directly, and the second through the third element is NOT connected to the output of the second decoder, 30 one of the inputs of which is connected to the control signal bus. ''