SU886253A1 - Frequency synthesizer - Google Patents

Description

(54) FREQUENCY SYNTHESIZER

I

 belongs to the radocotech and can be used in the equipment for various purposes.

A frequency synthesizer is known, which contains a separately connected controlled oscillator, a frequency divider with a variable division factor, a phage detector and the first low pass, and a successively connected zero beat detector and differential frequency generator and successively connected reversing counter, converter the code-voltage and the control element, the output of which is connected to the control-input of the controlled generator, as well as the reference generator chz, the output of which is connected to another phase detector and one of the ZE inputs of the zero-beat detector, the other input of which is connected to the output of the frequency target with a nepeMeHHbnvf coefficient

In the frequency lab synthesizer in Sawako, the spectral purity of the output C11 is not high enough.

The circuit of the invention is the improvement of the spectral purity of the output signal.

To achieve this goal in snn-. a frequency generator containing a series-connected controlled oscillator, a frequency divider with a variable division factor, a phase detector

10 and the first filter of the LOW frequencies, as well as sequentially connected zero-beat detector and differential frequency shaper and a series-connected reversible counter, are transformed.

15 Tejjb code-voltage and keyframe element, the output of which is connected to the ugflula input of the controlled generator, as well as the reference generator, the output of which is connected to another input of the phase detector and k to one of the inputs of the zero beat detector, the other input of which is connected To the output frequency divider with a variable division factor.

between the other output of the zero-beat detector and the OTHER input of the control element are connected in series the second low-pass filter, a comparator and an electronic relay, and between the output of the differential frequency former and the input of the reversible counter, the serially connected time sensor and the And element, the second and third inputs of which are connected correspondingly, with the output of a differential frequency rapper and with the output of a comparator, the first of which is connected to another input of the reversible counter, and the other input d e turnip connected to the output of the first filter x Nyzhi frequencies.

FIG. 1 shows a structural electrical circuit of a frequency synthesizer; in fig. 2 - dependence of the ratio of the oscillation frequency of the controlled generator and the output voltage of the CHAP system over time.

The frequency synthesizer contains a controlled oscillator 1, a divider 2 frequencies with variable coefficient, 1 step dypenn (DCPD), phase detector 3, detector 4 zero beat, variable frequency drive S, reversible counter 6, code-voltage converter 7, control element 8 , the reference generator 9, the first and second filters 10 Kgli nt these frequencies (LPF); comparator 12, electronic relay 13, time sensor 14, element I15,

The frequency synthesizer includes a PLL system consisting of: a reference generator 9, a phase detector 3, DPKD 2, a low-pass filter 10, an electronic relay 13 and a control element 8, and a TAP system consisting of: a detector of 4 zero beats, a frequency difference generator 5 , time sensor 14, element I15, reversible counter 6, converter, 7 code - for example, LPF 11 and comparator 12,

The frequency synthesizer works as follows.

If the oscillation frequency of the controlled oscillator 1 is within tolerance, from the first output of the comparator 12 to the control input of the electronic relay 13 is supplied a logical O, which opens it, and the PLL system is turned off. In this case, the period of the following pulses is 1 / d. at the output of the imaging unit 5 exceeds the magnitude of 1 / d $., respectively, exceeds the duration of the output pulse of the sensor 14 time, which is chosen equal to -f / if p, and the beginning of the pulse corresponds to the trailing edge of the pulses c

shaper 5; Thus, by the time of the arrival of the next pulse from shaper 5, the pulse of time sensor 14 ends and yes the element I15 is fed

logical O. As a result, pulses from the driver 5 are not passed to the reversible counter 6. It should be noted that from the second output of the comparator 12 to the third input of the element I15 comes

logical 1.

If 1 / d becomes less ((L5d, ..), the input of the reversible counter 6 is given a pulse, and at the output of the converter 7, the code-voltage is changed

5 by one step (up or down, depending on .1 Signed 1с.д, ie, depending on whether the pulse is summed up with a reversing / meter 6 or subtracted). Thus, the frequency of the controlled oscillator 1 is reintroduced within tolerance.

In the case when the frequency deviation of the controlled oscillator 1 exceeds iEho; I at the first output of the comparator 12 appears logical 1, allowing the PLL to work, and at the same time at the second output of the communicator 12, logical O, which does not allow pulses from the driver 5 to pass through the I15 element to the reversible counter 6. Logical 1 from the comparator 12 is also supplied to the installation input of the reversible counter 6, wherein the system of the reversible counter 6-converter 7 code-voltage is set to the position corresponding to the middle stage of the output voltage.

Improving the purity of the synthesizer output spectrum is one of the many challenges for EMC electromagnetic compatibility problems. Taking into account, for example, the requirements for modern radio receivers in terms of selectivity (12O dB and more), as well as the massive use of frequency synthesizers as local oscillators of receivers, it can be argued that the proposed synthesizer is one of the options for improving the technical parameters of receiving and transmitting equipment.

Claims (1)

Invention Formula A frequency synthesizer containing a series-connected controlled oscillator, a frequency divider with variable division ratio, phase the detector and the first low-pass filter, as well as successively connected detections of zero beats to the differential frequency shaper and serially connected reversible counting, a kotz-voltage converter and a waveform element whose output. . It is connected to a floating input of the controlled oscillator, as well as a reference oscillator, whose input is connected to another input of the phase detector to one of the inputs of the zero-zero detector, and the other input is connected to the output of a frequency divider with a variable division factor, which is equal to that. that, in order to improve the spectral purity of the output signal, between the other output of the zero beat detector and the other input of the stinging element are included The second low-pass filter, a comparator and an electronic relay are connected in series, and between the output of the spacing frequency generator and the input a reversible counter is introduced in series connected by a time sensor and an element I, the secondary and the third inputs of the kotarago are connected respectively to the output of a differential frequency former and with the second output of the comparator, the output of which is connected to another input of the reversible counter and the other input voltage of the electronic relay is connected to the output of the first low-pass filter. Sources of inf rmacin, 1 in question when examining 1 Ryzhov A.V. Combined PLL System with Reverse Search Electrosv, 1975, N 10 p. 68-7О ((prototype). Output Fi.g.1 Phie.1