SU1305846A1 - Digital frequency synthesizer shaft turn angle-to-digital converter - Google Patents

Abstract

This invention relates to radio. The purpose of the invention is to expand the capture band. Phase detector (PD) 3, divider 4, generator 5, low pass filter (LPF) 6 and adder 11 form a digital ring of the phase AFC on the reference voltage produced by the generator 1 of the reference voltage and divider 2 In the hold mode, the frequency of the oscillator 5 is kept constant due to the voltage of the trimmed PD PD 3. When a beat mode occurs, pulses of the difference frequency appear at the output of one of the reverse registers (PP) 7 or 8. Considering that the duty cycle of these imp lsov may be large, mounted nonlinear LPF 9 and 10, which increase the constant voltage component from the output RR 7 or 8, preliminary smoothing and voltage. The voltages produced by the low-pass filters 9 and 10 are through an adder. 11 and the low-pass filter 6 affect the generator 5, which leads to the effect of frequency auto-tuning. After decreasing the frequency difference of the pulses fed to the PD 3, the transition to the hold mode is achieved by operating the digital ring of the phase control frequency. 1 il. § (L with Ov 00 4 Ofi

Description

The invention relates to radio communication technology,,.

The purpose of imaging is to expand the capture range.

The drawing shows a structural electrical circuit of a digital frequency synthesizer.

It contains a reference voltage generator 1, a divider 2 with a constant

dividing ratio, phase detective-oO register and preliminary

torus 3, divider 4 with variable division factor, generator 5, voltage controlled filter, 6 low frequencies (LPF), first 7, second 8 reversible river registers, first 9, second 10 nonlinear low pass filters and adder eleven.

Digital frequency synthesizer works as follows.

Phase detector 3, divider 4, generator 5, LPF 6 and adder 1; form a conventional digital phase locked loop for the reference voltage produced by the reference voltage generator 1 and divider 2. In hold mode (synchronism), the frequency of the generator 5 is kept constant due to the voltage tuned by the phase detector 3. retreatment due to abrupt dissociation of the frequencies of the voltages applied to the phase detector 3, which occurs, for example, due to a change in the coefficient (} x |) of the divider frequency division division 4, there are pulses of difference You are at the output of one of the reverse registers 7 or 8, which are connected to the outputs of dividers 2 and 4 frequencies in such a way that if the input of the direct count of the first reversing register 7 is pulsed

 from divider 2, pulses from divider 4 arrive at its countdown input, and pulses from divider 4 arrive at the forward count input of the second reverse register 8, while at its countdown input from divider 2. Therefore, if the pulse frequency at the output of divider 2 is higher than the pa of the output of divider 4, at the output of the first reversing register 7 pulses of difference frequency appear, and at the output of the second reversible register 8, there are no pulses Otherwise, pulses appear at the output of the second reversing register 8 That way In this case, differential frequency pulses appear at the output of one or another reverse register, depending on the sign of the difference frequency. Considering that the duty cycle of these pulses can be large (it depends on the length of the registers), the first and second nonlinear low-pass filters 9 and 10 are installed at their outputs, the role of which is an increase in the constant component of the output voltage

smoothing stress. The voltages produced by non-linear low-pass filters 9 and 10, through an adder 11 and low-pass filters 6, affect the generator 5, which leads to the effect of frequency auto-tuning. After the frequency difference of the pulses arriving at phase detector 3 is significantly reduced by the frequency-locked loop effect, the transition to the hold mode is achieved by operating the digital ring of the phase-locked loop.

Claims (1)

Invention Formula A digital frequency synthesizer containing a series-connected voltage generator, a frequency divider with a constant dividing coefficient, a phase detector, as well as serially connected low-pass filter, a voltage controlled oscillator, and a frequency divider with variable division factor, the output of which is connected to another the phase detector, characterized in that, in order to broaden the capture band, the first connected a reversing register and a first nonlinear low-pass filter, a second reversing register and a second non-linear low-pass filter connected in series, as well as an adder whose input is connected to the outputs of the first and second non-linear frequency filters and the phase detector, respectively, and the output to the input of the filter lower hour from, with the output of the frequency divider with a constant — the division factor is connected to the direct count input of the first reverse register and the countdown input of the second reverse register, and the output of the frequency divider with variable division factor is connected to the count input of the first reverse flag and input pr account of the second reverse register.