SU389608A1 - FREQUENCY SYNTHESIZER - Google Patents

Description

one

A frequency synthesizer is known, which comprises a synchronized oscillator connected in a ring pattern, a frequency divider with a variable division factor, a phase detector to which the auxiliary oscillator is connected, and a low-pass filter.

Violation of cyclicity in the sequence of output pulses of a fractional frequency divider causes additional lumps, which are subharmonics of the reference frequency.

The purpose of the invention is to improve the filtering of interference equal to the subharmonics of the reference frequency.

The proposed frequency synthesizer is characterized in that a frequency divider, a phase detector, and a lower frequency filter are included between the output of the synchronized oscillator and the input of the auxiliary oscillator.

Block diagram of the device shown in the drawing.

The output signal of the synchronized generator / is supplied simultaneously to: the input of a frequency divider with a variable division factor (DPKD) 2 with a division factor yVi and to the input of a frequency divider with a fractional variable division factor (DPDK) 3 with a division factor N. N. Control signal vomit the generator 4 comes from the phase detector 5 through the low-pass filter 6. On the detector 5

the reference signal with the frequency FO is compared with the output voltage of the DDPC 5. In turn, the output signal of the generator 4 with the frequency / is compared on the phase detector 7 with the output voltage of the PDKD 2. The control signal from the output of the detector 7 through the low-pass filter 8 is fed to the control element of the generator one.

Thus, in synchronization mode, the output frequency of the synthesizer is

/ out 1 /.

The discreteness of the frequency grid F of the output oscillations is determined by the nominal reference frequency and the number of fractional decades in the DDPC. which we denote by p:

F ° 10 "

The setting of dividers divider coefficients occurs synchronously from the frequency dial switches. The correspondence of the divisor coefficients is determined by the matching circuit 9.

The gain in noise filtering due to the lack of clarity, which are subharmonicamps of the reference frequency, is due to the fact that the loop of auto-tuning with DDPK 3 causes the tuning of generator 1 not in its entire range D / Ni, but only in the interval & .f / Ni, t. e. system gain for

interference at the DDPC output is reduced by the DDCA 2 division rate. Almost the gain is 40-60 dB.

The subject invention

A frequency synthesizer that contains a ring-coupled on-off oscillator, a frequency divider with a variable division factor, a phase detector, to another input of which an auxiliary oscillator is connected, and a low-pass filter, characterized in that:: to improve filtering of interference, the reference frequency subharmonics , between the output of the synchronized generator and the input of the auxiliary generator are connected serially connected frequency divider with fractional variable (dividing factor, phase detector and low-pass filter, with both frequency dividers matched.