SU1283964A1 - Frequency synthesizer - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to increase the spectral purity of the output signal. The device contains tunable r-r 1, control divider 2 frequencies, control block 3, reference gr 4, DAC 5, low-pass filter 6, phase detector 7, current source 8, two capacitors 9 and 13, 10-bit switch , sampling key 11, source follower 12. PRI And converting the output signal of the DAC 5 in the phase detector 7 RF components of the noise of the DAC 5 are significantly suppressed due to the filtering action of the function like (sinx / x), which allows to improve the spectral purity of the output signal of the device when maintaining high speed tuning ki from one frequency to another. 1 il.

Description

ts9

00

oo soa

four

1-12

The invention relates to radio engineering and can be used in transceiver equipment as a highly stable driver or local oscillator.

The purpose of the invention is to increase the spectral purity of the output signal.

The drawing shows a structural electrical circuit of a frequency synthesizer.

The frequency synthesizer contains a tunable oscillator 1, a controlled frequency divider 2, a control block 3

nor, reference oscillator 4, digital-to-analog converter (DAC) 5, low-pass filter (LPF) 6, phase detector 7, current source 8, first capacitor 9, dongle 10, sampling key 11 ,. source follower 12, second capacitor 13,

The frequency synthesizer works in the following way.

The magnitude of the frequency f. Generated by the tunable generator 1, is determined from the ratio

x

to.

where f

on

reference oscillator frequency 4; K about - the ratio of dividing often3 „

you controllable divider / The value of K is set in binary code using the control unit 3, and simultaneously in the DAC 5 the code of the value K is converted to some proportional to the value of K ", which controls the constant voltage i" P which goes to one of the first condensation plates torus 9. At the same time, the first capacitor 9 is charged with a stable current from the current source 8. The process of charging the first capacitor 9 ends at the moment of arrival of the pulse with frequency f from the reference generator

torus 4, This pulse opens the key of discharge 10 and discharges the first capacitor 9 to almost zero

residual stress. I

In this case, a sawtooth voltage with an amplitude is formed on the first capacitor 9

and iT, / Cq,

where I is the charge current of the first capacitor 9 from the current source 8;

T is the period of the reference frequency fg

Support generator 4 | the value of the capacity of the first capacitor 9.

Moreover, the value U is formed on the first capacitor 9, raised relative to the common power bus

by U

Chpr

AT

the key of the sample is given the voltage

and and

CRP

+ and

Upon receipt of a sampling pulse

The frequency -f from the output of the controlled J5 divider 2 to the control input of the sample key 11 at the output of this key appears voltage U, proportional to the instantaneous value of the value and. The second capacitor 13 memorizes 20 this value U, and through the source follower 12 and low pass filter 6 transfers this voltage to the control input of the tunable generator 1. At

the coincidence of the frequencies f and f in the system nfix

 - phase-locked loop occurs in steady state operation (capture mode), in which the -U value is determined by the phase shift between fp and f. At a constant value

30 K and the increment of the value of U (change in the value of and) is determined by the component and, since the value of U

apr

 Const with K „Const. Thus

By connecting the output of the DAC 5 to the first capacitor 9 in this way, a coarse adjustment of the frequency f to the value of f due to the magnitude is obtained, after which a phase auto-tuning occurs in the phase-locked loop system and the phase-locked tuning occurs using the U component. A distinctive feature in the operation of the proposed device is that

45 noises from the output of the DAC 5 are not directly transferred through the control input to the output signal spectrum of the tunable oscillator 1, but pass through the phase detector 7,

50 namely through sample key 11, the source follower 12 and the low-pass filter 6. In this case, the transfer of noise is accompanied by a quantization process in sample key 11,

55

At the same time, connecting the other output of the first capacitor 9 to the output of the DAC 5 reduces the effect of the noise of the latter on the spectrum of the output signal 3

Since these noises undergo a transformation in the phase detector, which reduces the degree of their effect on the control element of the tunable oscillator. As a result, the noise of the DAC 5 on the phase detector 7 of the sample-memory type is the output signal of the last

has a stepped shape. I

The floor noise at the output of the DAC lym with dispersion, it is possible to record the spectral density (its continuous part) of the output signal of the phase detector in the form

q, nS-i

G LICH --- 2-)

l () 7.

where T is the period of the reference frequency.

Thus, when converting the output of the DAC 5 in the phase detector 7, the high frequency noise components of the DAC. 5 are substantially suppressed by the filtering action of the function of the form, (sinx / x), which allows to improve the spectral purity of the VEHODE signal of the frequency synthesizer while maintaining a high tuning rate from one frequency to another.

839644

Claims (1)

Invention Formula A frequency synthesizer that contains ring-tunable 5 a generator, a controlled frequency divider, a phase detector and a low-pass filter, a reference oscillator, the output of which is connected to the second input of the phase detector, in series fO connected control unit and digital-to-analog converter, the control input of the controlled frequency divider is connected to the output of the control unit, while the phase detector is fuller in the form of a sample-memory type detector and contains serially connected discharge key, sample key and a source follower, a source of current whose output is combined with the first output of the first capacitor and connected to the input of the sampling key, a second capacitor that is connected to the output of the sampling key, and the control input 25 selection key, control input the key of the discharge and the output of the source follower are, respectively, the first and second input and output of the phase detector, distinguished 30 so that, in order to spectral purity of the output signal, the output of the digital-to-analog converter is connected to the second output of the first capacitor.