SU708513A1 - Variable division factor frequency divider - Google Patents

Description

 The invention relates to the technique of immersion and can be used, in particular, B software control devices. A known frequency divider with a variable target ratio, containing pulse counters and logic elements li. The disadvantage of this frequency divider is its limited response speed. Closer to the technical entity is a frequency divider with a variable division factor, containing a pulse counter with a constant counting coefficient, the outputs of which bits are connected to the inputs of the corresponding device bits compared to 1 and the device specifying the target coefficient totalizer, register, outputs each of the six The KoixDporo terminals are connected to the inputs of the corresponding bits of the code comparison device, the driver, the inverter, and the AND 2j logic element. The disadvantage of the known device is comparison complexity, since in each division cycle it is necessary to carry out a calculation of the new target ratio equal to the sum of the number stored in the register and the number coming from the division factor setting device. In addition to the above, it should be noted that when the kongest coefficient is divided close to the overflow boundary Sp -1) of the counter bits with the incremental counting coefficient, it is necessary to output the signal from the P – th bit of the counter through the logical element - and the counter discharge to the initial state. The purpose of the present invention is to increase the reliability of its work. This goal is achieved by the fact that in a frequency divider with a variable division factor, an impulse counter with a constant coefficients rcc, the input of which is connected to the input bus and the outputs of the bits are connected to the inputs

the corresponding bits of the code comparison device, the division factor setting device, an additional pulse counter with a constant counting factor is introduced, the outputs of which bits are connected to the inputs of the corresponding bits of the code comparison device, a switch, whose outputs are connected to an additional pulse counter with a constant count coefficient, control input - to the output of the device comparing codes, and inputs to the corresponding outputs of the device, setting the division factor, pulse counter with A variable counting coefficient and a control trigger, whose information input is connected to the input pulse bus, a single input to the output of the code comparison device, and an output to the input of an additional pulse counter with a constant counting coefficient and a counter with a variable coefficient of the account client; which is connected to the bullet input of the control trigger by means of control and to its input of the addition unit through the device for setting the division factor.

The drawing shows the structural electrical circuit of the proposed device.

It contains a pulse counter 1 with a constant counting coefficient, the outputs of all K1 bits of which are connected to the inputs of the corresponding bits of the device 2 code comparison, an additional counter of 3 pulses with a constant counting factor, the outputs of all P bits of which are also connected to the inputs of the corresponding bits The device device 2 compare codes. Counter 1 with a constant factor (} and the account count and additional counter 3 with a constant coefficient. The counting volume is similar in design. The device also includes a switch 4, a pulse counter 5 with a variable counting factor (t-bit), device 6 setting the dividing ratio, controlling trigger 7, alarm 8 input pulses and device output 9. Switch 4 can be either mechanical or electronic. The number of switching circuits (elements) is equal to (P -1) the bits of the additional counter 3 with a constant coefficient sch The outputs of the switch 4 are connected to the input of the additional counting 3 them ™ pulses with a constant counting factor, and the inputs are connected to the corresponding

1DIM outputs of the device 6 for setting the factor of a deltsh, the control input is connected to the output of the device 2 for comparison of codes, m-bit counter

5, with a variable counting factor, has an addition installation input to eliminate unnecessary stable distances. The output of the cn-counter of the counter 5 with a variable counting coefficient is connected to the

the left input of the control trigger 7 and, through the device 6, the setting of the division factor with its input of the addition unit. The information input of the control trigger 7 is connected to the bus 8

input pulses, and the output of the control trigger 7 is connected to the input of the additional counter 3 with a constant counting coefficient and the input of a W-discharge counter 5 with a variable coefficient

accounts. The output of the code comparison device 2 is connected to a single input of the controlled trigger 7 and connected to the output of the device 9. With the help of the dividing ratio setting device 6, the division coefficient is set and (Ka) is the selection of the corresponding higher RR5 of the additional counter 3 with the variable account coefficient to set it through switch 4 to inverse

1 state with each dividing cycle, the choice of entering additional ni-bit counter 5 with a variable counting coefficient. The operation of the device is as follows.

On the division factor setting device 6, the division factor Kg is set up, which consists of a number for writing to an additional counter 3 with a constant counting factor and a number for

records in m-bit counter 5 with a variable counting factor in each division cycle. According to the original, an addition is entered into the m-bit counter 5 with a variable counting coefficient and in addition

The counter counter 3 with a constant counting coefficient is used to set the corresponding bit to the inverse state from the division ratio setting device 6. When starting the device

the state is set to a single state, trigger 7, and in shige 8 ipopnyh pulses, the woofer of the periodic postpairing begins to arrive. impulses come freely in

Claims (2)

the counting path of counter 1 with a constant counting coefficient k through the control trigger 7, the counting path of auxiliary 3 with a constant counting coefficient and tvi -discharge counter 5 with a variable counting coefficient. The pulses supplied to the additional counter 3 with a constant counting factor supplement the contents of this counter to a predetermined division factor KQ. The impulse from the output of the m-discharge counter 5 with a variable counting factor accounts the control trigger 7 to zero. stopping the arrival of the frequency pulses of the input to the output of the control trigger 7, and simultaneously through the device 6 sets the division factor to input the addition to the m-discharge counter 5 with a variable counting factor preparing it o to work in the next division cycle. Counter 1 with a constant counting factor continues to receive pulses of the input clock frequency. When counter with a constant counting code reaches the counter 1, which is equal to the code fixed in the additional counter 3 p with a constant counting coefficient, the comparison is performed and a pulse is generated at the output of the code comparison device 2. This impulse arrives at the output of the device 9, as well as the ocjiTieciEHseT, installation of the control trigger 7 in a single state and, through the switch 4, performs the inversion of the selected corresponding discharge of the additional counter 3 with a tusage counting coefficient. On this one cycle of division the device is smoked and the new division cycle begins. In the future, the operation of the device is similar. Suppose that the capacitance of the counter path of counter 1 with a constant counting coefficient and additional counter 3 with a constant counting coefficient is 1024. The division factor of the device is set to 392, i.e. the ninth bit of the additional counter 3 is set to one state, which is equivalent to recording the number - 256 and the hp –digit counter 5 with a variable i counting coefficient is set to addition, in which, after posting to the input of the counter 1, the pulses of the input signal frequency the input of the additional counter 3 with a constant coefficient will be received by 136 pulses of the clock frequency. In addition, in the additional counter 3 with a constant coefficient of counting, it is fixed; a code equal to 392. This pulse will increase the number recorded in the incremental counter 3 with a constant Koe (the invoice volume number, by 256, i.e. () will set the 1 trigger state of the trigger to 7, then the contents of this counter will increase by another 136, i.e. (648 + .136-784). After another comparison, the code number 152, i.e. (784i256f 1-136 1176), will be fixed in a valid counting counter 3 by a constant counting factor. Since the capacity of this counter is 1024, the code of the number 152 will be fixed in it. Formula of the invention Frequency divider with variable division factor, The counter counting pulses with a constant counting factor, which is connected to the input bus, and whose outputs are connected to the inputs of the corresponding bits of the code comparison device, the device for assigning the coefficient, tl and h and and so For example, in order to improve the reliability of its operation, in it, an additional impulse counter with a constant counting factor of 1 count, the outputs of the bits of which are connected to the bits of the corresponding bits of the comparison device), is a switch, the outputs of which are ry to additional schegchiku pulses with constant kozfoiikentom account yuigy control input. to the output of the device comparing codes, and the inputs to the corresponding output of the device for setting the division factor, a pulse counter with perimeter h and the control trigger, the information input of which is connected to the bus of the input pulses, a single input to the output of the code comparison device, and the output the input of an additional pulse counter with a constant counting pulse and a pulse counter with a variable counting coefficient, the output of which is connected to the zero input of the control trigger directly and from Our entrance to the installation of the add-on is through the device for the task of the coefficient of division. Sources of information taken into account during the examination 1, Lainov M. L, and others. Digital divide frequencies on logical elements, M., 1975, p. 100. 2. Author's testimony, drink i 481138, cl. N OZ K 23 / O2, 1P73.