SU894875A2 - Device for changing pulse repetition frequency - Google Patents

Description

one

The invention relates to a pulse technique and can be used in digital control systems.

According to the main auth. 570203, a device is known comprising two memory counter-registers, two frequency dividers and a switch. The installation signal in the counters-registers of the memory sets up the crust of the national values of the coefficients, the division, sets the code defining the number of output pulses in the counter, and the switch starts issuing the pulses of the reference frequency to the inputs of the frequency dividers. The pulses from the output divider are fed to the input of the addition of the counter-register memory, the outputs of its bits are connected to the inputs of the frequency divider, the pulses from the output of which are fed to the input of the subtraction of the counter-register of the memory connected to the output frequency divider. As a result of the described interaction nodes of the device, the division factor of the output divider is changed in such a way that the frequency of the output impulses varies from pulse to pulse according to the linear-step law DD.

However, the known device only solves the problem of changing the pulse frequency in a given range, but does not have the ability to receive a series of discrete frequency values set by digital codes, when, when the control frequency of the code changes by one, the frequency of the generated pulses from 10 changes by a predetermined discrete value, t. the application of the known device is significantly limited.

The purpose of the invention is to provide the possibility of obtaining a series of discrete frequency values with a given step.

To achieve this goal, a device for changing the pulse frequency, containing a counter

20 output pulses, a memory counter-register, whose bit outputs are associated with the reference frequency divider bits, a switch and an additional register-memory counter,

The 25 outputs of which bits are connected to the inputs of the bits of the additional divider of the reference frequency, the output of which is connected to the subtraction input of the counter-memory register, and the counting

The input 30 is connected to the switch output and the counting input of the reference frequency divider, the output of which is connected to the addition input of an additional memory memory register counter and connected to the reset input of the switch through the output pulse counter and to the installation inputs of the counter - | memory register, additional counter-memory register and output pulse counter, and the second input is connected to the source bus of the reference frequency, a key is entered, the enable input and the pulse input of which are connected respectively etstvenno vyho to do .The inputs and subtracting the output of the pulse counter, the input turning off the bus setup signal, and the output is the output device. SUMMARY OF THE INVENTION that a linear change in the frequency of impulses is made at a time when the pulse frequency reaches a predetermined control code value, after which the generated pulses are output to the device. The structural electrical circuit of the device is shown in the drawing. The device contains an additional counter-register 1, count-reg-. memory 2, counter 3 output pulses, additional divider and divider 5 of the reference frequency, key b and switch 7, the pulse input of which is connected to bus 8 of the source of the reference frequency, and its first output is connected to the pulse input of the divider A, the output of which It is connected to the subtracting input of counter-register 2, and its bit inputs are connected to the outputs of the counter-register 1 bits. The input of count register 1 is connected to the first output of the device, with a pulse input of key 6, to the subtract input of counter 3 and c output divider 5, in The bits of the bits of which are connected to the outputs of the bits of the counter-register 2, and its pulse input is connected to the second output of the switch 7, the first direction e of the input of which is connected to the switch-on input of switch b, the output of which is the second output of the device and to the output of the counter 3, the bits of which are the information inputs of the device. The control input of the counter 3, the second, the controlled input of the switch 7, the installation inputs of the counter-registers 1 and 2, the dividers 4 and 5, and the switch-off input of the key 6 are connected to the bus 9 of the device installation. The device works in the following way. On the installation signal, dividers 4 and 5 are zeroed, counters registers 1 / and 2 are set, codes of initial division coefficients are set, and code 3 specifies the frequency of output pulses, key 6 turns off, and switch 7 starts issuing reference pulses to inputs dividers 4 and 5. The division factors of dividers 4 and 5 are given by codes stored in counters-registers 1 and 2. Pulses from the output of divider 4 are fed to the input of the subtraction of the register 2, decreasing the code recorded in it, and pulses from the divider 5 are fed to the input adding up register register 1, increasing the code in it. As a result of this interaction, the codes in the counters of registers 1 and 2 are automatically changed in such a way that from the output of divider 5, pulses are removed, the frequency of which the following changes varies from pulse to pulse linearly. The pulses from the output of the divider 5 are used to write off the code set in the counter 3 and determining the frequency of the pulses that key 6 should issue. When the code 3 is set to zero, the latter issues a signal to the key b and the switch number 1 to which the key 6 opens and starts charging pulses from divider 5, and com glutator 7 stops pulsing at the input of divider: 4, which, in turn, stops issuing pulses to the subtract input of counter-register 2 and thereby eliminates further code change, fixed In counter-register 2. As a result, pulses are removed from the output of the key b, the frequency of which is determined by the code arriving at the 3H counter, for example, to obtain a series of discrete frequencies in the range, f, -fn with step af, the initial values of the division factors , recorded in the counter-registers 1 and 2 must be equal to n, g, respectively, and where fJW is the frequency of the reference pulses. In this case, the first impulse from divider 5 appears through the period T "p e impulse from divider 4 through the period T, - T (-; +) L - f Af where Tlg is the period following WV of the reference pulses. The number of pulses that arrive at the input of the subtraction of the counter-register 2 for time T (equal to "T | 1 f, + af ef yrf Vf-rifr + yj. As a result, the counter-register 2 records a new division coefficient equal to n, n, j gL -y .iaa. The second pulse output divider 5

Claims (1)

Claim A device for changing the pulse repetition rate for autosw. It 570203, which requires that, in order to ensure the possibility of obtaining a number of discrete frequency values with a given step, a key is entered into it, the switching input and pulse input of which are connected respectively to the output and the input of the output ., readings of the counter of output pulses, the shutdown input - to the installation signal bus, and the output is the output of the device.