SU506018A1 - Device for generating code signals - Google Patents

Description

In relation to the solution of the problem of markers: coding (coding) frames of television signals, this device works as follows.

The sources of information and control signals are the clock generator of a television device, which is connected to the 1MaD2 and 4 devices for headlamps) Worldwide code signals. The information signals are frame sync pulses, which, through input i2, arrive at the SHOCK L- | discharge bit counter / and -through delay elements 6-8 - to the information input input of the first digit of the shift register J. The control signals are horizontal sync pulses coming through input 4 to the input of the delay element 7 and to the control; c, the moves of all bits of the register 5.

(The first frame sync pulse arriving at the counter input / translates its first bit into state 1. The same pulse, the passage through delay element 6, is delayed by a time equal to half the period of the horizontal sync pulses. On delay element 7, this pulse delayed until the occurrence of cadrosis extinguishing the pulse of the television sigpat of lowercase sync pulses. On the element; supports 8 the frame sync impulse is delayed by another half the period of the succession of lowercase pulses and enters the information pulse the progress of the first bit of the shift register 5.

0 | randomly building PM, posting the control input of the first digit of the shift register 5, causes a transfer pulse, which translates the second bit of the shift register into the state “unit h” simultaneously arriving at the amplifier input of the imager 9. This pulse It is not a code element, but a service element — it prepares a binary code transformer to decimal W for processing.

When the second bit of the shift register i5 is triggered, at the output of the first element of the "And" 3 element group, a pulse occurs, which is the number of the first frame. Like the service pulse, it is fed to the input of amplifier 9, and through it, to the input of the binary to 10 converter and to the output // of the device.

Subsequent row pulses translate the unit from the second bit of the shift register 5 to the output of the rt-f of the 2nd bit, from where

as a service, it goes to the amplifier-shaper 9: And then - to the converter W to the output //.

After this, register 5 returns to its initial state, a digital display with the frame number is illuminated on the W code converter, and a mixture of service and code pulses appears on the vertical damping pulse. At the same time, the unit of the first digit of the counter / is stored, to which with the second cycle (the second frame) one is added.

Claims (1)

Invention Formula A device for generating code signals containing an l-bit counter, the input of which is connected to the first input of the device, and the output of each g-th digit is with the input I / -Toro of the element "And, / r + 2-bit shift register, the control inputs of which are connected to the second input of the device, the information input of the first discharge (Through serially connected the first, second and third delay elements are connected to the first input of the device, an amplifier-formatirovat, the outputs of which are connected to the input of the binary-to-digital converter and to the output of the device, characterized in that, in order to simplify the circuit, the output of each i-th digit of the shift register is connected to the input of the i-1-th element "And, the outputs of the first and n-2-th bits and the outputs of all elements “And connected to the inputs of the amplifier-driver, the input of the second delay element is connected to the second input of the device. / H 1 / h 1 / -f-; ., u;, .. i, .-. J ..; ,,. /;., - "... t And h I I 4 f-ipH TO .J.,. ± L 1-be .t. P-hikt-E.- tj jJt4f «eS I .1,4-- - :: yyyj liin-j-