SU1698905A1 - Video signal shaper - Google Patents

Abstract

The invention relates to automation and computing and can be used in devices for outputting graphical information from a computer. The purpose of the invention is to simplify the device. The shaper contains counters 1 and 4, blocks 2 and 3 of the RAM, item OR 5 and item NOT 6. The color code written in memory block 2 and the line length code of this color written in memory block 3 are read to the addresses received and From counter 1. The code of the line length is entered in the counting number 4, which in the visible course of the line recalculates the sampling clock pulses received at its clock input in the subtractive mode. When the counter 4 reaches zero state, an impulse is formed at its output, which increases by one the address in counter 1 and initializes the insertion of the next code of the line length into the counter 4. 2 Il,

Description

The invention relates to automation and computing and can be used in devices for displaying graphical information from a computer.

A device for outputting graphical information is known that provides for the formation of a video signal using a memory unit, a pulse distributor and a modulation unit containing two registers and two multiplexers.

The disadvantage of this device is that it is complex, due to the fact that in it each point of the screen is copied by A bits, which leads to a significant amount of memory block and a complex block.

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Closest to the proposed technical solution is a video driver that contains the first and second blocks of RAM, the first and second counters, and the comparison block. This device uses the principle of block coding of information, which reduces the amount of memory blocks.

However, this device also has great complexity due to the presence of the reference element.

The purpose of the invention is to simplify the device.

The goal is achieved by the fact that the OR element and the NOT element are entered into the device. relevant

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a multi-bit comparison unit is omitted.

FIG. 1 shows a functional diagram of the imager; in fig. 2 - time diagram of his work.

The device contains the first counter 1t first 2 and second 3 blocks of RAM, the second counter 4, the element OR 5, the element NOT 6.

The device works as follows.

The device implements the principle of block coding information, when in the first memory block 2 the color codes of the horizontal fragments are stored in rows, and in the memory block 3 the lengths of these fragments are stored.

In the initial state on the reverse of the frame (Fig. 2.1), the signal (Fig. 2.2) into counter 1 records the code of the initial address for reading information from memory blocks 2 and 3 (Fig. 2.3). Therefore, the address of the first fragment (color and length) is read from blocks 2 and 3 of memory (Fig. 2.8). During the return stroke of the line (on the visible course of the frame), the signal (Fig. 2.4) in the counter 4 of the memory block 3 records the length code (Fig. 2.9) of the first fragment in the row. On the visible course of the line, clock pulses with a screen raster sampling frequency horizontally start to flow to the clock input of the counter 4, working on the subtraction, (Fig. 2.5). When the counter 3 reaches the zero code at its overflow output, an overflow pulse is generated (Fig. 2.6), which, passing through the NOT 6 element (Fig. 2.7) to the clock input of the counter 1, increases its content by one. This insides in reading from blocks 2 and 3 of memory information about the second fragment in a row (Fig. 2.8). The overflow signal (FIG. 2,6) of the counter 4 passes through the element 5 OR to the input of the information recording control in the counter 4 and allows the next code of the fragment length in the row (Fig. 2.9) to be entered into the block 3

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memory (Fig. 2.8), after which the procedure is repeated to the end of the line and in the next lines to the end of the visible frame stroke.

Shown in FIG. 2 diagram Constructed for counters, for example, type K15 5IE 7.

Thus, the invention provides a simplification of the device by eliminating a comparison unit therefrom. When the sampling raster is equal to 512 points, the comparison unit in the prototype has 9 bits, which is much more complicated than the elements NOT and OR entered to match the polarities of the signals. If there are counters with appropriate signal fields, these elements can be excluded.

Claims (1)

Formula invented A video signal generator containing the first and second counters, the first and second blocks of RAM, whose address inputs are connected to the output of the first counter, the information input and the recording control input of which are respectively the address and first control inputs of the imager, the clock input of which is clock the input of the second counter, the output of the first RAM block is the output of the former, characterized in that, in order to simplify the former, it contains the element NOT and the element OR, output which is connected to the recording control input of the second counter, the information input of which is connected to the output of the second RAM block, the clock input of the first counter is connected to the output of the NOT element, whose input and the first input of the OR element are connected to the overflow output of the second counter is the second control input of the driver. fig1