SU1682996A1 - Device for information input - Google Patents

Abstract

The invention relates to automation and computing and can be applied in automated devices W-CH-1} -N 21 7 2 J hardware communication control, data input devices and recording control programs of microprocessors and controllers. The purpose of the invention is to expand the field of application of the device due to the possibility of ordered data entry. The device contains switching elements 1.1-1.8, shapers 2.1-2.7 signals, reversible counters 3, 4, 11, 25, converters 5, 10, 12 codes, comparison unit 6, indication blocks 8, 27, pulse distributor 9, switch 21, elements And 7, 13, 14, triggers 15, 22, one-shot 16, registers 17, 18, encoder 19, keyboard 20, element OR 23. element NOT 24, block 26 decoders. 1 il. Ё С 00 ю чэ ю о

Description

The invention relates to automation and computing and can be applied to input devices and recording control programs of microprocessors and controllers.

The aim of the invention is to expand the scope due to the possibility of ordered data entry.

The drawing shows an electrical functional diagram of the device for entering information.

The device for entering information contains switching elements 1.1-1.8, namely, 1.1 for zeroing, 1.2 for shifting information to the right, 1.3 for shifting information to the left, 1.4 for direct counting.1.5 for counting back (brute force command characters), 1.6 for data entry to the external memory 1.7 for forward enumeration of the pages (zones) of the code converter memory, 1.8 for reverse enumeration, shapers 2.1–2.7 signals, first 3 and second 4 reversible counters, first converter 5 codes, comparison unit 6, first element 7 , first display unit 8, distributor 9 imp Lsov, second converter 10 codes, third reversible counter 11, third converter 12 codes, second 13 and third 14 elements And, first trigger 15, one-shot 16, first 17 and second 18 registers, encoder 19, keyboard 20 (digital hexadecimal), switch (codes) 21, the second trigger 22, the element OR 23, the element NOT 24, the fourth reversible counter 25, the decoder block 26 and the second display 27.

After the supply voltage is applied to the device, the counter 25 is zeroed and the switching element 1.1 is pressed, with which the counter 3 and the indication unit 8 are zeroed and the trigger 22 is set to one. At the same time, the code of the zero address of the string is formed on the group of address inputs of block 8 from the outputs of counter 3. From the outputs of the distributor 9 pulses, the codes of the lower address bits are formed continuously, which in time represent the periodic sequence of pulses necessary for the sweep (display) of characters in the row of block 8. With this pulse sequence supplied to the group of address inputs of the converter 10, its outputs to the information inputs of block 8 are read sequentially in time the character codes displayed on the screen of block 8. As a result, the names of e commands intended for input into the external memory, and

its meaning is in accordance with the list of commands of the microprocessor device, for example, K580 (KR580) series. A command may contain, for example, seven

characters with a space and an equal sign (this takes eight familiarity), and the rest of the 16 familiarities in the line are reserved for semantic content.

If you need to enter another command, rather than the one displayed on the screen of block 8, element 1.2 is switched, with which a pulse is formed through the driver 2.1 to the summing input of the counter 3. Counter 3 goes into the next state, the code of which goes to the address inputs of the high bits of block 8 and to the group of address inputs of converters 10 and 12. Now the next line of block 8 displays the other command. If it is necessary to return to the previous command (line), element 1.3 is switched, from the output of which through the driver 2.2 a signal is generated to the subtracting input of counter 3.

5If the name of the command displayed

on the screen of block 8, it satisfies the user, but in this command it is necessary to change the type (number) of the register or register pair, in this case the element 1.4 is switched.

0 In this case, the summing input of the counter 4, which is in an arbitrary state, is supplied with the help of shaper 2.3 t-t, under the action of which the counter 4 passes into the next state.

5C, the outputs of counter 4 per group of address inputs of converters 10 and 12, an appropriate code is generated. As a result, the command on the screen of block B shows the command in the same place (line) with the new

0 name (number) of the register or register pair. The switching of the element 1.5 with the help of the driver 2.4 makes it possible to form a signal to the subtracting input of the counter 4, under the action of which it transfers to the previous state, i.e. it can be returned to the previous register number or register pair.

In the case of matching the team name and its content required for

The microprocessor device program 0 is switched element 1.6. In this case, using the imager 2.5, a recording mode signal is generated at the first output of the device, which can be used

5 (if necessary) by an external memory device during data input (recording) into it. Using the pulse distributor 9 and the And 7 element, pulses for writing the command code (data) are generated at the second output of the device.

The address code of the memory cell for the command is already generated from the outputs of the counter 25 to the outputs of the device, the command code is generated from the outputs of the converter 12 through the switch 21 to the outputs of the device. If necessary, the counter 25 can be set to the desired state by the signals generated at its input.

On a “chad”, it is the front of the signal coming in FL «V. the generator 2.5, through the element NOT 24 hours, the summing input of the counter 25, after /:, switches to the next state and gives the code of the next address in the order. The first input of the device allows returning to the previous address. When selecting and entering the next required command, the procedure described above is repeated.

If you enter a command from another functional group, for example, a group of arithmetic commands or cyclic, or branching, etc., then the corresponding group is selected by switching the elements 1.7 or 1.8. In this case, with the help of drivers 2.6, 2.7 and reversible counter 11, the state of which was arbitrary, the state code of the latter arrives at the group of address inputs of converters 10 and 12. From the outputs of converter 10 to information inputs of block 8, character codes are displayed commands, and from the outputs of converter 12 through the switch 21 to the outputs of the device, the code of the selected command is generated. Further, the procedure for writing the code of this command to an external device is repeated as described above,

When writing a microprocessor control program (or controller), it is necessary to enter not only commands (operation codes), but also the command address, arbitrary data byte or constant, which can be preset in the memory of the converters, but this will require, firstly, increasing memory volume, and secondly, will reduce the speed of data access to the external device. In this case, such data is promptly entered as follows.

On the keypad 20, the reset key of the trigger 15 to the zero state is first pressed, and then the keys are alternately pressed, each of which means a hexadecimal code character (symbol). In this case, a signal arrives at the inputs of the encoder 19, and a parallel code of the corresponding hexadecimal character is generated from its outputs. This code goes to the information inputs of the p-; isp 17, 18. At the moment when the keyboard 20 key is pressed, the signal goes through the OR element 23 to the setup input zero of the trigger 22 and to the input of the one-shot 16. The trigger 22 switches to the zero state, and the outputs to the control inputs switch signals, under the action of which the switch 21 prohibits the passage of data to the output of the device from the outputs of the converter 12 and allows the passage of data from the outputs of registers 17, 18.

One-shot 16 to protect against the chatter of the signals emitted by the keyboard 20, forms on. their outputs in antiphase delayed signals. One signal from the direct output goes to the inputs of elements And 13, 14, and the other from the inverse output goes to the synchronization input of trigger 15, which switches to one state by opening one of the elements 14 and closing the other element 13.

When the key is pressed for the first time, the hexadecimal code generated from the outputs of the encoder 19 is recorded in re, histor 17 using a signal generated from the direct output of the one-vibrator 16 through the element 13, and at the second press in the second register 18. In the event of an erroneous Keystrokes trigger 15 is set to zero by a reset signal issued from the keypad 20 when the reset key is pressed, after which the necessary keys are pressed again.

Then element 1.6 is switched again. Using the generator 2.5, the distributor 9 and the element And 7, signals are written to the first and second outputs of the device for recording (input) the data stored at this time in registers 17, 18 through the switch 21 to an external device at the address generated by the counter 25.

On the falling edge of the signal generated from the output of the generator 2.5, through the element NOT 24, the counter 25 switches to the next state, and the trigger 22 switches to the logical 1 state and again enables the switch 21 to pass data to the device outputs from the outputs of the converter 12, after which the procedure for entering commands and constants may continue again.

Claims (1)

Claims An information input device containing switching elements, five signal conditioners, first and second reversible counters, first and second code converters, first display unit, encoder, comparison unit, pulse distributor, first AND element, OR element, with the output of the first switching element connected to the inputs. Resetting the first reversible counter and the first indication unit, the outputs of the second and third switching elements are connected through the first and second signal conditioners with direct and reverse counting inputs of the first reversible counter, respectively, the outputs of which are connected to the inputs of the first groups of the first display unit, the first and the second About code converters, the outputs of the fourth and fifth switching elements are connected via the third and fourth signal conditioners to the forward and reverse counting inputs of the second reversible counter, whose outputs are connected to the inputs of the second group of the second code converter, the output of the sixth switching element is connected to the input of the fifth shaper the signals whose output is the first control output of the device, the outputs of the second code converter are connected to the inputs of the second group of the first display unit, The outputs of the first code converter are connected to the inputs of the first group of the comparison unit, the outputs of the second reversible counter are connected to the inputs of the second group of the comparison unit whose output is connected to the input. Resetting the second reversible counter, the first input of the first element I is connected to the output of the fifth signal conditioner, and the output is the second control output of the device, the outputs of the group of outputs of the pulse distributor are connected respectively to the control input and inputs of the third group of the first display unit and the third a group of inputs of the second code converter, one of the outputs of the pulse distributor is connected to the second input of the first element AND, characterized in that, in order to expand the field of application due to the possibility of ordered data input, the third and fourth reversible counters are introduced into it, the sixth and seventh drivers signals, the second and third And elements, the first and second triggers, the one-vibration device, the third code converter, the first and second registers, the keyboard, the switch, the NOT element, the decoder unit, and the second display unit and, with the inputs of the sixth and seventh signal conditioners connected to the outputs, respectively the seventh and eighth switching o / ie cops, and the outputs of the sixth and seventh signal conditioners are connected to the inputs of the forward and reverse counting of the third a reversible counter whose outputs are connected to the inputs of the fourth group of the second code converter, the inputs of the first group of the third code converter are connected to the outputs of the first reversible counter, the second group to the outputs of the second reversible counter, and the third group to the outputs of the third reversible counter, the inverse output of the first the trigger is connected to the first input of the second element I and its information input, and the direct output is connected to the first input of the third element I, the second inputs of the second and third elements And soi dinene with one-shot direct output, inverse output which is connected to the sync input of the first trigger, and the one-shot input is connected to the output of the OR element, whose inputs are connected to the inputs of the encoder and the keyboard output group, the output of which connected to the reset input of the first trigger, the encoder outputs are connected to the information inputs of the first and second registers, the synchronization inputs of which are connected to the outputs of the second and third elements, respectively, the second trigger input is connected to the logical 1 bus, its synchronization input is connected to the output of the HE element, the input setting the unit under, is yuchen to the output of the first switching element, the input of setting zero is connected to the output of the OR element, and the direct and inverse outputs of the second trigger are connected respectively to the first y and the second control inputs of the switch, the first group of information inputs of which is connected to the outputs of the third converter of codes, the second group is connected to the outputs of the first and second registers, the input of the direct estimate of the fourth the reversible counter is connected to the output of the NOT element, whose input is connected to the output of the fifth signal conditioner, the counting input of the fourth reversible counter is the first device, the control input is the second input of the device, the information inputs are a group of device inputs, the outputs of the fourth reversible counter are connected the decoder unit to the second isolation unit is the address outputs of the device, and the switch outputs are the information outputs of the device.