SU1462281A1 - Function generator - Google Patents

Abstract

The invention relates to computing and can be used in computing complexes, automation devices and computing equipment, devices and systems for the formation and processing of information. The purpose of the invention is to expand the scope of application due to the possibility of the space-time replication of a given function. The function generator contains a group of buffer registers, address register, address counter, group of counters, pulse generator, start trigger,. function memory block, function register, group of elements AND, group of communicators, block of elements AND, register of flags. The essence of the invention is the on-line copying (replication) of the formed signal and the use of its copies to form similar signals. 1 pe. 5 С /) С

Description

 one .

The invention relates to computing and can be used in computing complexes, automation and computing devices, devices and systems for the formation and processing of information.

The purpose of the invention is the expansion of the field of application due to the possibility of carrying out the space-time replication of a given function.

The drawing shows the block diagram of the generator of functions. H

The function generator contains the function memory block 1, the group of buffer registers 2, the address register 3, the address counter 4, the function register 5, the start 6 trigger, the pulse generator 7, the flag register 8, the AND 9 element group, the IQ counter group, the switch group 11 , block Ijpynn elements And 12, the outputs 13 of the function generator, the input 14 of the function number, the input 15 start, the input 16 control.

The function generator works as follows.

The function code from the input 14 of the generator is entered in the register 3 addresses. The start of operation is determined by a signal (pulse) fed to the input 15 of the device. According to this impulse, the trigger 6 starts to a single state and thereby permits the passage of impulses from the generator outputs 7.

The first pulse arrives at the readout input of the block I of the function memory and selects from it

4 Code N9 IN9

00

ten

15

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information on the address recorded in the 3 address register and the 4 address counter. The latter together form the address to which it is necessary to extract information from block I.

On the second clock impulse selected from block 1, the information is entered into register 5. This impulse from the generator output 7 clock pulses goes to the synchronizing Echoes of the buffer registers 2 groups (Fig. 2). Information from the output of the block is entered into the register 5. In addition, 1 pulse from the output of the generator 7 sends 1 to the counter 4 input to the ad- and forms the same address of the first reference of the function stored 4 block 1. i 5 functions in conjunction with

A GROUP of buffer registers 2 form a stack that is filled with the output information of the function being formed. Therefore, to track the depth of the stack (determining the 25 itHCTpa that contains the initial information), as the information is displayed, the contents of the group of counters will increase. Since in each of the channels it is possible to issue information from a specific time point, the stack depth for each 1 channel is monitored by the corresponding c | meter. Output code from register 5 Receives the output of the generator.

The next impulse from the generator 7 impulse goes to the synchronizing input of unit 1 and selects information from It. The following Nipulse from the output of the generator 7 increases by one the contents of the counter 4 addresses, as well as the contents of the group of counters 10. This same pulse P1 enters the synchronization input of the buffer group: registers 2. This thereby overwrites the information from the output of register 5 sequentially into registers 2 groups. Further, the device operates in the same way.

If it is necessary to issue the function 3 channel or simultaneously, the corresponding trigger of control register 8 is simultaneously transferred to a single state into several channels. The signal 1 from the unit output of the register trigger 8 flags is fed to the input of the corresponding group of elements of block 12. Information from registers 2

thirty

35

40

45

50

gg

0

five

0

five

0

five

0

five

0

the group through the corresponding input of the switch 11 of the group is fed to the input of the corresponding group of the block of elements And 12 and from their outputs, as the function codes are formed, to the corresponding output of the device.

Claims (1)

Invention Formula The function generator containing the address register, address counter, buffer register group, start trigger, pulse generator and counter group, the generator start input is connected to the installation input of the start trigger unit, the direct output of which is connected to the pulse generator start input, clock output pulses of which are connected to the synchronization inputs of the buffer registers of the group and the counting input of the address counter, the input of setting the number of the generator function is connected to the information input of the address register, characterized in that in order to expand the scope of application due to the possibility of spatio-temporal replication of a given Function, a flag register, a group of elements AND, a group of switches, a block of elements AND, a memory block of functions and a register of functions are entered into it, and function is connected to the output of the address register, the output of the address counter is connected to the input of the group of lower bits of the function memory, the output of which is connected to the information input of the function register, the output of which is connected to the output of generator channel and information input of the first buffer register of the group, output of the t-th buffer register of the group, m 1, 2 ,, .. М-1, where M is the number of channels for replicating the function of the generator, connected to the information input m + 1-ro the buffer register of the group and the m-th information input of each switch of the group, the output of the M-th buffer register of the group is connected to the M-information input of each switch of the group, the output control function The generator channels are connected to the setting of the flag register's regular input, the direct outputs of which bits are connected to the first. inputs of the elements AND of the corresponding groups of the block, the second inputs of the elements of the groups of which connected to the outputs of the bits of the corresponding switches of the group, the control inputs of which are connected to the outputs of the respective counters of the group, the counting inputs of which are connected to the outputs of the corresponding elements AND groups, the first inputs of which are connected to the inverse of the codes of the corresponding bits of the register of flags with the output of the clock pulses of the pulse generator, in the synchronization house of the function register and the synchronization inputs of the buffer registers of the group, the output of clock pulses with a time shift of the pulse generator is connected to the read input of the function memory block, the synchronization input of the address register is connected to the write input of the function number, the outputs of the And groups of the block are connected to the outputs generator channels.