SU1525909A1 - Recounting circuit - Google Patents

Abstract

The invention relates to a pulse technique and can be used in the construction of frequency dividers. The purpose of the invention is to increase speed. In a scaling circuit consisting of counting triggers, each of which contains a main 2 - 1 and auxiliary 2 - 2 triggers performed on two AND-OR-NOT 3 - 6 elements, counting input 7 of a scaling circuit is connected to the inputs of the second groups AND elements AND-OR-NOT 3 - 6 of all counting triggers, which allows to achieve independence of the installation time of the code from the current code combination in the scaling circuit. 2 Il.

Description

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And: i1b to; the line refers to: pulse technology and can be used in the construction of frequency dividers.

The purpose of the invention is to increase the speed of travel.

FIG. 1 shows the flowchart of the scaling circuit ;; in fig. 2 - diagram lmemeen, fuikddyunirovanie schema.

The scaling circuit contains counting triggers 1-1, 1-2, and 1-3, each of which holds a military 2-1 and auxiliary1 n1,1 2-2 triggers, pygyul) 1e1n1e on two elements AND-I.SH1- NOT 3-6. The output element is H-HJIlt-HF. 3 (i) of the main trigger 2-1 is connected to the first inputs of ncjiBoft and the second group AND element U-JL Dt-HI: / ((3) of the same trigger and second group AND element H-IUIH-HE 6 (5) auxiliary Trigger 2-2 and float by the inverse (direct) output of the main trigger 2-1.

(ui; element 5 (6) of auxiliary trigger 2-2 is connected to the first (, 1m input of the first group II of the element M-OR-NK 6 (5) of the same trigger and the second input of the first group AND of the element M-UJDI-IIK 3 ( 0 of the main trigger 2-1 and is the inverse (irm) output of the trigger 2-2. In all counting triggers, except for the first one, the first trigger of the third group AND of the I-1 elements: P1-11G, 3 and 4 trigger 2- 1 is connected with, with the outputs of the elements il-IL Df-llE 4 and 3 of the same mp 1gger, the motions of these groups are with inverse-H.1M output and the 1st trigger 2-2 11rsc, the 1st counting trigger, and the third waste the second one is called Oe: the power of K-HJUi-HK 5 and 6 - with the direct output of the main trigger 2-1 of the one of the trigger 1.

In all counting triggers, except for the first and second, the fourth entry is W (groups AND elements H-IUIH-HE 5 and 6 of the auxiliary trigger 2-2 co (din1 with the second inputs of the third groups AND elements H-IUQ1-IIE 3 and 4 The main trigger 2-1. Input 7 is the counting 1m input of the scaling circuit and is connected to the second gate No. 1 watt (the second groups AND 1 ton AND-OR-NOT 3-6 and each count 1 th Trg go. Input 8 is the input Initially installed and connected to the first input # 1 of the third groups AND elements AND-I.SH-11E 5.

Periscetism scheme works with: e, iim processing.

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Suppose that in the outcome of the 1st state and in all the fundamentals}, x triggers are written O and in all lumogulatory 1, i.e. at the output of elements 3 and 6, there is a value of 1, and at the output of elements 4 and 5, o. Let also O. Fu be installed on the counting input 7 of the reference circuit and the start of the first 8 (the conversion circuit containing three counting triggers from this initial state is illustrated by the time diagram (Fig. 2).

From the time diagram, it follows that in the first counting trigger with a logical value} 1i on the counting input 7, a copy of the information from the auxiliary trigger in the main one occurs, resulting in the composition of these triggers becoming opposite, and with a single logical value the counting input 7 on the first counting trigger of information y1 from the main trigger is rewritten into an auxiliary one, as a result of which the states of the triggers become the same.

A change in the state of the main triggers in all counting triggers can occur only if there is a zero logical value ia account (th input 7 (if there is a single value at input 7 of the base H, i.e. the triggers are in the phase of information storage). The rewrite of the information from the auxiliary trigger in the main but all counting triggers, except the first one, occurs only when a zero value appears on the 1-output output of the auxiliary trigger of the previous trigger.

A change in the state of auxiliary triggers in all counting triggers can occur only if there is a single logical value at counting input 7 (if there is a well; the second value at input 7 is that the auxiliary triggers are in the storage phase) and information. In this case, the information from the main trigger to the auxiliary in all counting triggers, except the first and second, is copied only when a single value appears at the direct output of the main and inverse output / i.e., the auxiliary trigger of the other counting trigger (for

the omission of the E11format into the auxiliary trigger of the second counting trigger is sufficient to give a single logical value at the direct output of the main trigger of the first counting trigger).

To set the scaling circuit to the initial state on its counting

the trigger is connected to the first input of the first group AND of the second (first) element I-11SH1-NOT auxiliary trigger and the second input of the first group AND of the first (second) element AND-OR-NOT main trigger and is the inverse (forward) output of this trigger, in the first counting trig

input 7 is set to zero logic; here second inputs of the second groups AND

the cic level, and at the input 8 of the initial installation - a single logic level. In this case, at the outputs of the AND-OR-NOT elements of all 5 countable triggers, zero logical values appear, and at the outputs of the AND-OR-NOT elements 6 - single ones. Zero values at the counting input A, at the outputs of the AND-OR-NOT 5 elements cause the setting of a single value at the output of the AND-OR-NOT elements 3 of all the counting flip-flops, which, in turn, results in O at the outputs of the AND-OR elements - NOT 4 and completes the setup initial state.

In the proposed recalculation scheme, the installation time of the code does not depend on the number of counting triggers and is Ao, where is the delay of the AND-S1I-NO element.

Claims (1)

Invention Formula A scaling circuit containing counting triggers, each of which contains the main and auxiliary triggers performed on two I-ShZH-NE elements, the output of the first (second) I-SHSh-HE element of the main trigger is connected to the first inputs of the first and second I second groups ( the first) element AND-OR-NOT main trigger and the second group AND the second (first) element AND-OR-NOT auxiliary trigger and is the inverse (direct) output of this trigger, the output of the first (second) element AND-OR-NC auxiliary five 0 The first and second elements I-11PI-PE of the main and auxiliary triggers are connected to the counting input of the counting circuit, in all counting triggers except the first, the second inputs of the second AND AND-AND-AND-NE groups of the main (auxiliary) triggers are combined, and the third inputs of the second Groups and elements of the I-I1SH-NOT auxiliary triggers are connected to the RIGHT 1LM output of the main trigger of the previous counting trigger, so that, with the purpose of increasing the speed of the first, the element of the AND-OR-NO main triggers of all counting triggers, cr Ome first, contain an additional group And, the first input of which in the first (second) element AND-OR-NOT main trigger is connected to the output of the second (first) element AND-OR-NOT of the same trigger, and the second inputs in all counting triggers, except the first, with the inverse output of the auxiliary trigger of the previous counting trigger, in all counting triggers except the first and second, the second group AND of the I-SHSh-NOT auxiliary trigger contains an additional input that is connected to the second input of the additional group I of the first cient AND-OR-NO element of the main trigger counting trigger, the second inputs of the second group of AND-OR-NO auxiliary and main flops connected in all countable trigterah with counting input of scaling circuit. 0 five five FIG. 2