JPS5725744A - Interleaving circuit - Google Patents

Interleaving circuit

Info

Publication number
JPS5725744A
JPS5725744A JP10085480A JP10085480A JPS5725744A JP S5725744 A JPS5725744 A JP S5725744A JP 10085480 A JP10085480 A JP 10085480A JP 10085480 A JP10085480 A JP 10085480A JP S5725744 A JPS5725744 A JP S5725744A
Authority
JP
Japan
Prior art keywords
selectors
terminal
mode
pieces
logic level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10085480A
Other languages
Japanese (ja)
Other versions
JPS6126854B2 (en
Inventor
Moriyuki Yamamoto
Kenji Ogami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10085480A priority Critical patent/JPS5725744A/en
Publication of JPS5725744A publication Critical patent/JPS5725744A/en
Publication of JPS6126854B2 publication Critical patent/JPS6126854B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques

Abstract

PURPOSE:To constitute an interleaving circuit with N pieces of flip-flops to N digits, by using N-1 pieces of selectors plus two dividers. CONSTITUTION:N-1 pieces of selectors 60a-60h plus dividers 90 and 100 are used to N-1 units of flip-flops 70a-70i. When a logic level ''0'' is applied to a control terminal SEL of these selectors, the signal at the side of the input terminal A of the selectors is delvered to an output terminal X. When a logic level ''1'' is applied to the SEL, the signal at the side of the input terminal B of the selectors is delivered to the terminal X. When an output signal line 1,000 of the divider 100 is at logic ''0'', the side of terminal A of the selectors is selected. Then FF70a-FF70i forms a shift register in which a connection is carried out in the order of 70a-70b-70c-70d- 70e-70f-70g-70h-70i (mode A). When the line 1,000 is at logic level ''1'', the side of terminal B of the selectors is selected. Then FF70a-70i forms a shift register in which a connection is given in the order of 70a-70d-70g-70b-70e-70c-70f-70i (mode B). When the time series (1, 2, 3, 4, 5, 6, 7, 8, 9) written in the mode A is read in the mode B, the time series is converted into the one (1, 4, 7, 2, 5, 8, 3, 6, 9).
JP10085480A 1980-07-23 1980-07-23 Interleaving circuit Granted JPS5725744A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10085480A JPS5725744A (en) 1980-07-23 1980-07-23 Interleaving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10085480A JPS5725744A (en) 1980-07-23 1980-07-23 Interleaving circuit

Publications (2)

Publication Number Publication Date
JPS5725744A true JPS5725744A (en) 1982-02-10
JPS6126854B2 JPS6126854B2 (en) 1986-06-23

Family

ID=14284890

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10085480A Granted JPS5725744A (en) 1980-07-23 1980-07-23 Interleaving circuit

Country Status (1)

Country Link
JP (1) JPS5725744A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5917360U (en) * 1982-07-24 1984-02-02 日本精工株式会社 ball screw

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0161350U (en) * 1987-10-12 1989-04-19

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5917360U (en) * 1982-07-24 1984-02-02 日本精工株式会社 ball screw

Also Published As

Publication number Publication date
JPS6126854B2 (en) 1986-06-23

Similar Documents

Publication Publication Date Title
JPS5725744A (en) Interleaving circuit
JPS5725745A (en) Interleaving circuit
JPS5698030A (en) Odd dividing circuit
JPS52147052A (en) Analogue input signal switching unit
JPS5351936A (en) High speed addition circuit
JPS56108130A (en) Switch circuit
GB1528954A (en) Digital attenuator
JPS5548898A (en) Composite latch circuit
JPS5455141A (en) Diagnosing shift circuit
JPS57118425A (en) Digital pattern generating circuit
JPS5690658A (en) Compression system for japanese character data
JPS6432722A (en) Parallel/serial converting circuit
JPS5629892A (en) Clear control circuit
JPS6472230A (en) Bit inverter
JPS54122944A (en) Logic circuit
JPS5693434A (en) Counter
JPS5450231A (en) Encode circuit for contactless switch
JPS6486271A (en) Accumulator
JPS5391653A (en) Circuit of decision by majority
JPS57109090A (en) Read data check device
JPS5512570A (en) Control system for memory element
JPS5511624A (en) Holding device of multiple selection signal
JPS5562373A (en) Logic circuit test unit
JPS55129841A (en) Check circuit for input signal number
JPS57157656A (en) Descrambler synchronizing circuit