SU1443004A1 - Analog-digital data capture device - Google Patents

Abstract

The invention relates to hardware, analog-to-digital transformations, and can be used to quantize the analog signal quantization. The aim of the invention is to increase the reliability of the device. From this center, hardware is installed in a device containing an analog-to-digital converter with a multiplexer at the input, a memory unit, a bus driver and a control unit, allowing to compare the measurement result of the voltage of a reference source connected to one of the information multiplexer inputs , with a reference number previously recorded in the corresponding device register. According to the result of the comparison, a signal is generated which can be used as an indication of the operability of the device. 1 il. F

Description

The invention relates to measuring and computing techniques and can be used in measuring systems for collecting and preprocessing the results of measurements of object parameters taken from sensors.

The purpose of the invention is improving the reliability of the device,

The drawing shows a diagram of an analog-digital information collection device.

The device contains a multiplexer 1, an analog-to-digital converter (ADC) 2, memory block 3, bus driver 4, control block 5., the first 6 and second 7 registers, block 8 EXCLUSIVE OR, element OR 9.0-flip-flop 10, an input address bus II, a bidirectional control layer 2, a bidirectional data bus 3.

The device works as follows

Inputs D, - DH, multiplexer i are connected to sources of measured voltages, and input Djj is connected to a voltage source. In the normal measurement cycle of the input voltage, the recording signal on bus 12 of control from bus 1 of address is entered into block 5 of control and stored the address (number) of one of the channels D (- D ,,, then, under the control of the control unit 5, the multiplexer 1 connects the selected input of the multiplexer to the information input of the A / D converter 2, which produces

analog-to-digital conversion input

new voltage. Then the data with his

the information output is recorded in memory block 3. Information stored in block 3 can then be read from memory block 3 by the read signal on control bus 12 and the address received at address 11, and then through bus driver 4 issued to data bus 13 .

The control cycle is performed in the same way as usual, except that the bus address address must necessarily be supplied to the channel address, and the measurement result of the reference voltage is stored in the first register 6. In the second register 7 there must be a pre-recorded number equal to the true value of the ps :;: /

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Tata Measurement Reference Voltage. The contents of the first register are compared with the contents of the second register with the help of block 8 elements TRIGGER 1TSE OR and element IPI 9. If the output of the element OR 9 does not match, logic level 1 appears. Under control of control unit 5, the output signal of this element is stored is sent to the control bus I2 on (. a sign of device malfunction. The numbers are written to the second register 7 at the corresponding address on the address bus I1 and the write signal on the control bus 12. The control unit 5 is Pipeline information recording signal to the second register 7, wherein the information on bus 3 the data is recorded in the register,

By using hardware to compare the reference code and the measurement result of the reference voltage, the reliability of the device is improved without the additional time spent on the processor of the automated system that uses the device to programmatically control its correct operation.

Formula And goiter shadows

An analog-digital data acquisition device comprising a multiplexer, an analog-digital converter, a memory unit, a bus driver and a control unit, the information inputs of the multiplexer being the same-name device inputs, the output of the multiplexer is connected to the information input of the analog-digital converter whose information output is connected with the information input of the memory unit, the output of which is connected to the information input of the bus driver, the output of which is connected with the input-output data The first input, the control unit is the input of the device address, the second input of the control unit is the synchronization input of the device, the third input of the control unit is connected to the output of the readiness sign of the analog-digital converter, the first output of the control unit is connected to the control input of the multiplexer

the second and third outputs of the control unit are connected to the input gate of the analog-digital converter and the address input of the memory unit, respectively; the fourth and fifth outputs of the control unit are connected to the write input and the read input of the memory unit, respectively; the sixth output of the control unit is connected to the input gate driver, characterized in that, in order to increase the reliability of the device, it contains the first and second registers, the comparison unit and the B-trigger, with the information input of the first register connected to information code of the analog-digital converter, - the first and second synchronization inputs of the first register are connected

with the seventh and eighth outputs of the control unit, the information input of the second register is connected to the input-output data of the device, the first and second synchronization inputs of the second register are connected to the nine and tenth outputs of the control unit, the first and second information inputs of the comparison unit are connected to the outputs the first and second registers, respectively, the information input of the D-flip-flop is connected to the output of the equality sign of the comparator unit, the synchronization input and the reset input of the D-flip-flop are connected to the eleventh and twelfth outputs By the control unit, respectively, the output of the D-flip-flop is connected to the output of the device operability indication.

Claims (1)

Formula of Invention An analog-to-digital information collection device comprising a multiplexer, an analog-to-digital converter, a memory unit, a bus driver and a control unit, wherein the information inputs of the multiplexer are the device inputs of the same name, the output of the multiplexer is connected to the information input of an analog-digital converter, the information output of which connected to the information input of the memory unit, the output of which is connected to the information input of the bus driver, the output of which is connected to with the device data output, the first input of the control unit is the input of the device address, the second input of the control unit is the synchronization input of the device, the third input of the control unit is connected to the output of the analog-to-digital converter readiness sign, the first output of the control unit is connected to the control input of the multiplexer, the second and third outputs of the unit controls are connected to the gating input of the analog-to-digital converter and the address input of the memory unit $, respectively, the fourth and fifth outputs of the control unit The connections are connected to the write input and the read input of the memory unit, respectively, the sixth output of the control unit is connected to the input, θ of the gate of the bus driver, characterized in that, in order to increase the reliability of the device, it contains the first and second registers, the comparison unit and the D-trigger, f5 wherein the information input of the first register is connected to the information output of the analog-to-digital converter, the first and second synchronization inputs of the first register are connected 20 to the seventh and eighth outputs of the control unit, the information input the second register is connected to the input-output-> data output of the device, the first and second synchronization inputs of the second register are connected to the ninth and tenth. outputs of the control unit, the first and second information inputs of the comparison unit are connected to the outputs of the first and second registers, respectively, the information input D- the trigger is connected to the output of the sign of equality of the comparison unit, the synchronization input and the reset input of the D-trigger are connected to the eleventh and twelfth outputs of the control unit, respectively, the output of the D-trigger is connected to the output device performance characteristic.