SU1305691A2 - Multichannel information input device - Google Patents

Abstract

The invention relates to computing, can be used as a device for selecting information channels in multi-channel systems for collecting, recording and processing measurement information. The purpose of the invention is to expand the functionality of the device. The storage unit 6 of the device contains addresses for the addresses uniquely corresponding to the address characteristics of the measuring channels, which have three fields, namely, a field for specifying the expansion for setting the sampling conditions, a field for specifying the permission to reset the conditions, and a field for specifying the signs sampling data measuring channels for processing when the appropriate conditions. In addition, each control word has an additional bit of the compare mode applied to the trigger 20. A single bit value indicates that the analysis of the logical conditions for sampling the data of the measuring channel uses the S operator (L = C SP 05 CO N)

Description

of logical addition on the elements of the second group 10. The zero value of the bit of the comparison mode indicates that when analyzing the logical conditions

The invention relates to computing, can be used as a device for selecting information channels in multichannel systems for collecting, recording and processing measurement information and is additional to the author. St. No. 1196882.

The aim of the invention is to expand the functionality of the device.

FIG. 1 shows a functional diagram of the device; in fig. 2 is a functional block diagram of the memory.

The device contains an input register 1, information input 2 of the device, input 3 clock pulses of the device, output register 4, information output 5 of the device, block 6 of memory, input 7 signs of channel sampling, input 8 clock pulses of the device, groups 9 and 10 of the And elements, register 11 states, condition register 12, synchronization unit 13, OR 14 element, AND element 15, device information readiness indication output 16, initial installation input 17, device channel sampling condition input 18, comparison circuit 19, trigger 20, And 21 element 22 mode input device comparison, delay elements 23-25.

Memory unit 6 contains AND element 26, trigger 27, memory block 28, switch 29, address register 30 And element 31.

In block 6, the address words that unambiguously correspond to the address characteristics of the measuring channels contain control words that have three fields, namely: a field for specifying permission for setting conditions, a field for specifying permission for resetting conditions, and a field for specifying signs of a sample of measurement data channels for processing when performing the corresponding sampling of data of the measuring channel, a logical multiplication operation is used on the comparison block 19. 2 sludge.

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conditions. In addition, each control word has an extra bit of comparison mode.

The status register characterizes 5 the current state of the sampling process, its size, like the condition register size, is equal to the number of sample conditions, and the value of each state register bit determines whether the conditions are met at the current time.

The device works as follows.

Before starting operation, the state register 11 and the counting trigger 27 of block 6 are set to zero state by a signal at the input 17 of the initial installation.

The device has two modes of operation: the mode of initial loading of the memory block and the mode of sampling the data of the measuring channels for processing.

In the initial loading mode of block 6, control words are recorded at all addresses of the memory block 28.

The control word written to the K-th address of memory block 28 contains units in the field resolution bits for the installation, the corresponding register bits 11, which must be set when the K-th measurement channel arrives. Similarly, the control word written to the Kth address contains units in the reset permission field bits, corresponding to the register 11 bits, which must be reset when the Kth data from the Q channel arrives. The control word contains units in those bits of the field of sample features that define the conditions under which, when the data of the K-th measuring channel are received, the latter are output to

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processing. The control word contains a unit in the compare mode bit if the logical addition operation is used to analyze the logical input conditions, and the node if the logical multiply operation is used to analyze the logical input conditions.

The initial loading of block 6 is performed as follows.

The inputs 7, 18 and 22 in the accompanying signal at the input 8 receive the address codes of the unit 28 and the codes of the control words recorded at these addresses. The codes of addresses and control words alternate between each other. Thus, the first and all subsequent odd parcels at inputs 7, 18 and 22 are address codes, and the second and all subsequent even parcels are control code codes. The first and all subsequent odd pulses input to input 8, the passage through the open element 31, write the address of the control word from inputs 7, 18 and 22 to the address registers 30 and the back edge modify (change to the opposite) the state of the counting trigger 27. The second and all subsequent even-numbered accompaniment pulses at input 8, passage through the open element I 26, write the control word code from inputs 7, 18 and 22 to block 28 at the address stored in address register 30, and the rising edge modify the state of the counting trigger 27. The output signals of the address register 30 are connected to the address inputs of the unit 28 via the switch 29 when the counting trigger unit is in the unit state 27. When the loading of the block 6 is completed, the device is ready for operation in the mode of sampling the measurement channels for processing.

In the data sampling mode, the meter

channels for processing the device operates as follows.

With the arrival of the information parcel at input 2, accompanied by a pulse at input 3, on the leading edge of the tracking pulse, data from input 2 is written into input register 1. At the end of the recording, the address part of the message goes to the first inputs of the memory unit 6 and through the switch 29 to the address inputs of the 28 The low signal level at input 8 sets the read mode for block 28. The data from block 28 is read at the address; it uniquely corresponds to 5 p 5 o g 0

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address part of the message. The strobe signal on the input of the delay element 25, the contents of the cell block 28 through the elements 9 of the first group directly modifies the contents of the condition register | 11 and the register of 12 CONDITIONS, as well as the trigger 20. The delay of the signal on the delay element 24 must be greater than the sum of for writing data to input register 1 and reading data from block 28. The outputs of the same bits of the state register 11 and the condition register 12 are connected to the inputs of the elements of the same name And 10 and the second group. If there is a match on one of the elements And 10 with a single state of flip-flop 20 or if the codes on the first and second inputs of the comparison circuit 19 are equal at the zero state of flip-flop 20 through an And 21 element at the output of the OR 14 element and, therefore, on the first input Element And 15 appears to be a HIGH level signal. The gate signal at the output of the element 25 through the element 15 provides a census of information from the input register 1 into the output register 4.

At the end of the census, at the output of delay element 23, a signal appears indicating that it is necessary to enter data into the processing system. In the absence of a match on elements AND 10 of the second group or equality at the output of the comparison circuit 19, the data of the measuring channel are not provided for processing.

The signal delay on delay element 25 must be greater than the sum of the signal delay on a gold element OR 14, elements AND 10 of the second group (comparison circuit 19) and information recording time in the register of 1 1 state (condition register 12). The signal delay on delay element 23 must be greater than the time it takes to write data to register 4. The signal at output 16 is the pulse of data availability at output 5 of the device.

The technical and economic advantages of the proposed multi-channel information input device consist in its wider functional capabilities, which makes it possible to significantly increase the efficiency of information acquisition, recording and processing systems of multichannel measuring systems COB using the proposed device.

Claims (1)

Invention Formula The multichannel device for input of information on an auth.St. No. 1t96882, characterized in that, with In order to expand the functionality of the device, a comparison block, a trigger and a second element I are entered, the inputs of which are connected respectively to the output of the comparison block and the inverse output of the trigger, the output of the second element I is connected to 13056916 the auxiliary input of the OR element, the first and the second groups of inputs of the comparison unit are connected to the outputs of the state register and the condition register, respectively; the forward trigger output is connected to the third inputs of the AND elements of the second group; the trigger synchronization input is connected to the sync block fO trigger input is connected to the auxiliary (ZM + 1) output of the information output of the storage unit, the additional information input of which is connected to the mode input 15 device comparisons. Editor G, Gerber Compiled by I. Karnova Tehred A. Kravchuk Proofreader I. Muska Order 1453/47 Circulation 673 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Design,