SU1330739A1 - Pulse synchronizer - Google Patents

Abstract

The invention contributes to the expansion of the functionality of the pulse synchronizer. The device contains triggers 1-4, elements AND 5-7 and inverter 10. The introduction of differentiating circuits 8 and 9 allows to combine and separate asynchronous and synchronous streams of input pulses. 2 Il. co

Description

The invention relates to a pulse technique and can be used in automation and computing devices.

The purpose of the invention is the expansion of functional capabilities by combining and separating asynchronous and synchronous streams of input pulses.

ila FIG. 1 shows the electrical functional scheme of the device; in fig. 2 - time diagrams that show his work.

Pulse synchronizer contains the first - fourth triggers 1-4, the first, second and third elements And 5.6 and 7, the first and second differentiating circuits 8 and 9, the inverter 10, and the reset of the first trigger 1 is connected to the output of the first element And 5, etc. my output is with the start input of the second trigger 2, the direct output of which is connected to the first input of the second element 6, the reset input — From the start input of the third trigger 3 and to the first output of the first differentiating circuit 8, whose input through the inverter 10 is connected to the first input bus 11, with the second entrance of the second. e le- H 6 and the input of the second differentiating circuit 9, the direct output of the third trigger 3 is connected to the first output: 12; the input of the demand of the third trigger 3 is connected to the output of the third element I 7, the first input lujToporo is connected to 13 Stop, the pTopoi i input - to the output of the second differential | 9 circuit, the third input to the inverse output of the second trigger 2; The trigger inputs, the counting mode, with the fourth trigger 4, are connected to the second, third and (fourth) input buses 14, 13 and 16, direct output - to the start input of the first Tpurrejia 1, to the first EiiiM input of the first element I 5, the second of which is connected with the second output of the first differentiating circuit 8, and the second output bus 17 is connected to the output of the second element I 6.

The device works as follows.

In the initial state, there are low potentials on tires 14, 15 and 11, and high potentials on tires 12, 13, 16 and 17 (Fig. 2e, c, 6, s, n, u, g, at time t ,.

When the input signal arrives on bus 11 (Fig. 2a) from time t, until time t and there are no control signals on buses 14, 15, and 16, the device works without inserts and precipitations, i.e. on the bus 17 there are no single pulses and packs of pulses, and on the bus 12

a signal is generated similar to the signal on the input bus 11.

The process of generating the original signal on bus 12 (FIG. 2, time tj) is as follows.

The signal enters the bus 11 and with the help of element 10 and the chains 16 and 17 is converted into a sequence of pulses formed on the fronts (Fig. 2c) and a sequence of pulses formed from the decay of the input signal (Fig. 2d).

The front of the input signal pulse 3 is transferred to the state when a high potential is set at its inverse output (single state). If trigger 3 is immediately set to the specified state after turning on the power, the control pulse at the reset input will only confirm this state.

By dropping the same input pulse, the trigger 3 is reset, and therefore, on bus 12, a signal is generated similar to the input

signal: y (Fig. 2g, time t, 4) Consider the operation of the device in dynamic modes.

The mode of formation of single pulses (time interval, Fig.2). This mode may start at any random time. Let the 16 and 15 potentials be correspondingly high and low respectively. The formation of signals can be done by any device, nag fimer button. The trigger 4 changes the state to the opposite (Fig. 2t) and, with its front, changes the state of trigger 1

on the opposite (Fig. 2i, time t); the latter, in turn, changes the state of trigger 2 to the opposite one (fig. 2h). The prohibitory signal generated by trigger 2 is fed to the input of element 7 and does not allow the front of the signal from circuit 9 (figv) to be transmitted to the reset input of trigger 3. This leads to the fact that trigger 3 is not measuring

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A high potential remains on its state 12 and on bus 12 (Fig. 2g). A high potential is present until the next edge of the input signal arrives (Fig. 2c), after the arrival of which the device changes its state. On bus 12, a signal is generated without a single pulse (Fig. 2g, conventionally shown in dashed lines).

A single pulse, synchronous with the input signal, is formed on element 6 and removed from bus 17.

The Error burst mode starts at the moment tJ when the bus 13 appears low (Fig. 2n, time t,). Low potential is prohibitive for element 7. Therefore, at the reset input of trigger 3 there are no signals that set it in the opposite initial state. Therefore, on the bus 12, from the time tj to the time t, a high potential is established that characterizes the Error burst mode.

At the same time () at the output of element 6 and, therefore, on bus 17, when the signal on bus 11 (FIG. 2b) coincides with the signal at direct output of trigger 2 (FIG. 2p), a burst of pulses (FIG. 2c) is formed. At time t -t, the device works the same as at time t, -t.

Bundle Error Bundle Mode - Type Impulse Dropout, Start

starts at time t and ends at time tg. In this case, a high potential is established on tires 14 and 16, the control signal is fed to bus 15 (Fig. 2k, time tg), and then goes to the counting input of trigger 4, the output of which generates a signal (Fig. 2t). This signal by the front sets the trigger 1 to the opposite state and the output of the% trigger 1 generates a signal (Fig. 2i which sets the trigger 2 to the opposite initial state (Fig. 2h). The trigger 2 generates a inhibitory signal (Fig. 2h), which enters to the input element 7 and denied

Em formation of the original signal at the output of the trigger 3 on the edges of the input pulse (Fig. 26).

Thus, on bus 12, a signal of a burst of view errors is formed, and on the output bus 17 a burst of pulses is synchronous with the input signal.

Claims (1)

Formula of Invention Pulse synchronizer, containing four trigger, reset input lane The first of which is connected to the output of the first element I, the direct output of the second trigger is connected to the first input of the second element I, the second input of which is connected to the first input bus, the first input of the third element I connected to the bus Stop, the inverter, the second, third and fourth input buses and two output buses, about t-l and t that, with In order to expand the functionality, the first and second differentiating circuits are introduced into it, with the start, counting and reset inputs of the fourth trigger connected to the second, third and fourth input buses, the direct output to the first input, the first And element, and to the start input of the first trigger, the direct output of which is connected to the start input of the second trigger, the reset input of which is connected to the start input of the third trigger and to the first output of the first differentiating circuit, the second output of which is connected to the second the first element And, the input through the inverter - with the first input bus and with the input of the second differential chain, the output of which is connected to the second input of the third element And, the third input of which is connected to the inverse output of the second trigger, the output to the reset input of the third trigger whose direct output is connected to the first output bus, and the second output bus is connected to the output of the second element I. fia2 Editor M. Compiled by A. Sokolov Tehred M. Proofreader L. Pilipenko Order 3592/56 Circulation 901 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4