SU1243105A1 - Pulse shaper - Google Patents

Abstract

The invention can be used in the construction of schemes of specialized instrumentation. The purpose of the invention is to improve the reliability and enhance the functionality of the device. The shaper contains D-triggers 1, 2 and 3, the element AND-NOT 4 and the element AND-OR-NOT 5. Bus connection - Stop with the C-input of the D-trigger 1, tires Start with the C-ehodom D-trigger 2, etc. my output of which is connected to the second input of the second group of inputs on and the AND-OR-NOT 5 elements and D-input of the D-flip-flop 1, as well as the inverse output of the D-flip-flop 1 with the first input of the first group of inputs on the AND-AND-NI element and the D-input of the D-flip-flop 2, and the asynchronous output of the device with the D-input of the D-flip-flop 3, the direct output of which is connected to the first input of the NAND element, reduces the number of elec ENTOV and bonds, as well as reduce the duration of the signal Start and stop to a value determined by the speed srabatshani trigger. 2 Il. C b CO 1C 4i) ii oo

Description

I

The invention relates to a pulse technique and can be used in the construction of circuits, specialized instrumentation.

The aim of the invention is to increase its reliability, as well as expand the functionality of the device by reducing the duration of the Start and Stop signals to a value determined by the speed of triggering the trigger.

FIG. 1 is an electrical functional diagram of the device in FIG. 2 - time diagrams.

The device contains the first 1, second 2 and third 3 synchronous b-triggers, elements AND-NO 4 and AND-OR-NOT 5. At the same time, the second input of the first group of inputs of AND AND-IZH element NOT 5 is connected to the inverse output of the second trigger 2 and the first input of the second group of inputs by AND is with the direct output of the first trigger 1, the output of the AND-OR-NOT 5 element is connected to the D-input of the third trigger 3, the C-input of which is connected to the first bus of clock pulses, and its R- the input is combined with the R-inputs of the first 1 and second 2 triggers, and the second input of the element AND-NOT 4 is connected to the second bus of the sync pulse hors and his way out

 is the synchronous output of the device, the Stop bus is combined with the C input of the first trigger 1, and the Start bus with the C input of the second trigger 2, the forward output of which is connected to the second input of the second group of inputs and the AND-OR-HE element 5 and D-input of the first trigger 1, the inverse output of which is connected to the first input of the first group of inputs by AND

 the AND-OR-NOT 5 element and the D-input of the second trigger 2, the asynchronous output of the device is connected to the D-input of the third trigger 3, the direct output of which is connected to the first input of the AND-HE element 4.

The device works as follows.

In the initial state, the triggers 1 - 3 are in the zero state. After the arrival of the operating signal differential, the start of the second trigger 2 is set to one and the formation of the measurement window (OI) signal at the asynchronous output begins.

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y The first working front of the sync pulse will set the third trigger 3 to one state, and at the output of circuit 4, the steps will be in ms cycles. After

5 arrival of the worker, differential signal Stop the first trigger 1 is also set to one, at the output of the element AND-OR-NOT 5 a logical O signal is received, which is close to the signal: the third trigger will set to zero, the zero state and prohibits the issuance of ticks on the output of the coincidence circuit. The formation of a new signal OI wag 5 is possible only after the arrival of the next working differential, the Start signal, which sets the second trigger 2 to the zero state. The end of the formation of the OI signal is possible only after the arrival of the working edge of the Stop signal, which sets the first trigger 1 to the zero state,

25 If the first signal comes

Stop, the circuit from it does not react due to the level of logical O, coming from the direct output of the second trigger 2 to the D input of the first trigger 30.

The circuit also does not respond to the second and subsequent Start signals, if they arrived before the arrival of the Stop signal, due to the logic level 1 supplied through the feedback circuit to the D input of the second trigger 2 from the inverse output of the first trigger 1.

35

Thus, the presented scheme ensures that the “O” signal is generated by the selected operating differences of the Start and Stop signals, similarly to the Known scheme, but has greater reliability due to the smaller number of elements and connections, and is not critical to the duration of the Start and Stop signals.

Claims (1)

Invention Formula The pulse shaperj containing the first, second, and third synchronous - triggers, the AND-NOT element and the I-IPI-NE element, the second input of the first 55 group of inputs by And which is connected to the inverse output of the second trigger, and the first the input of the second group of inputs on the AND - with the direct output of the first Trig3. 1243 Hera, the output of the I-RSHI-NOT element is connected to the D-input of the third trigger, the C-input of which is connected to the first bus of clock pulses, and “then the R-input is combined with the R inputs of the first and second j triggers, and the second input of the element NAND is connected to the second clock bus, and its output is the synchronous output of the device, as well as the Start and Stop buses, about 10 and 10 chayush in order to extending functionality by reducing the duration of the start and stop signals to a value determined by the speed 1054 triggering, and increasing reliability, the Stop bus is connected to the C input of the first trigger, C the Start bus — to the C input of the second trigger, the direct output of which is connected to the second input of the second group of inputs on the AND-AND-D and D element - the input of the first trigger, the inverse output of which is connected to the first input of the first group of inputs of the AND-OR-NOT element and the D input of the second trigger, the asynchronous output of the device connected to the D input of the third trigger, the direct output of which is connected to the first input of the element AND-NO. F ГЖ Start Spoope Ha P Have rrjTjnjnjnjTjn T-TiJ ijn j Ln PG T rTJT ijnjnvrijnjn-Jxnjn Vnl ± see LTLTTn G Compiled by E.Surov Editor L.Gratillo Tehred N.Bonkalo Corrector.G. Reshetnik Order 3717/56 Circulation 816 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod,. Project, 4