SU1256179A1 - Generator of single pulses - Google Patents

Abstract

The invention can be used in devices for converting, processing and transmitting information. The purpose of the invention is to increase the resolution of the device. The shaper contains an inverter 1, an AND 2 element and triggers 3 and 4. Introduction of the trigger 5 provides the possibility of obtaining two output pulses corresponding to two control pulses during one clock frequency period, as well as pulses synchronous to the leading and trailing edges of the output pulses, 2 or more . ffo i (L 1C cl O) from 27 / Ug /

Description

The invention relates to a pulse technique and can be used in devices for converting, processing and transmitting information.

The purpose of the invention is to increase the resolution by obtaining two output pulses, corresponding to their two control pulses, during one period of the clock frequency, as well as pulses that are synchronous to the front and rear edges of the output pulses.

FIG. 1 shows the electrical functional scheme of the device; in fig. 2 - time diagrams, as seen from his work.

A single pulse shaper contains an inverter 1, element I 2, triggers 3-5. The C input of the first of which is connected to the control bus 6, the direct output to the B input of the second trigger 4 and the R input of the third trigger 5, the direct output of which is connected to the R input of the first trigger 3, C input from direct output of the second trigger 4, with the output bus 7 and with the first input of the element I 2 whose output is connected to the R input of the second trigger 4, the C input of which is connected through inverter 1 to the second input of the element 2 and the bus 8 clock pulses. The output of the second trigger 4 is connected to the C-input of the third trigger 5 and one of the inputs of the element 2, the other input of which is connected to the output of the inverter 1, and the output to the R-input of the second trigger 4. The output of the third trigger 5 is connected to the R-input of the first trigger 3.

The device works as follows.

After switching on and after the pulse supply from bus 8 (Fig. 2o), the device, regardless of the initial state of all the triggers, assumes the initial state when all the triggers are in the zero state (time point to, fig. 2g). A positive front is controlled, its pulse sets trigger 3 to one (Fig. 2c) state (time ti, Fig. 2g, and the positive edge of the clock pulse that arrives after that sets to 1 state (Fig. 2d) trigger 4 ( time t2, fig. 2g).

After trigger 4 is triggered, trigger 5 is set to one (Fig. 2e), at the output of which it forms a pulse, setting the trigger

3 (Fig. 2c) to the initial state.

On the negative edge of the clock pulse (instant t4, fig. 2g), a short pulse appears at the output of element 2 (fig. 2e), which sets the trigger to the zero state. If in between

time between the positive and negative edges of the synchronization pulse, another control signal arrives at the input of the device (time 1.x, fig. 2g), then the trigger 3 is set to one state by its positive edge. The subsequent positive edge of the clock pulse sets trigger one to 4 (time ts, fig. 2g), and the operation of the device is repeated.

Thus, due to the fact that the first trigger is set to the zero state before the second trigger is set to the zero state for a time equal to the duration of the clock pulse, the minimum distance between two adjacent control pulses over which the device produces the output pulse.

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five

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Claims (1)

Invention Formula A single pulse shaper containing two triggers, the C input of the first of which is connected to the control, the direct output to the D input of the second trigger, the direct output of which is connected to the output bus and to the first input of the element I, the output of which is connected to R - an input of a second trigger, the C input of which is connected via the inverter to the second input of the element I and to the clock pulse bus, characterized in that, in order to increase the resolution, a third trigger is inserted into it, the C input of which is connected to the direct output of the second trigger D-in od is connected to the R-input of the third flip-flop, a direct output of which is connected to R-input of the first flip-flop. f, t,,; fig 2 Compiled by T. Sokolova Editor V. PetrashTekhred I. VeresKorrektor V. But ha Order 4835/56 Circulation 816 Subscription VNIIPI USSR State Committee on delalam inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab. 4/5 Branch PPP "Patent, Uzhgorod, st. Project, 4