SU1304062A1 - Device for magnetic recording of digital information - Google Patents

Abstract

The invention relates to the accumulation of information and allows to increase the density of magnetic recording. The device contains a generator of I sinusoidal oscillations, a doubler 2 frequencies, shapers 3 and 13. Mounders, commutators 4, 6 and 14, elements NOT 7 and 16, shapers 8 and 17 pulses, elements EXCLUSIVE OR I2, counting trigger II, information buses 5 and 15 and a phase inverter 18. The introduction of new elements and the formation of new connections between the elements of the device allows one to achieve that one half-wave sinusoidal oscillation of a lower frequency or one period of sinusoidal oscillation fit into one cycle of recording digital information Higher frequency, which allows to achieve the goal. I il. with about 4 About O5 gche

Description

one

The invention relates to the accumulation of information, namely, devices for magnetic recording of digital information. The purpose of the invention is to increase the density of the magnetic recording of digital information.

The drawing shows a device for magnetic recording of digital information.

The device contains a generator of sinusoidal oscillations, the output of which is connected to the inputs of the doubler 2 frequency and the former 3 square wave and to the first information input of the switch 4. Switch 4 is connected to the second information input to the output of the doubler 2 frequency and connected to the input information bus 5.

The device also contains the first additional switch 6 connected by the control input and the first information input respectively to the input information bus 5 and to the output of the shaper 3 of the meander connected in series the first element HE 7, the first ({pulse 8, pulses, element AND 9, element OR 10, the counting trigger 11 and the element EXCLUSIVE OR 12, an additional driver 13 means, connected to the output of the frequency doubler 2, the second additional switch 14 connected by the output to the output information bus 15 and connected to the output of switch 4 by the first information input, the second element 16, the second pulse generator 17 and the phase inverter 18. The output of the additional shaper 13 of the square wave is connected to the second information input of the first additional switch b, the output bus 19 of the clock signal, the input of the first the element HE 7 and the input of the second pulse driver 17, connected by an output to the input of the element OR 10. A phase inverter 18 is connected between the output of the switch 4 and the second information input of the second additional a switch 14 connected by a control input to the output of an EXCLUSIVE or 12 element, whose input is connected to the output of the first additional switch 6. A second element NOT 16 is connected between the input information bus 5 and the input of element AND 9.

The device works as follows.

A sinusoidal signal from the output of the generator 1 sinusoidal signal enters the switch 4, the shaper 3 square wave and the doubler 2 frequency. The doubler 2 frequency generates a sinusoidal signal; the frequency of which is twice the frequency of the sinusoidal signal of the generator 1 sinusoidal signal.

A sinusoidal signal doubler 2-frequency is fed to the additional driver 13 meander. From the output of the additional shaper 13 meander to the first additional switch 6, to the first

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element 7, the second pulse shaper 17 and the output bus 19 of the clock signal receives a rectangular oscillation, the positive front of which corresponds to the transition of a sinusoidal oscillation

 divider 2 frequencies from the negative half-wave to the positive half-wave or any zero crossing of the sinusoidal oscillation of the generator of the sinusoidal oscillations.

10 When a logic “1” level arrives through the input information bus 5, switch 4 passes a sinusoidal signal of a sinusoidal signal generator 1, and when a logic level “O” arrives, a sinusoidal signal of doubler 2 frequencies.

 5 Signal s; the output of the switch 4 is fed to the second. additional switch 14 directly and through the phase inverter 18, ensuring its inverter.

When entering the logical level "I

2Q by. the input informational one is not the first additional switch 6 skips the rectangular oscillation of the imaging unit 3 meanders, and when the level of the logical “O” is received, the rectangular oscillation of the additional imaging unit 13 of the meander.

25 Due to this, the output of the first additional switch 6 to the EXCLUSIVE IL AND 12 element receives a binary signal, the level of which corresponds to the polarities of the signal at the output of switch 4.

30 The first and second shaper 8 and 17 pulses form positive short pulses. At the same time, the second pulse shaper 17 forms positive short pulses based on positive differences of the square oscillation of the additional shaper 13 of the meander, and the first pulse shaper 8 but the result of its inversion by the first element NOT 7.

The positive short pulses of the primary driver 8 pulses are located in the middle of the clock intervals, and the positive short pulses of the second driver 17 pulses - at their beginning. Positive short pulses of the second driver 17 pulses are applied to

45 element OR 10 directly, and positive short pulses of the first shaper 8 pulses pass through element I 9 only when the logical level I arrives on the input information bus 5 level, which is inverted by the second element NOT 16.

Each positive short pulse transmitted through the element OR 10 changes the state of the counting trigger 11, which generates a binary signal, whose array changes to reverse: - at the beginning

 of each clock interval, as well as in the middle of the clock intervals corresponding to the level of the logical “O on the input information bus 5. If polarity

the signals of the counting trigger 1 and the first additional switch 6 coincide, then the EXCLUSIVE OR 12 element forms the logical level "O, and if the polarities of these signals are different, then it forms the logical level" 1.

When arriving from an EXCLUSIVE OR 12 element of the logical level “O, the second additional switch 14 passes the signal of the switch 4 to the output information bus 15. When entering from the EXCLUSIVE OR 12 element of the logical level 1, the second additional switch 14 passes the phase-inverter signal to the output information bus 15 18.

Claims (1)

Invention Formula A device for magnetic recording of digital information, which contains a sinusoidal oscillator, the output of which is connected to the frequency doubler and square wave imaging inputs and to the first information input of the switch connected by the second information input to the frequency doubler output and connected to the input information bus, output an information bus and an output clock bus signal, characterized in that, in order to increase the density of the magnetic recording of digital information, in ;; an additional switch connected by the control input and the first information input respectively to the input information P1nme and the output of the form meander body, connected in series with the first element yy NOT, the first impulse generator, element I, e, -1 or, counting trigger and element EXCLUSIVE OR, Dopol 1P1telny shaper ME0 Andra, connected by the input with the output of the frequency doubler, the second additional switch, connected by the output to the output information bus and connected by the first information m input to the switch output, the second element is NOT, the second 5 pulse generator and phase inverter, the output of the additional meander of the meander is connected to the second information input of the first additional switch, the output bus of the clock signal, the input of the first element NOT and the input of the second pulse shaper connected to the input of the element OR, the phase inverter is connected between the output of the switch and the second the information input of the second additional switch connected to the output of the EXCLUSIVE OR element, the input of which is connected to you Odom first additional switch, and the second element is not connected between an input data line and an input member I. 0