SU401011A1 - DISCRETE FILTER - Google Patents

Description

one

The invention is related to the field of telegraphy, automation, and telemechanical IC1I. It is intended to increase the noise immunity of driem discrete signals.

There are known devices containing a clock pulse generator, the output of which is connected via an input unit to an input trigger I and simultaneously through a register counter to one of the inputs of the And circuits, the outputs of which, in turn, are connected to the inputs of the output trigger. However, such devices are complex and have low noise immunity.

In order to improve the noise immunity in the proposed filter, the inputs of the input trigger are connected directly to the second inputs of the AND circuits, and at the same time through the chip switch to the erase input | register-rac counter.

A check in the flowchart shows the proposed discrete filter.

The discrete filter consists of an input unit 1, an input trigger 2, a generator of 3 clock pulses, a register counter 4, circuits b and 6 "AND, an output trigger 7 and differentiating chains 8 and 9.

Filtered signals arrive at the input unit 1 "control input trigger 2 discretely when pulses are received from the output" of the generator 3. These same clock pulses advance information through the register-counter 4. From the output of the reporter counter, the information is read by the clock pulses from the output of the "b" generator 3, with a constant phase shift relative to the pulses at its output “a.

The impulses from the output of the repistor counter 4 are fed to the inputs of circuits 5 and 6 "And, to the second inputs of which voltage is supplied from

input trigger 2. One “And always open for pulses from register-counter 4, and depending on the position of input trigger 2, the latter fall on the corresponding input of output trigger 7, setting it to the same position as the input trigger p 2.

When the trigger 2 goes to another position, the differentiating chains 8 and 9 generate a pulse corresponding to the leading edge of the parcel, which, entering the erasing input of the register-counter 4, erases the information.

With the following clock cycles, the information on register-counter 4 from generator 3 starts anew. During this time, the pulses do not arrive at the input of output trigger 7, and it retains the previous position. If during the progress of information on the register-counter input trigger 2 again

that information

change its lololation, again will be cTeipTa

Thus, the signals arriving at the input unit 1 and having a shorter duration or duration equal to the set time, determined by the number of register-counter cells and the frequency of clock pulses, are not affected by the output trigger 7. Signals that arrive in Input Block 1 and exceed some predetermined value in duration affect and output trigger 7 and are broadcast by it.

Subject invention

A discrete filter containing a clock pulse generator, the output of which is connected through an input unit to an input trigger and at the same time through (register-counter to one of the inputs of the circuits And, whose outputs, in turn, are connected to the inputs of the output trigger, characterized by that, in order to improve noise immunity, the outputs of the input trigger are connected directly to the second inputs of the mentioned circuitry and simultaneously, through differentiating chains, to the erase input of the register-1 account (ik.